Author: adrian
Date: Thu Mar 31 02:36:22 2011
New Revision: 220180
URL: http://svn.freebsd.org/changeset/base/220180
Log:
Implement AR724x USB initialisation code.
This (again) still requires an offset for the AR913x/AR724x before USB will
function.
Submitted by: Luiz Otavio O Souzau <loos.br at gmail.com>
Modified:
head/sys/mips/atheros/ar724x_chip.c
head/sys/mips/atheros/ar724xreg.h
Modified: head/sys/mips/atheros/ar724x_chip.c
==============================================================================
--- head/sys/mips/atheros/ar724x_chip.c Thu Mar 31 01:14:06 2011 (r220179)
+++ head/sys/mips/atheros/ar724x_chip.c Thu Mar 31 02:36:22 2011 (r220180)
@@ -59,6 +59,7 @@ __FBSDID("$FreeBSD$");
#include <mips/atheros/ar724xreg.h>
#include <mips/atheros/ar71xx_cpudef.h>
+#include <mips/atheros/ar71xx_setup.h>
#include <mips/atheros/ar724x_chip.h>
static void
@@ -151,6 +152,50 @@ ar724x_chip_get_eth_pll(unsigned int mac
return 0;
}
+static void
+ar724x_chip_init_usb_peripheral(void)
+{
+
+ switch (ar71xx_soc) {
+ case AR71XX_SOC_AR7240:
+
+ ar71xx_device_stop(AR724X_RESET_MODULE_USB_OHCI_DLL |
+ AR724X_RESET_USB_HOST);
+ DELAY(1000);
+
+ ar71xx_device_start(AR724X_RESET_MODULE_USB_OHCI_DLL |
+ AR724X_RESET_USB_HOST);
+ DELAY(1000);
+
+ /*
+ * WAR for HW bug. Here it adjusts the duration
+ * between two SOFS.
+ */
+ ATH_WRITE_REG(AR71XX_USB_CTRL_FLADJ,
+ (3 << USB_CTRL_FLADJ_A0_SHIFT));
+
+ break;
+
+ case AR71XX_SOC_AR7241:
+ case AR71XX_SOC_AR7242:
+
+ ar71xx_device_start(AR724X_RESET_MODULE_USB_OHCI_DLL);
+ DELAY(100);
+
+ ar71xx_device_start(AR724X_RESET_USB_HOST);
+ DELAY(100);
+
+ ar71xx_device_start(AR724X_RESET_USB_PHY);
+ DELAY(100);
+
+ break;
+
+ default:
+ /* fallthrough */
+ break;
+ }
+}
+
struct ar71xx_cpu_def ar724x_chip_def = {
&ar724x_chip_detect_mem_size,
&ar724x_chip_detect_sys_frequency,
@@ -163,5 +208,5 @@ struct ar71xx_cpu_def ar724x_chip_def =
&ar724x_chip_ddr_flush_ge1,
&ar724x_chip_get_eth_pll,
NULL, /* ar71xx_chip_irq_flush_ip2 */
- NULL /* ar71xx_chip_init_usb_peripheral */
+ &ar724x_chip_init_usb_peripheral
};
Modified: head/sys/mips/atheros/ar724xreg.h
==============================================================================
--- head/sys/mips/atheros/ar724xreg.h Thu Mar 31 01:14:06 2011 (r220179)
+++ head/sys/mips/atheros/ar724xreg.h Thu Mar 31 02:36:22 2011 (r220180)
@@ -51,6 +51,8 @@
#define AR724X_DDR_REG_FLUSH_GE1 (AR71XX_DDR_CONFIG + 0x80)
#define AR724X_RESET_REG_RESET_MODULE AR71XX_RST_BLOCK_BASE + 0x1c
+#define AR724X_RESET_USB_HOST (1 << 5)
+#define AR724X_RESET_USB_PHY (1 << 4)
#define AR724X_RESET_MODULE_USB_OHCI_DLL (1 << 3)
/* XXX so USB requires different init code? -adrian */