svn commit: r212825 - in head/sys/arm: arm include

[Alexander Motin]

Author: mav
Date: Sat Sep 18 16:57:05 2010
New Revision: 212825
URL: http://svn.freebsd.org/changeset/base/212825

Log:
  Add basic cpu_sleep() support for Marvell SoCs. This drops my SheevaPlug's
  heatsink termperature in open air from 49C to 43C when idle.

Modified:
  head/sys/arm/arm/cpufunc.c
  head/sys/arm/arm/cpufunc_asm_sheeva.S
  head/sys/arm/include/cpufunc.h

Modified: head/sys/arm/arm/cpufunc.c
==============================================================================
--- head/sys/arm/arm/cpufunc.c	Sat Sep 18 15:03:31 2010	(r212824)
+++ head/sys/arm/arm/cpufunc.c	Sat Sep 18 16:57:05 2010	(r212825)
@@ -397,7 +397,7 @@ struct cpu_functions sheeva_cpufuncs = {
 	cpufunc_nullop,			/* flush_brnchtgt_C	*/
 	(void *)cpufunc_nullop,		/* flush_brnchtgt_E	*/
 
-	(void *)cpufunc_nullop,		/* sleep		*/
+	sheeva_cpu_sleep,		/* sleep		*/
 
 	/* Soft functions */
 
@@ -1076,6 +1076,9 @@ set_cpufuncs()
 				    FC_DCACHE_STREAM_EN | FC_WR_ALLOC_EN |
 				    FC_BRANCH_TARG_BUF_DIS | FC_L2CACHE_EN);
 			}
+
+			/* Use powersave on this CPU. */
+			cpu_do_powersave = 1;
 		} else
 			cpufuncs = armv5_ec_cpufuncs;
 

Modified: head/sys/arm/arm/cpufunc_asm_sheeva.S
==============================================================================
--- head/sys/arm/arm/cpufunc_asm_sheeva.S	Sat Sep 18 15:03:31 2010	(r212824)
+++ head/sys/arm/arm/cpufunc_asm_sheeva.S	Sat Sep 18 16:57:05 2010	(r212825)
@@ -392,3 +392,10 @@ ENTRY(sheeva_control_ext)
 	mcrne	p15, 1, r2, c15, c1, 0	/* Write new control register */
 	mov	r0, r3			/* Return old value */
 	RET
+
+ENTRY(sheeva_cpu_sleep)
+	mov	r0, #0
+	mcr	p15, 0, r0, c7, c10, 4	/* Drain write buffer */
+	mcr	p15, 0, r0, c7, c0, 4	/* Wait for interrupt */
+	mov	pc, lr
+

Modified: head/sys/arm/include/cpufunc.h
==============================================================================
--- head/sys/arm/include/cpufunc.h	Sat Sep 18 15:03:31 2010	(r212824)
+++ head/sys/arm/include/cpufunc.h	Sat Sep 18 16:57:05 2010	(r212825)
@@ -400,6 +400,7 @@ extern unsigned arm10_dcache_index_max;
 extern unsigned arm10_dcache_index_inc;
 
 u_int	sheeva_control_ext 		(u_int, u_int);
+void	sheeva_cpu_sleep		(int);
 void	sheeva_setttb			(u_int);
 void	sheeva_dcache_wbinv_range	(vm_offset_t, vm_size_t);
 void	sheeva_dcache_inv_range		(vm_offset_t, vm_size_t);