svn commit: r202381 - stable/7/sys/dev/mk48txx

Marius Strobl marius at FreeBSD.org
Fri Jan 15 15:41:05 UTC 2010


Author: marius
Date: Fri Jan 15 15:41:04 2010
New Revision: 202381
URL: http://svn.freebsd.org/changeset/base/202381

Log:
  MFC: r201003
  
  Style changes

Modified:
  stable/7/sys/dev/mk48txx/mk48txx.c
  stable/7/sys/dev/mk48txx/mk48txxreg.h
  stable/7/sys/dev/mk48txx/mk48txxvar.h
Directory Properties:
  stable/7/sys/   (props changed)
  stable/7/sys/cddl/contrib/opensolaris/   (props changed)
  stable/7/sys/contrib/dev/acpica/   (props changed)
  stable/7/sys/contrib/pf/   (props changed)

Modified: stable/7/sys/dev/mk48txx/mk48txx.c
==============================================================================
--- stable/7/sys/dev/mk48txx/mk48txx.c	Fri Jan 15 15:40:44 2010	(r202380)
+++ stable/7/sys/dev/mk48txx/mk48txx.c	Fri Jan 15 15:41:04 2010	(r202381)
@@ -40,7 +40,7 @@
 __FBSDID("$FreeBSD$");
 
 /*
- * Mostek MK48T02, MK48T08, MK48T18, MK48T59 time-of-day chip subroutines.
+ * Mostek MK48T02, MK48T08, MK48T18, MK48T59 time-of-day chip subroutines
  */
 
 #include <sys/param.h>
@@ -59,17 +59,17 @@ __FBSDID("$FreeBSD$");
 
 #include "clock_if.h"
 
-static uint8_t	mk48txx_def_nvrd(device_t, int);
-static void	mk48txx_def_nvwr(device_t, int, uint8_t);
-static void	mk48txx_watchdog(void *, u_int, int *);
+static uint8_t	mk48txx_def_nvrd(device_t dev, int off);
+static void	mk48txx_def_nvwr(device_t dev, int off, uint8_t v);
+static void	mk48txx_watchdog(void *arg, u_int cmd, int *error);
 
-struct {
+static const struct {
 	const char *name;
 	bus_size_t nvramsz;
 	bus_size_t clkoff;
-	int flags;
-#define MK48TXX_EXT_REGISTERS	1	/* Has extended register set */
-} mk48txx_models[] = {
+	u_int flags;
+#define	MK48TXX_EXT_REGISTERS	1	/* Has extended register set. */
+} const mk48txx_models[] = {
 	{ "mk48t02", MK48T02_CLKSZ, MK48T02_CLKOFF, 0 },
 	{ "mk48t08", MK48T08_CLKSZ, MK48T08_CLKOFF, 0 },
 	{ "mk48t18", MK48T18_CLKSZ, MK48T18_CLKOFF, 0 },
@@ -112,7 +112,7 @@ mk48txx_attach(device_t dev)
 
 	if (mk48txx_models[i].flags & MK48TXX_EXT_REGISTERS) {
 		mtx_lock(&sc->sc_mtx);
-	    	if ((*sc->sc_nvrd)(dev, sc->sc_clkoffset + MK48TXX_FLAGS) &
+		if ((*sc->sc_nvrd)(dev, sc->sc_clkoffset + MK48TXX_FLAGS) &
 		    MK48TXX_FLAGS_BL) {
 			mtx_unlock(&sc->sc_mtx);
 			device_printf(dev, "%s: battery low\n", __func__);
@@ -140,7 +140,7 @@ mk48txx_attach(device_t dev)
 		}
 	}
 
-	clock_register(dev, 1000000);	/* 1 second resolution. */
+	clock_register(dev, 1000000);	/* 1 second resolution */
 
 	if ((sc->sc_flag & MK48TXX_WDOG_REGISTER) &&
 	    (mk48txx_models[i].flags & MK48TXX_EXT_REGISTERS)) {

Modified: stable/7/sys/dev/mk48txx/mk48txxreg.h
==============================================================================
--- stable/7/sys/dev/mk48txx/mk48txxreg.h	Fri Jan 15 15:40:44 2010	(r202380)
+++ stable/7/sys/dev/mk48txx/mk48txxreg.h	Fri Jan 15 15:41:04 2010	(r202381)
@@ -59,23 +59,23 @@
  * The first bank of eight registers at offset (nvramsz - 16) is
  * available only on recenter (which?) MK48Txx models.
  */
-#define MK48TXX_FLAGS	0	/* flags register */
-#define MK48TXX_UNUSED	1	/* unused */
-#define MK48TXX_ASEC	2	/* alarm seconds (0..59; BCD) */
-#define MK48TXX_AMIN	3	/* alarm minutes (0..59; BCD) */
-#define MK48TXX_AHOUR	4	/* alarm hours (0..23; BCD) */
-#define MK48TXX_ADAY	5	/* alarm day in month (1..31; BCD) */
-#define MK48TXX_INTR	6	/* interrupts register */
-#define MK48TXX_WDOG	7	/* watchdog register */
-
-#define MK48TXX_ICSR	8	/* control register */
-#define MK48TXX_ISEC	9	/* seconds (0..59; BCD) */
-#define MK48TXX_IMIN	10	/* minutes (0..59; BCD) */
-#define MK48TXX_IHOUR	11	/* hours (0..23; BCD) */
-#define MK48TXX_IWDAY	12	/* weekday (1..7) */
-#define MK48TXX_IDAY	13	/* day in month (1..31; BCD) */
-#define MK48TXX_IMON	14	/* month (1..12; BCD) */
-#define MK48TXX_IYEAR	15	/* year (0..99; BCD) */
+#define	MK48TXX_FLAGS	0	/* flags register */
+#define	MK48TXX_UNUSED	1	/* unused */
+#define	MK48TXX_ASEC	2	/* alarm seconds (0..59; BCD) */
+#define	MK48TXX_AMIN	3	/* alarm minutes (0..59; BCD) */
+#define	MK48TXX_AHOUR	4	/* alarm hours (0..23; BCD) */
+#define	MK48TXX_ADAY	5	/* alarm day in month (1..31; BCD) */
+#define	MK48TXX_INTR	6	/* interrupts register */
+#define	MK48TXX_WDOG	7	/* watchdog register */
+
+#define	MK48TXX_ICSR	8	/* control register */
+#define	MK48TXX_ISEC	9	/* seconds (0..59; BCD) */
+#define	MK48TXX_IMIN	10	/* minutes (0..59; BCD) */
+#define	MK48TXX_IHOUR	11	/* hours (0..23; BCD) */
+#define	MK48TXX_IWDAY	12	/* weekday (1..7) */
+#define	MK48TXX_IDAY	13	/* day in month (1..31; BCD) */
+#define	MK48TXX_IMON	14	/* month (1..12; BCD) */
+#define	MK48TXX_IYEAR	15	/* year (0..99; BCD) */
 
 /*
  * Note that some of the bits below that are not in the first eight
@@ -84,80 +84,80 @@
  */
 
 /* Bits in the flags register (extended only) */
-#define MK48TXX_FLAGS_BL	0x10	/* battery low (read only) */
-#define MK48TXX_FLAGS_AF	0x40	/* alarm flag (read only) */
-#define MK48TXX_FLAGS_WDF	0x80	/* watchdog flag (read only) */
+#define	MK48TXX_FLAGS_BL	0x10	/* battery low (read only) */
+#define	MK48TXX_FLAGS_AF	0x40	/* alarm flag (read only) */
+#define	MK48TXX_FLAGS_WDF	0x80	/* watchdog flag (read only) */
 
 /* Bits in the alarm seconds register (extended only) */
-#define MK48TXX_ASEC_MASK	0x7f	/* mask for alarm seconds */
-#define MK48TXX_ASEC_RPT1	0x80	/* alarm repeat mode bit 1 */
+#define	MK48TXX_ASEC_MASK	0x7f	/* mask for alarm seconds */
+#define	MK48TXX_ASEC_RPT1	0x80	/* alarm repeat mode bit 1 */
 
 /* Bits in the alarm minutes register (extended only) */
-#define MK48TXX_AMIN_MASK	0x7f	/* mask for alarm minutes */
-#define MK48TXX_AMIN_RPT2	0x80	/* alarm repeat mode bit 2 */
+#define	MK48TXX_AMIN_MASK	0x7f	/* mask for alarm minutes */
+#define	MK48TXX_AMIN_RPT2	0x80	/* alarm repeat mode bit 2 */
 
 /* Bits in the alarm hours register (extended only) */
-#define MK48TXX_AHOUR_MASK	0x3f	/* mask for alarm hours */
-#define MK48TXX_AHOUR_RPT3	0x80	/* alarm repeat mode bit 3 */
+#define	MK48TXX_AHOUR_MASK	0x3f	/* mask for alarm hours */
+#define	MK48TXX_AHOUR_RPT3	0x80	/* alarm repeat mode bit 3 */
 
 /* Bits in the alarm day in month register (extended only) */
-#define MK48TXX_ADAY_MASK	0x3f	/* mask for alarm day in month */
-#define MK48TXX_ADAY_RPT4	0x80	/* alarm repeat mode bit 4 */
+#define	MK48TXX_ADAY_MASK	0x3f	/* mask for alarm day in month */
+#define	MK48TXX_ADAY_RPT4	0x80	/* alarm repeat mode bit 4 */
 
 /* Bits in the interrupts register (extended only) */
-#define MK48TXX_INTR_ABE	0x20	/* alarm in battery back-up mode */
-#define MK48TXX_INTR_AFE	0x80	/* alarm flag enable */
+#define	MK48TXX_INTR_ABE	0x20	/* alarm in battery back-up mode */
+#define	MK48TXX_INTR_AFE	0x80	/* alarm flag enable */
 
 /* Bits in the watchdog register (extended only) */
-#define MK48TXX_WDOG_RB_1_16	0x00	/* watchdog resolution 1/16 second */
-#define MK48TXX_WDOG_RB_1_4	0x01	/* watchdog resolution 1/4 second */
-#define MK48TXX_WDOG_RB_1	0x02	/* watchdog resolution 1 second */
-#define MK48TXX_WDOG_RB_4	0x03	/* watchdog resolution 4 seconds */
-#define MK48TXX_WDOG_BMB_MASK	0x7c	/* mask for watchdog multiplier */
-#define MK48TXX_WDOG_BMB_SHIFT	2	/* shift for watchdog multiplier */
-#define MK48TXX_WDOG_WDS	0x80	/* watchdog steering bit */
+#define	MK48TXX_WDOG_RB_1_16	0x00	/* watchdog resolution 1/16 second */
+#define	MK48TXX_WDOG_RB_1_4	0x01	/* watchdog resolution 1/4 second */
+#define	MK48TXX_WDOG_RB_1	0x02	/* watchdog resolution 1 second */
+#define	MK48TXX_WDOG_RB_4	0x03	/* watchdog resolution 4 seconds */
+#define	MK48TXX_WDOG_BMB_MASK	0x7c	/* mask for watchdog multiplier */
+#define	MK48TXX_WDOG_BMB_SHIFT	2	/* shift for watchdog multiplier */
+#define	MK48TXX_WDOG_WDS	0x80	/* watchdog steering bit */
 
 /* Bits in the control register */
-#define MK48TXX_CSR_CALIB_MASK	0x1f	/* mask for calibration step width */
-#define MK48TXX_CSR_SIGN	0x20	/* sign of above calibration witdh */
-#define MK48TXX_CSR_READ	0x40	/* want to read (freeze clock) */
-#define MK48TXX_CSR_WRITE	0x80	/* want to write */
+#define	MK48TXX_CSR_CALIB_MASK	0x1f	/* mask for calibration step width */
+#define	MK48TXX_CSR_SIGN	0x20	/* sign of above calibration witdh */
+#define	MK48TXX_CSR_READ	0x40	/* want to read (freeze clock) */
+#define	MK48TXX_CSR_WRITE	0x80	/* want to write */
 
 /* Bits in the seconds register */
-#define MK48TXX_SEC_MASK	0x7f	/* mask for seconds */
-#define MK48TXX_SEC_ST		0x80	/* stop oscillator */
+#define	MK48TXX_SEC_MASK	0x7f	/* mask for seconds */
+#define	MK48TXX_SEC_ST		0x80	/* stop oscillator */
 
 /* Bits in the minutes register */
-#define MK48TXX_MIN_MASK	0x7f	/* mask for minutes */
+#define	MK48TXX_MIN_MASK	0x7f	/* mask for minutes */
 
 /* Bits in the hours register */
-#define MK48TXX_HOUR_MASK	0x3f	/* mask for hours */
+#define	MK48TXX_HOUR_MASK	0x3f	/* mask for hours */
 
 /* Bits in the century/weekday register */
-#define MK48TXX_WDAY_MASK	0x07	/* mask for weekday */
-#define MK48TXX_WDAY_CB		0x10	/* century bit (extended only) */
-#define MK48TXX_WDAY_CB_SHIFT	4	/* shift for century bit */
-#define MK48TXX_WDAY_CEB	0x20	/* century enable bit (extended only) */
-#define MK48TXX_WDAY_FT		0x40	/* frequency test */
+#define	MK48TXX_WDAY_MASK	0x07	/* mask for weekday */
+#define	MK48TXX_WDAY_CB		0x10	/* century bit (extended only) */
+#define	MK48TXX_WDAY_CB_SHIFT	4	/* shift for century bit */
+#define	MK48TXX_WDAY_CEB	0x20	/* century enable bit (extended only) */
+#define	MK48TXX_WDAY_FT		0x40	/* frequency test */
 
 /* Bits in the day in month register */
-#define MK48TXX_DAY_MASK	0x3f	/* mask for day in month */
+#define	MK48TXX_DAY_MASK	0x3f	/* mask for day in month */
 
 /* Bits in the month register */
-#define MK48TXX_MON_MASK	0x1f	/* mask for month */
+#define	MK48TXX_MON_MASK	0x1f	/* mask for month */
 
 /* Bits in the year register */
-#define MK48TXX_YEAR_MASK	0xff	/* mask for year */
+#define	MK48TXX_YEAR_MASK	0xff	/* mask for year */
 
 /* Model specific NVRAM sizes and clock offsets */
-#define MK48T02_CLKSZ		2048
-#define MK48T02_CLKOFF		0x7f0
+#define	MK48T02_CLKSZ		2048
+#define	MK48T02_CLKOFF		0x7f0
 
-#define MK48T08_CLKSZ		8192
-#define MK48T08_CLKOFF		0x1ff0
+#define	MK48T08_CLKSZ		8192
+#define	MK48T08_CLKOFF		0x1ff0
 
-#define MK48T18_CLKSZ		8192
-#define MK48T18_CLKOFF		0x1ff0
+#define	MK48T18_CLKSZ		8192
+#define	MK48T18_CLKOFF		0x1ff0
 
-#define MK48T59_CLKSZ		8192
-#define MK48T59_CLKOFF		0x1ff0
+#define	MK48T59_CLKSZ		8192
+#define	MK48T59_CLKOFF		0x1ff0

Modified: stable/7/sys/dev/mk48txx/mk48txxvar.h
==============================================================================
--- stable/7/sys/dev/mk48txx/mk48txxvar.h	Fri Jan 15 15:40:44 2010	(r202380)
+++ stable/7/sys/dev/mk48txx/mk48txxvar.h	Fri Jan 15 15:41:04 2010	(r202381)
@@ -38,8 +38,8 @@
  * $FreeBSD$
  */
 
-typedef uint8_t (*mk48txx_nvrd_t)(device_t, int);
-typedef void (*mk48txx_nvwr_t)(device_t, int, uint8_t);
+typedef uint8_t (*mk48txx_nvrd_t)(device_t dev, int off);
+typedef void (*mk48txx_nvwr_t)(device_t dev, int off, uint8_t v);
 
 struct mk48txx_softc {
 	bus_space_tag_t		sc_bst;	/* bus space tag */
@@ -53,17 +53,17 @@ struct mk48txx_softc {
 	bus_size_t	sc_clkoffset;	/* Offset in NVRAM to clock bits */
 	u_int		sc_year0;	/* year counter offset */
 	u_int		sc_flag;	/* MD flags */
-#define MK48TXX_NO_CENT_ADJUST	0x0001	/* don't manually adjust century */
-#define MK48TXX_WDOG_REGISTER	0x0002	/* register watchdog */
-#define MK48TXX_WDOG_ENABLE_WDS	0x0004	/* enable watchdog steering bit */
+#define	MK48TXX_NO_CENT_ADJUST	0x0001	/* don't manually adjust century */
+#define	MK48TXX_WDOG_REGISTER	0x0002	/* register watchdog */
+#define	MK48TXX_WDOG_ENABLE_WDS	0x0004	/* enable watchdog steering bit */
 
 	mk48txx_nvrd_t	sc_nvrd;	/* NVRAM/RTC read function */
 	mk48txx_nvwr_t	sc_nvwr;	/* NVRAM/RTC write function */
 };
 
 /* Chip attach function */
-int mk48txx_attach(device_t);
+int mk48txx_attach(device_t dev);
 
 /* Methods for the clock interface */
-int mk48txx_gettime(device_t, struct timespec *);
-int mk48txx_settime(device_t, struct timespec *);
+int mk48txx_gettime(device_t dev, struct timespec *ts);
+int mk48txx_settime(device_t dev, struct timespec *ts);


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