svn commit: r198341 - in head/sys: amd64/amd64 arm/arm arm/mv i386/i386 i386/xen ia64/ia64 kern mips/mips powerpc/aim powerpc/booke powerpc/include powerpc/powerpc sparc64/sparc64 sun4v/sun4v vm

Marcel Moolenaar xcllnt at
Sun Oct 25 21:37:56 UTC 2009

On Oct 25, 2009, at 1:25 PM, Marius Strobl wrote:
> Do you have a simple test case demonstrating the need for
> I-cache synchronisation?

I typically use GDB. If breakpoints aren't being hit or
next isn't behaving correctly, you typically have an
I-cache problem. If you get to run GDB, you probably
already know whether it's needed, because processes
tend to die with random signals at startup when the
architecture needs explicit I-cache coherency logic
and the kernel doesn't have it. A special case I would
say is executing from a memory disk. The I/O path
contains bcopy() operations, which dirty the D-cache
and trigger I-cache coherency bugs pretty well.

I didn't have issues with that on my Netra, so I didn't
implement pmap_sync_icache for sparc64. This is not to
say that it's absolutely not needed, just that GDB didn't
expose problems. If sparc64 has some of the same kluges
powerpc had, then I-cache coherency is handled in some
other (most likely a sub-optimal) way.


Marcel Moolenaar
xcllnt at

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