svn commit: r184108 - head/sys/i386/i386

[Jung-uk Kim]

On Tuesday 21 October 2008 06:07 am, Attilio Rao wrote:
> Something we could do with this is adding a "quirk" table of TSC
> arch dependant known to be working (based on cpu_model and such)
> and use that table in order to replace tsc_smp.

Please note the invariant_tsc and smp_tsc are different.  If we go 
with the route, we need two quirk tables. :-(

BTW, Linux is using TSC now when the P-state invariant TSC bit is set 
by BIOS for AMD CPUs:

http://www.mail-archive.com/linux-kernel@vger.kernel.org/msg246251.html
http://www.mail-archive.com/linux-kernel@vger.kernel.org/msg246769.html

"After a lot of discussions with AMD it turns out that TSC on Fam10h 
CPUs is synchronized when the CONSTANT_TSC cpuid bit is set. Or 
rather that if there are ever systems where that is not true it would 
be their BIOS' task to disable the bit."

If this is statement is true, then we should do:

	if (amd_pminfo & AMDPM_TSC_INVARIANT)
		smp_tsc = 1;

Also, I think we can safely assume:

	if (AMD64_FAMILY(cpu_id) >= 0x10)
		tsc_is_invariant = 1;

Does anyone know whether these are correct assumptions?

Jung-uk Kim