svn commit: r185354 - head/sys/dev/fxp

Pyun YongHyeon yongari at FreeBSD.org
Wed Nov 26 17:57:24 PST 2008


Author: yongari
Date: Thu Nov 27 01:57:23 2008
New Revision: 185354
URL: http://svn.freebsd.org/changeset/base/185354

Log:
  Add basic WOL support for 82550/82551/82558 and 82559 based
  controllers. ICH based controllers are treated as 82559. 82557,
  earlier revision of 82558 and 82559ER have no WOL capability.
   o WOL support requires help of a firmware so add check whether
     hardware is capable of handling magic frames by reading EEPROM.
   o Enable accepting WOL frames only when hardware is about to
     suspend or shutdown. Previously fxp(4) used to allow receipt of
     magic frame under normal operation mode which could cause
     hardware hang if magic frame is received by hardware. Datasheet
     clearly states driver should not allow WOL frames under normal
     operation mode.
   o Disable WOL frame reception in device attach so have fxp(4)
     immunize against system hang which can be triggered by magic
     packets when the hardware is not in fully initialized state.
   o Don't reset all hardware configuration data in fxp_stop()
     otherwise important configuration data is lost and this would
     reset WOL configuration to default state which in turn cause
     hardware hang on receipt of magic frames. To fix the issue,
     preserve hardware configuration data by issuing a selective
     reset.
   o Explicitly disable interrupts after issuing selective reset as
     reset may unmask interrupts.
  
  Tested by:	Alexey Shuvaev < shuvaev <> physik DOT uni-wuerzburg DOT de >

Modified:
  head/sys/dev/fxp/if_fxp.c
  head/sys/dev/fxp/if_fxpreg.h
  head/sys/dev/fxp/if_fxpvar.h

Modified: head/sys/dev/fxp/if_fxp.c
==============================================================================
--- head/sys/dev/fxp/if_fxp.c	Wed Nov 26 23:57:23 2008	(r185353)
+++ head/sys/dev/fxp/if_fxp.c	Thu Nov 27 01:57:23 2008	(r185354)
@@ -405,7 +405,7 @@ fxp_attach(device_t dev)
 	uint32_t val;
 	uint16_t data, myea[ETHER_ADDR_LEN / 2];
 	u_char eaddr[ETHER_ADDR_LEN];
-	int i, prefer_iomap;
+	int i, pmc, prefer_iomap;
 	int error;
 
 	error = 0;
@@ -483,6 +483,17 @@ fxp_attach(device_t dev)
 		sc->revision = pci_get_revid(dev);
 
 	/*
+	 * Check availability of WOL. 82559ER does not support WOL.
+	 */
+	if (sc->revision >= FXP_REV_82558_A4 &&
+	    sc->revision != FXP_REV_82559S_A) {
+		fxp_read_eeprom(sc, &data, 10, 1);
+		if ((data & 0x20) != 0 &&
+		    pci_find_extcap(sc->dev, PCIY_PMG, &pmc) == 0)
+			sc->flags |= FXP_FLAG_WOLCAP;
+	}
+
+	/*
 	 * Determine whether we must use the 503 serial interface.
 	 */
 	fxp_read_eeprom(sc, &data, 6, 1);
@@ -796,6 +807,11 @@ fxp_attach(device_t dev)
 		ifp->if_capenable |= IFCAP_RXCSUM;
 	}
 
+	if (sc->flags & FXP_FLAG_WOLCAP) {
+		ifp->if_capabilities |= IFCAP_WOL_MAGIC;
+		ifp->if_capenable |= IFCAP_WOL_MAGIC;
+	}
+
 #ifdef DEVICE_POLLING
 	/* Inform the world we support polling. */
 	ifp->if_capabilities |= IFCAP_POLLING;
@@ -834,6 +850,19 @@ fxp_attach(device_t dev)
 		goto fail;
 	}
 
+	/*
+	 * Configure hardware to reject magic frames otherwise
+	 * system will hang on recipt of magic frames.
+	 */
+	if ((sc->flags & FXP_FLAG_WOLCAP) != 0) {
+		FXP_LOCK(sc);
+		/* Clear wakeup events. */
+		CSR_READ_1(sc, FXP_CSR_PMDR);
+		fxp_init_body(sc);
+		fxp_stop(sc);
+		FXP_UNLOCK(sc);
+	}
+
 fail:
 	if (error)
 		fxp_release(sc);
@@ -956,17 +985,13 @@ fxp_detach(device_t dev)
 static int
 fxp_shutdown(device_t dev)
 {
-	struct fxp_softc *sc = device_get_softc(dev);
 
 	/*
 	 * Make sure that DMA is disabled prior to reboot. Not doing
 	 * do could allow DMA to corrupt kernel memory during the
 	 * reboot before the driver initializes.
 	 */
-	FXP_LOCK(sc);
-	fxp_stop(sc);
-	FXP_UNLOCK(sc);
-	return (0);
+	return (fxp_suspend(dev));
 }
 
 /*
@@ -978,9 +1003,25 @@ static int
 fxp_suspend(device_t dev)
 {
 	struct fxp_softc *sc = device_get_softc(dev);
+	struct ifnet *ifp;
+	int pmc;
+	uint16_t pmstat;
 
 	FXP_LOCK(sc);
 
+	ifp = sc->ifp;
+	if (pci_find_extcap(sc->dev, PCIY_PMG, &pmc) == 0) {
+		pmstat = pci_read_config(sc->dev, pmc + PCIR_POWER_STATUS, 2);
+		pmstat &= ~(PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE);
+		if ((ifp->if_capenable & IFCAP_WOL_MAGIC) != 0) {
+			/* Request PME. */
+			pmstat |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE;
+			sc->flags |= FXP_FLAG_WOL;
+			/* Reconfigure hardware to accept magic frames. */
+			fxp_init_body(sc);
+		}
+		pci_write_config(sc->dev, pmc + PCIR_POWER_STATUS, pmstat, 2);
+	}
 	fxp_stop(sc);
 
 	sc->suspended = 1;
@@ -998,9 +1039,23 @@ fxp_resume(device_t dev)
 {
 	struct fxp_softc *sc = device_get_softc(dev);
 	struct ifnet *ifp = sc->ifp;
+	int pmc;
+	uint16_t pmstat;
 
 	FXP_LOCK(sc);
 
+	if (pci_find_extcap(sc->dev, PCIY_PMG, &pmc) == 0) {
+		sc->flags &= ~FXP_FLAG_WOL;
+		pmstat = pci_read_config(sc->dev, pmc + PCIR_POWER_STATUS, 2);
+		/* Disable PME and clear PME status. */
+		pmstat &= ~PCIM_PSTAT_PMEENABLE;
+		pci_write_config(sc->dev, pmc + PCIR_POWER_STATUS, pmstat, 2);
+		if ((sc->flags & FXP_FLAG_WOLCAP) != 0) {
+			/* Clear wakeup events. */
+			CSR_READ_1(sc, FXP_CSR_PMDR);
+		}
+	}
+
 	CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET);
 	DELAY(10);
 
@@ -2015,11 +2070,13 @@ fxp_stop(struct fxp_softc *sc)
 	callout_stop(&sc->stat_ch);
 
 	/*
-	 * Issue software reset, which also unloads the microcode.
+	 * Preserve PCI configuration, configure, IA/multicast
+	 * setup and put RU and CU into idle state.
 	 */
-	sc->flags &= ~FXP_FLAG_UCODE;
-	CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SOFTWARE_RESET);
+	CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET);
 	DELAY(50);
+	/* Disable interrupts. */
+	CSR_WRITE_1(sc, FXP_CSR_SCB_INTRCNTL, FXP_SCB_INTR_DISABLE);
 
 	/*
 	 * Release any xmit buffers.
@@ -2099,6 +2156,13 @@ fxp_init_body(struct fxp_softc *sc)
 	 */
 	fxp_stop(sc);
 
+	/*
+	 * Issue software reset, which also unloads the microcode.
+	 */
+	sc->flags &= ~FXP_FLAG_UCODE;
+	CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SOFTWARE_RESET);
+	DELAY(50);
+
 	prm = (ifp->if_flags & IFF_PROMISC) ? 1 : 0;
 
 	/*
@@ -2215,8 +2279,7 @@ fxp_init_body(struct fxp_softc *sc)
 	cbp->rcv_crc_xfer =	0;	/* (don't) xfer CRC to host */
 	cbp->long_rx_en =	sc->flags & FXP_FLAG_LONG_PKT_EN ? 1 : 0;
 	cbp->ia_wake_en =	0;	/* (don't) wake up on address match */
-	cbp->magic_pkt_dis =	0;	/* (don't) disable magic packet */
-					/* must set wake_en in PMCSR also */
+	cbp->magic_pkt_dis =	sc->flags & FXP_FLAG_WOL ? 0 : 1;
 	cbp->force_fdx =	0;	/* (don't) force full duplex */
 	cbp->fdx_pin_en =	1;	/* (enable) FDX# pin */
 	cbp->multi_ia =		0;	/* (don't) accept multiple IAs */
@@ -2687,6 +2750,9 @@ fxp_ioctl(struct ifnet *ifp, u_long comm
 			else
 				ifp->if_hwassist &= ~CSUM_TSO;
 		}
+		if ((mask & IFCAP_WOL_MAGIC) != 0 &&
+		    (ifp->if_capabilities & IFCAP_WOL_MAGIC) != 0)
+			ifp->if_capenable ^= IFCAP_WOL_MAGIC;
 		if ((mask & IFCAP_VLAN_MTU) != 0 &&
 		    (ifp->if_capabilities & IFCAP_VLAN_MTU) != 0) {
 			ifp->if_capenable ^= IFCAP_VLAN_MTU;

Modified: head/sys/dev/fxp/if_fxpreg.h
==============================================================================
--- head/sys/dev/fxp/if_fxpreg.h	Wed Nov 26 23:57:23 2008	(r185353)
+++ head/sys/dev/fxp/if_fxpreg.h	Thu Nov 27 01:57:23 2008	(r185354)
@@ -46,6 +46,7 @@
 #define	FXP_CSR_EEPROMCONTROL	14	/* eeprom control (2 bytes) */
 #define	FXP_CSR_MDICONTROL	16	/* mdi control (4 bytes) */
 #define	FXP_CSR_FLOWCONTROL	0x19	/* flow control (2 bytes) */
+#define	FXP_CSR_PMDR		0x1B	/* power management driver (1 byte) */
 #define	FXP_CSR_GENCONTROL	0x1C	/* general control (1 byte) */
 
 /*

Modified: head/sys/dev/fxp/if_fxpvar.h
==============================================================================
--- head/sys/dev/fxp/if_fxpvar.h	Wed Nov 26 23:57:23 2008	(r185353)
+++ head/sys/dev/fxp/if_fxpvar.h	Thu Nov 27 01:57:23 2008	(r185354)
@@ -201,6 +201,8 @@ struct fxp_softc {
 #define FXP_FLAG_EXT_RFA	0x0400	/* extended RFDs for csum offload */
 #define FXP_FLAG_SAVE_BAD	0x0800	/* save bad pkts: bad size, CRC, etc */
 #define FXP_FLAG_82559_RXCSUM	0x1000	/* 82559 compatible RX checksum */
+#define FXP_FLAG_WOLCAP		0x2000	/* WOL capability */
+#define FXP_FLAG_WOL		0x4000	/* WOL active */
 
 /* Macros to ease CSR access. */
 #define	CSR_READ_1(sc, reg)		bus_read_1(sc->fxp_res[0], reg)


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