socsvn commit: r286139 - soc2015/pratiksinghal/cubie-head/sys/arm/allwinner

[pratiksinghal at FreeBSD.org]

Author: pratiksinghal
Date: Mon May 25 16:51:48 2015
New Revision: 286139
URL: http://svnweb.FreeBSD.org/socsvn/?view=rev&rev=286139

Log:
  Added useful constants

Modified:
  soc2015/pratiksinghal/cubie-head/sys/arm/allwinner/a10_dma.h

Modified: soc2015/pratiksinghal/cubie-head/sys/arm/allwinner/a10_dma.h
==============================================================================
--- soc2015/pratiksinghal/cubie-head/sys/arm/allwinner/a10_dma.h	Mon May 25 15:18:32 2015	(r286138)
+++ soc2015/pratiksinghal/cubie-head/sys/arm/allwinner/a10_dma.h	Mon May 25 16:51:48 2015	(r286139)
@@ -52,9 +52,63 @@
 #define a10_dma_unlock(_sc) mtx_unlock(&(_sc)->a10_dma_mtx) 
 
 /* Helper Macros */ 
-
 #define SET_BIT(n) (1 << (n)) 
 
+/* Useful constants. */ 
+
+#define DMA_LOADING 			(1U << 31)
+#define DMA_BUSY				(1U << 30)
+#define DMA_CONT_MOD_EN			(1U << 29)
+#define DMA_DEST_NON_SEC		(1U << 28)
+#define DMA_DEST_DATA_2			(1U << 25)
+#define DMA_DEST_DATA_4			(2U << 25)
+#define DMA_DEST_BURST_4		(1U << 23)
+#define DMA_DEST_BUST_8			(2U << 23)
+#define DMA_DEST_ADDR_LIN		(0U << 21)
+#define DMA_DEST_ADDR_IO		(1U << 21)
+#define DMA_DEST_ADDR_HORIZ		(2U << 21)
+#define DMA_DEST_ADDR_VERT		(3U << 21)
+#define DMA_DEST_SRAM			(0U	<< 16)
+#define DMA_DEST_SDRAM			(1U << 16)
+#define DMA_DEST_PATA			(2U << 16)
+#define DMA_DEST_NAND			(3U << 16)
+#define DMA_DEST_USB0			(4U << 16)
+#define DMA_DEST_EMAC			(6U << 16)
+#define DMA_DEST_SPI_1 			(8U << 16)
+#define DMA_DEST_SEC_SYS		(10U << 16)
+#define DMA_DEST_TCON0			(14U << 16)
+#define DMA_DEST_TCON1			(15U << 16)
+#define DMA_DEST_MSC			(23U << 16)
+#define DMA_DEST_HDMI			(24U << 16)
+#define DMA_DEST_SPI_0			(26U << 16)
+#define DMA_DEST_SPI_2			(28U << 16)
+#define DMA_DEST_SPI_3			(30U << 16)
+#define BC_MODE_NORMAL			(0U << 15)
+#define BC_MODE_REMAIN			(1U << 15)
+#define DMA_SRC_SEC				(0U	<< 12)
+#define DMA_SRC_NON_SEC			(1U << 12)
+#define DMA_SRC_DATA_1			(0U << 9)
+#define DMA_SRC_DATA_2			(1U << 9)
+#define DMA_SRC_DATA_4			(2U << 9)
+#define DMA_SRC_BURST_1			(0U << 7)
+#define DMA_SRC_BURST_4			(1U << 7)
+#define DMA_SRC_BURST_8			(2U << 7)
+#define DMA_SRC_ADDR_LIN		(0U << 5)
+#define DMA_SRC_ADDR_IO			(1U << 5)
+#define DMA_SRC_ADDR_HORIZ		(2U << 5)
+#define DMA_SRC_ADDR_VERT		(3U << 5)
+#define DMA_SRC_SRAM			(0U)
+#define DMA_SRC_SDRAM			(1U)
+#define DMA_SRC_PATA			(2U)
+#define DMA_SRC_NAND			(3U)
+#define DMA_SRC_USB0			(4U)
+#define DMA_SRC_EMAC			(7U)
+#define DMA_SRC_SPI_1			(9U)
+#define DMA_SRC_SEC_SYS			(11U)
+#define DMA_SRC__MSC			(23U)
+#define DMA_SRC_SPI_0			(27U)
+#define DMA_SRC_SPI_2			(29U)
+#define DMA_SRC_SPI_3			(31U)
 /* Function prototypes */ 
 /* Currently these two methods are implemented for only DDMA */ 
 uint8_t a10_get_ddma_channel(void) ;