svn commit: r522176 - in head/cad: . ujprog
Yuri Victorovich
yuri at FreeBSD.org
Mon Jan 6 00:23:19 UTC 2020
Author: yuri
Date: Mon Jan 6 00:23:18 2020
New Revision: 522176
URL: https://svnweb.freebsd.org/changeset/ports/522176
Log:
New port: cad/ujprog: ULX2S/ULX3S FPGA JTAG programmer
Added:
head/cad/ujprog/
head/cad/ujprog/Makefile (contents, props changed)
head/cad/ujprog/distinfo (contents, props changed)
head/cad/ujprog/pkg-descr (contents, props changed)
Modified:
head/cad/Makefile
Modified: head/cad/Makefile
==============================================================================
--- head/cad/Makefile Mon Jan 6 00:19:41 2020 (r522175)
+++ head/cad/Makefile Mon Jan 6 00:23:18 2020 (r522176)
@@ -106,6 +106,7 @@
SUBDIR += tkgate
SUBDIR += tochnog
SUBDIR += transcalc
+ SUBDIR += ujprog
SUBDIR += varkon
SUBDIR += verilator
SUBDIR += verilog-mode.el
Added: head/cad/ujprog/Makefile
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/cad/ujprog/Makefile Mon Jan 6 00:23:18 2020 (r522176)
@@ -0,0 +1,35 @@
+# $FreeBSD$
+
+PORTNAME= ujprog
+DISTVERSION= g20191117
+CATEGORIES= cad
+
+MAINTAINER= yuri at FreeBSD.org
+COMMENT= ULX2S/ULX3S FPGA JTAG programmer
+
+LICENSE= BSD2CLAUSE
+
+LIB_DEPENDS= libftdi.so:devel/libftdi
+
+USES= gmake
+USE_GITHUB= yes
+GH_ACCOUNT= f32c
+GH_PROJECT= tools
+GH_TAGNAME= 0698352b0e912caa9b8371b8f692e19aac547a69
+
+ALL_TARGET= ujprog flash
+
+WRKSRC_SUBDIR= ${PORTNAME}
+
+MAKEFILE= Makefile.bsd
+
+MAKE_ARGS= INCLUDES="`libftdi-config --cflags`" FTLIB="`libftdi-config --libs`"
+
+PLIST_FILES= bin/ujprog \
+ bin/ft232r_flash
+
+do-install:
+ ${INSTALL_PROGRAM} ${WRKSRC}/ujprog ${STAGEDIR}${PREFIX}/bin
+ ${INSTALL_PROGRAM} ${WRKSRC}/ft232r_flash ${STAGEDIR}${PREFIX}/bin
+
+.include <bsd.port.mk>
Added: head/cad/ujprog/distinfo
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/cad/ujprog/distinfo Mon Jan 6 00:23:18 2020 (r522176)
@@ -0,0 +1,3 @@
+TIMESTAMP = 1578269026
+SHA256 (f32c-tools-g20191117-0698352b0e912caa9b8371b8f692e19aac547a69_GH0.tar.gz) = 2b863a366b063c54ad164602b601bca6f8374d85b798090780dcc43cb423fed4
+SIZE (f32c-tools-g20191117-0698352b0e912caa9b8371b8f692e19aac547a69_GH0.tar.gz) = 42029
Added: head/cad/ujprog/pkg-descr
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/cad/ujprog/pkg-descr Mon Jan 6 00:23:18 2020 (r522176)
@@ -0,0 +1,3 @@
+Toos to program ULX2S/ULX3S FPGAs over the JTAG interface.
+
+WWW: https://github.com/f32c/tools/tree/master/ujprog
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