svn commit: r510139 - in head: security/nss/files www/chromium/files
Jan Beich
jbeich at FreeBSD.org
Thu Aug 29 05:06:53 UTC 2019
Author: jbeich
Date: Thu Aug 29 05:06:51 2019
New Revision: 510139
URL: https://svnweb.freebsd.org/changeset/ports/510139
Log:
security/nss: detect AES/SHA2 when PMULL/SHA512 is available on aarch64
Submitted by: Greg V <greg at unrelenting.technology>
Modified:
head/security/nss/files/patch-bug1575843 (contents, props changed)
head/security/nss/files/patch-lib_freebl_blinit.c (contents, props changed)
head/www/chromium/files/patch-third__party_boringssl_src_crypto_cpu-aarch64-linux.c (contents, props changed)
Modified: head/security/nss/files/patch-bug1575843
==============================================================================
--- head/security/nss/files/patch-bug1575843 Thu Aug 29 05:03:22 2019 (r510138)
+++ head/security/nss/files/patch-bug1575843 Thu Aug 29 05:06:51 2019 (r510139)
@@ -51,10 +51,10 @@ elf_aux_info is similar to getauxval but is nop on aar
+#elif defined(__FreeBSD__)
+ uint64_t id_aa64isar0;
+ id_aa64isar0 = READ_SPECIALREG(ID_AA64ISAR0_EL1);
-+ arm_aes_support_ = ID_AA64ISAR0_AES(id_aa64isar0) == ID_AA64ISAR0_AES_BASE && disable_hw_aes == NULL;
++ arm_aes_support_ = ID_AA64ISAR0_AES(id_aa64isar0) >= ID_AA64ISAR0_AES_BASE && disable_hw_aes == NULL;
+ arm_pmull_support_ = ID_AA64ISAR0_AES(id_aa64isar0) == ID_AA64ISAR0_AES_PMULL;
+ arm_sha1_support_ = ID_AA64ISAR0_SHA1(id_aa64isar0) == ID_AA64ISAR0_SHA1_BASE;
-+ arm_sha2_support_ = ID_AA64ISAR0_SHA2(id_aa64isar0) == ID_AA64ISAR0_SHA2_BASE;
++ arm_sha2_support_ = ID_AA64ISAR0_SHA2(id_aa64isar0) >= ID_AA64ISAR0_SHA2_BASE;
+#endif /* defined(__linux__) */
/* aarch64 must support NEON. */
arm_neon_support_ = disable_arm_neon == NULL;
Modified: head/security/nss/files/patch-lib_freebl_blinit.c
==============================================================================
--- head/security/nss/files/patch-lib_freebl_blinit.c Thu Aug 29 05:03:22 2019 (r510138)
+++ head/security/nss/files/patch-lib_freebl_blinit.c Thu Aug 29 05:06:51 2019 (r510139)
@@ -10,17 +10,17 @@ https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=2400
#elif defined(__FreeBSD__)
- uint64_t id_aa64isar0;
- id_aa64isar0 = READ_SPECIALREG(ID_AA64ISAR0_EL1);
-- arm_aes_support_ = ID_AA64ISAR0_AES(id_aa64isar0) == ID_AA64ISAR0_AES_BASE && disable_hw_aes == NULL;
+- arm_aes_support_ = ID_AA64ISAR0_AES(id_aa64isar0) >= ID_AA64ISAR0_AES_BASE && disable_hw_aes == NULL;
- arm_pmull_support_ = ID_AA64ISAR0_AES(id_aa64isar0) == ID_AA64ISAR0_AES_PMULL;
- arm_sha1_support_ = ID_AA64ISAR0_SHA1(id_aa64isar0) == ID_AA64ISAR0_SHA1_BASE;
-- arm_sha2_support_ = ID_AA64ISAR0_SHA2(id_aa64isar0) == ID_AA64ISAR0_SHA2_BASE;
+- arm_sha2_support_ = ID_AA64ISAR0_SHA2(id_aa64isar0) >= ID_AA64ISAR0_SHA2_BASE;
+ if (!PR_GetEnvSecure("QEMU_EMULATING")) {
+ uint64_t id_aa64isar0;
+ id_aa64isar0 = READ_SPECIALREG(ID_AA64ISAR0_EL1);
-+ arm_aes_support_ = ID_AA64ISAR0_AES(id_aa64isar0) == ID_AA64ISAR0_AES_BASE && disable_hw_aes == NULL;
++ arm_aes_support_ = ID_AA64ISAR0_AES(id_aa64isar0) >= ID_AA64ISAR0_AES_BASE && disable_hw_aes == NULL;
+ arm_pmull_support_ = ID_AA64ISAR0_AES(id_aa64isar0) == ID_AA64ISAR0_AES_PMULL;
+ arm_sha1_support_ = ID_AA64ISAR0_SHA1(id_aa64isar0) == ID_AA64ISAR0_SHA1_BASE;
-+ arm_sha2_support_ = ID_AA64ISAR0_SHA2(id_aa64isar0) == ID_AA64ISAR0_SHA2_BASE;
++ arm_sha2_support_ = ID_AA64ISAR0_SHA2(id_aa64isar0) >= ID_AA64ISAR0_SHA2_BASE;
+ }
#endif /* defined(__linux__) */
/* aarch64 must support NEON. */
Modified: head/www/chromium/files/patch-third__party_boringssl_src_crypto_cpu-aarch64-linux.c
==============================================================================
--- head/www/chromium/files/patch-third__party_boringssl_src_crypto_cpu-aarch64-linux.c Thu Aug 29 05:03:22 2019 (r510138)
+++ head/www/chromium/files/patch-third__party_boringssl_src_crypto_cpu-aarch64-linux.c Thu Aug 29 05:06:51 2019 (r510139)
@@ -42,7 +42,7 @@
OPENSSL_armcap_P |= ARMV7_NEON;
- if (hwcap & kAES) {
-+ if (ID_AA64ISAR0_AES(id_aa64isar0) == ID_AA64ISAR0_AES_BASE) {
++ if (ID_AA64ISAR0_AES(id_aa64isar0) >= ID_AA64ISAR0_AES_BASE) {
OPENSSL_armcap_P |= ARMV8_AES;
}
- if (hwcap & kPMULL) {
@@ -54,7 +54,7 @@
OPENSSL_armcap_P |= ARMV8_SHA1;
}
- if (hwcap & kSHA256) {
-+ if(ID_AA64ISAR0_SHA2(id_aa64isar0) == ID_AA64ISAR0_SHA2_BASE) {
++ if(ID_AA64ISAR0_SHA2(id_aa64isar0) >= ID_AA64ISAR0_SHA2_BASE) {
OPENSSL_armcap_P |= ARMV8_SHA256;
}
}
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