PERFORCE change 227765 for review
Robert Watson
rwatson at FreeBSD.org
Tue Apr 16 13:55:09 UTC 2013
http://p4web.freebsd.org/@@227765?ac=10
Change 227765 by rwatson at rwatson_zenith_cl_cam_ac_uk on 2013/04/16 13:54:52
More firmly trim FP support from libstand's MIPS setjmp/longjmp,
as apparently it doesn't really belong there in the first place.
Affected files ...
.. //depot/projects/ctsrd/beribsd/src/lib/libstand/mips/_setjmp.S#5 edit
Differences ...
==== //depot/projects/ctsrd/beribsd/src/lib/libstand/mips/_setjmp.S#5 (text+ko) ====
@@ -72,22 +72,6 @@
REG_S s7, ((S7 + 3) * SZREG)(a0)
REG_S sp, ((SP + 3) * SZREG)(a0)
REG_S s8, ((S8 + 3) * SZREG)(a0)
-/* XXXRW: Don't try to save/restore FP in libstand. */
-#if 0
- cfc1 v0, $31 # too bad cant check if FP used
- FP_S $f20, ((20 + 38) * SZREG)(a0)
- FP_S $f21, ((21 + 38) * SZREG)(a0)
- FP_S $f22, ((22 + 38) * SZREG)(a0)
- FP_S $f23, ((23 + 38) * SZREG)(a0)
- FP_S $f24, ((24 + 38) * SZREG)(a0)
- FP_S $f25, ((25 + 38) * SZREG)(a0)
- FP_S $f26, ((26 + 38) * SZREG)(a0)
- FP_S $f27, ((27 + 38) * SZREG)(a0)
- FP_S $f28, ((28 + 38) * SZREG)(a0)
- FP_S $f29, ((29 + 38) * SZREG)(a0)
- FP_S $f30, ((30 + 38) * SZREG)(a0)
- FP_S $f31, ((31 + 38) * SZREG)(a0)
-#endif
REG_S v0, ((32 + 38) * SZREG)(a0)
j ra
move v0, zero
@@ -115,25 +99,6 @@
REG_L v0, ((32 + 38) * SZREG)(a0) # get fpu status
REG_L sp, ((SP + 3) * SZREG)(a0)
REG_L s8, ((S8 + 3) * SZREG)(a0)
-/* XXXRW: Don't try to save/restore FP in libstand. */
-#if 0
-/* Octeon does not have an FPU */
-#if !defined(_MIPS_ARCH_OCTEON)
- ctc1 v0, $31
- FP_L $f20, ((20 + 38) * SZREG)(a0)
- FP_L $f21, ((21 + 38) * SZREG)(a0)
- FP_L $f22, ((22 + 38) * SZREG)(a0)
- FP_L $f23, ((23 + 38) * SZREG)(a0)
- FP_L $f24, ((24 + 38) * SZREG)(a0)
- FP_L $f25, ((25 + 38) * SZREG)(a0)
- FP_L $f26, ((26 + 38) * SZREG)(a0)
- FP_L $f27, ((27 + 38) * SZREG)(a0)
- FP_L $f28, ((28 + 38) * SZREG)(a0)
- FP_L $f29, ((29 + 38) * SZREG)(a0)
- FP_L $f30, ((30 + 38) * SZREG)(a0)
- FP_L $f31, ((31 + 38) * SZREG)(a0)
-#endif /* _MIPS_ARCH_OCTEON */
-#endif
j ra
move v0, a1
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