PERFORCE change 219407 for review
Robert Watson
rwatson at FreeBSD.org
Wed Oct 31 21:59:09 UTC 2012
http://p4web.freebsd.org/@@219407?ac=10
Change 219407 by rwatson at rwatson_svr_ctsrd_mipsbuild on 2012/10/31 21:58:36
Use CHERI ISAv2 clc/csc instruction immediate operands more conservatively,
as current use exceeds the signed 11-bit space that is available. This
requires re-introducing an explicit temporary register and a manual
addition -- however, at least it's not two as before. The kernel now boots
several hundred instructions into userspace, rather than dying during the
first userspace instruction fetch due to installing an incorrect EPCC in
CP2.
Affected files ...
.. //depot/projects/ctsrd/cheribsd/src/sys/mips/include/cheriasm.h#9 edit
.. //depot/projects/ctsrd/cheribsd/src/sys/mips/mips/exception.S#11 edit
.. //depot/projects/ctsrd/cheribsd/src/sys/mips/mips/swtch.S#10 edit
Differences ...
==== //depot/projects/ctsrd/cheribsd/src/sys/mips/include/cheriasm.h#9 (text+ko) ====
@@ -86,11 +86,13 @@
* manage $c0.
*/
#define SZCAP 32
-#define SAVE_U_PCB_CHERIREG(creg, offs, base) \
- csc creg, base, (U_PCB_CHERIFRAME + (SZCAP * offs))($c30)
+#define SAVE_U_PCB_CHERIREG(creg, offs, base, treg) \
+ PTR_ADDIU treg, base, U_PCB_CHERIFRAME; \
+ csc creg, treg, (SZCAP * offs)($c30)
-#define RESTORE_U_PCB_CHERIREG(creg, offs, base) \
- clc creg, base, (U_PCB_CHERIFRAME + (SZCAP * offs))($c30)
+#define RESTORE_U_PCB_CHERIREG(creg, offs, base, treg) \
+ PTR_ADDIU treg, base, U_PCB_CHERIFRAME; \
+ clc creg, treg, (SZCAP * offs)($c30)
/*
* XXXRW: Update once the assembler supports reserved CHERI register names to
@@ -102,62 +104,62 @@
*
* XXXRW: Note hard-coding of UDC here.
*/
-#define SAVE_CHERI_CONTEXT(base) \
- SAVE_U_PCB_CHERIREG($c25, CHERI_CR_C0_OFF, base); \
- SAVE_U_PCB_CHERIREG($c1, CHERI_CR_C1_OFF, base); \
- SAVE_U_PCB_CHERIREG($c2, CHERI_CR_C2_OFF, base); \
- SAVE_U_PCB_CHERIREG($c3, CHERI_CR_C3_OFF, base); \
- SAVE_U_PCB_CHERIREG($c4, CHERI_CR_C4_OFF, base); \
- SAVE_U_PCB_CHERIREG($c5, CHERI_CR_C5_OFF, base); \
- SAVE_U_PCB_CHERIREG($c6, CHERI_CR_C6_OFF, base); \
- SAVE_U_PCB_CHERIREG($c7, CHERI_CR_C7_OFF, base); \
- SAVE_U_PCB_CHERIREG($c8, CHERI_CR_C8_OFF, base); \
- SAVE_U_PCB_CHERIREG($c9, CHERI_CR_C9_OFF, base); \
- SAVE_U_PCB_CHERIREG($c10, CHERI_CR_C10_OFF, base); \
- SAVE_U_PCB_CHERIREG($c11, CHERI_CR_C11_OFF, base); \
- SAVE_U_PCB_CHERIREG($c12, CHERI_CR_C12_OFF, base); \
- SAVE_U_PCB_CHERIREG($c13, CHERI_CR_C13_OFF, base); \
- SAVE_U_PCB_CHERIREG($c14, CHERI_CR_C14_OFF, base); \
- SAVE_U_PCB_CHERIREG($c15, CHERI_CR_C15_OFF, base); \
- SAVE_U_PCB_CHERIREG($c16, CHERI_CR_C16_OFF, base); \
- SAVE_U_PCB_CHERIREG($c17, CHERI_CR_C17_OFF, base); \
- SAVE_U_PCB_CHERIREG($c18, CHERI_CR_C18_OFF, base); \
- SAVE_U_PCB_CHERIREG($c19, CHERI_CR_C19_OFF, base); \
- SAVE_U_PCB_CHERIREG($c20, CHERI_CR_C20_OFF, base); \
- SAVE_U_PCB_CHERIREG($c21, CHERI_CR_C21_OFF, base); \
- SAVE_U_PCB_CHERIREG($c22, CHERI_CR_C22_OFF, base); \
- SAVE_U_PCB_CHERIREG($c23, CHERI_CR_C23_OFF, base); \
- SAVE_U_PCB_CHERIREG($c24, CHERI_CR_C24_OFF, base); \
- SAVE_U_PCB_CHERIREG($c26, CHERI_CR_C26_OFF, base); \
- SAVE_U_PCB_CHERIREG($c31, CHERI_CR_PCC_OFF, base)
+#define SAVE_CHERI_CONTEXT(base, treg) \
+ SAVE_U_PCB_CHERIREG($c25, CHERI_CR_C0_OFF, base, treg); \
+ SAVE_U_PCB_CHERIREG($c1, CHERI_CR_C1_OFF, base, treg); \
+ SAVE_U_PCB_CHERIREG($c2, CHERI_CR_C2_OFF, base, treg); \
+ SAVE_U_PCB_CHERIREG($c3, CHERI_CR_C3_OFF, base, treg); \
+ SAVE_U_PCB_CHERIREG($c4, CHERI_CR_C4_OFF, base, treg); \
+ SAVE_U_PCB_CHERIREG($c5, CHERI_CR_C5_OFF, base, treg); \
+ SAVE_U_PCB_CHERIREG($c6, CHERI_CR_C6_OFF, base, treg); \
+ SAVE_U_PCB_CHERIREG($c7, CHERI_CR_C7_OFF, base, treg); \
+ SAVE_U_PCB_CHERIREG($c8, CHERI_CR_C8_OFF, base, treg); \
+ SAVE_U_PCB_CHERIREG($c9, CHERI_CR_C9_OFF, base, treg); \
+ SAVE_U_PCB_CHERIREG($c10, CHERI_CR_C10_OFF, base, treg); \
+ SAVE_U_PCB_CHERIREG($c11, CHERI_CR_C11_OFF, base, treg); \
+ SAVE_U_PCB_CHERIREG($c12, CHERI_CR_C12_OFF, base, treg); \
+ SAVE_U_PCB_CHERIREG($c13, CHERI_CR_C13_OFF, base, treg); \
+ SAVE_U_PCB_CHERIREG($c14, CHERI_CR_C14_OFF, base, treg); \
+ SAVE_U_PCB_CHERIREG($c15, CHERI_CR_C15_OFF, base, treg); \
+ SAVE_U_PCB_CHERIREG($c16, CHERI_CR_C16_OFF, base, treg); \
+ SAVE_U_PCB_CHERIREG($c17, CHERI_CR_C17_OFF, base, treg); \
+ SAVE_U_PCB_CHERIREG($c18, CHERI_CR_C18_OFF, base, treg); \
+ SAVE_U_PCB_CHERIREG($c19, CHERI_CR_C19_OFF, base, treg); \
+ SAVE_U_PCB_CHERIREG($c20, CHERI_CR_C20_OFF, base, treg); \
+ SAVE_U_PCB_CHERIREG($c21, CHERI_CR_C21_OFF, base, treg); \
+ SAVE_U_PCB_CHERIREG($c22, CHERI_CR_C22_OFF, base, treg); \
+ SAVE_U_PCB_CHERIREG($c23, CHERI_CR_C23_OFF, base, treg); \
+ SAVE_U_PCB_CHERIREG($c24, CHERI_CR_C24_OFF, base, treg); \
+ SAVE_U_PCB_CHERIREG($c26, CHERI_CR_C26_OFF, base, treg); \
+ SAVE_U_PCB_CHERIREG($c31, CHERI_CR_PCC_OFF, base, treg)
-#define RESTORE_CHERI_CONTEXT(base) \
- RESTORE_U_PCB_CHERIREG($c25, CHERI_CR_C0_OFF, base); \
- RESTORE_U_PCB_CHERIREG($c1, CHERI_CR_C1_OFF, base); \
- RESTORE_U_PCB_CHERIREG($c2, CHERI_CR_C2_OFF, base); \
- RESTORE_U_PCB_CHERIREG($c3, CHERI_CR_C3_OFF, base); \
- RESTORE_U_PCB_CHERIREG($c4, CHERI_CR_C4_OFF, base); \
- RESTORE_U_PCB_CHERIREG($c5, CHERI_CR_C5_OFF, base); \
- RESTORE_U_PCB_CHERIREG($c6, CHERI_CR_C6_OFF, base); \
- RESTORE_U_PCB_CHERIREG($c7, CHERI_CR_C7_OFF, base); \
- RESTORE_U_PCB_CHERIREG($c8, CHERI_CR_C8_OFF, base); \
- RESTORE_U_PCB_CHERIREG($c9, CHERI_CR_C9_OFF, base); \
- RESTORE_U_PCB_CHERIREG($c10, CHERI_CR_C10_OFF, base); \
- RESTORE_U_PCB_CHERIREG($c11, CHERI_CR_C11_OFF, base); \
- RESTORE_U_PCB_CHERIREG($c12, CHERI_CR_C12_OFF, base); \
- RESTORE_U_PCB_CHERIREG($c13, CHERI_CR_C13_OFF, base); \
- RESTORE_U_PCB_CHERIREG($c14, CHERI_CR_C14_OFF, base); \
- RESTORE_U_PCB_CHERIREG($c15, CHERI_CR_C15_OFF, base); \
- RESTORE_U_PCB_CHERIREG($c16, CHERI_CR_C16_OFF, base); \
- RESTORE_U_PCB_CHERIREG($c17, CHERI_CR_C17_OFF, base); \
- RESTORE_U_PCB_CHERIREG($c18, CHERI_CR_C18_OFF, base); \
- RESTORE_U_PCB_CHERIREG($c19, CHERI_CR_C19_OFF, base); \
- RESTORE_U_PCB_CHERIREG($c20, CHERI_CR_C20_OFF, base); \
- RESTORE_U_PCB_CHERIREG($c21, CHERI_CR_C21_OFF, base); \
- RESTORE_U_PCB_CHERIREG($c22, CHERI_CR_C22_OFF, base); \
- RESTORE_U_PCB_CHERIREG($c23, CHERI_CR_C23_OFF, base); \
- RESTORE_U_PCB_CHERIREG($c24, CHERI_CR_C24_OFF, base); \
- RESTORE_U_PCB_CHERIREG($c26, CHERI_CR_C26_OFF, base); \
- RESTORE_U_PCB_CHERIREG($c31, CHERI_CR_PCC_OFF, base)
+#define RESTORE_CHERI_CONTEXT(base, treg) \
+ RESTORE_U_PCB_CHERIREG($c25, CHERI_CR_C0_OFF, base, treg); \
+ RESTORE_U_PCB_CHERIREG($c1, CHERI_CR_C1_OFF, base, treg); \
+ RESTORE_U_PCB_CHERIREG($c2, CHERI_CR_C2_OFF, base, treg); \
+ RESTORE_U_PCB_CHERIREG($c3, CHERI_CR_C3_OFF, base, treg); \
+ RESTORE_U_PCB_CHERIREG($c4, CHERI_CR_C4_OFF, base, treg); \
+ RESTORE_U_PCB_CHERIREG($c5, CHERI_CR_C5_OFF, base, treg); \
+ RESTORE_U_PCB_CHERIREG($c6, CHERI_CR_C6_OFF, base, treg); \
+ RESTORE_U_PCB_CHERIREG($c7, CHERI_CR_C7_OFF, base, treg); \
+ RESTORE_U_PCB_CHERIREG($c8, CHERI_CR_C8_OFF, base, treg); \
+ RESTORE_U_PCB_CHERIREG($c9, CHERI_CR_C9_OFF, base, treg); \
+ RESTORE_U_PCB_CHERIREG($c10, CHERI_CR_C10_OFF, base, treg); \
+ RESTORE_U_PCB_CHERIREG($c11, CHERI_CR_C11_OFF, base, treg); \
+ RESTORE_U_PCB_CHERIREG($c12, CHERI_CR_C12_OFF, base, treg); \
+ RESTORE_U_PCB_CHERIREG($c13, CHERI_CR_C13_OFF, base, treg); \
+ RESTORE_U_PCB_CHERIREG($c14, CHERI_CR_C14_OFF, base, treg); \
+ RESTORE_U_PCB_CHERIREG($c15, CHERI_CR_C15_OFF, base, treg); \
+ RESTORE_U_PCB_CHERIREG($c16, CHERI_CR_C16_OFF, base, treg); \
+ RESTORE_U_PCB_CHERIREG($c17, CHERI_CR_C17_OFF, base, treg); \
+ RESTORE_U_PCB_CHERIREG($c18, CHERI_CR_C18_OFF, base, treg); \
+ RESTORE_U_PCB_CHERIREG($c19, CHERI_CR_C19_OFF, base, treg); \
+ RESTORE_U_PCB_CHERIREG($c20, CHERI_CR_C20_OFF, base, treg); \
+ RESTORE_U_PCB_CHERIREG($c21, CHERI_CR_C21_OFF, base, treg); \
+ RESTORE_U_PCB_CHERIREG($c22, CHERI_CR_C22_OFF, base, treg); \
+ RESTORE_U_PCB_CHERIREG($c23, CHERI_CR_C23_OFF, base, treg); \
+ RESTORE_U_PCB_CHERIREG($c24, CHERI_CR_C24_OFF, base, treg); \
+ RESTORE_U_PCB_CHERIREG($c26, CHERI_CR_C26_OFF, base, treg); \
+ RESTORE_U_PCB_CHERIREG($c31, CHERI_CR_PCC_OFF, base, treg)
#endif /* _MIPS_INCLUDE_CHERIASM_H_ */
==== //depot/projects/ctsrd/cheribsd/src/sys/mips/mips/exception.S#11 (text+ko) ====
@@ -505,7 +505,7 @@
/*
* Note: This saves EPCC, matching the explicit EPC save above.
*/
- SAVE_CHERI_CONTEXT(k1)
+ SAVE_CHERI_CONTEXT(k1, t0)
#endif
REG_S a3, CALLFRAME_RA(sp) # for debugging
PTR_LA gp, _C_LABEL(_gp) # switch to kernel GP
@@ -560,7 +560,7 @@
/*
* Note: This restores EPCC, matching the explicit EPC restore below.
*/
- RESTORE_CHERI_CONTEXT(k1)
+ RESTORE_CHERI_CONTEXT(k1, t0)
#endif
RESTORE_U_PCB_REG(t0, MULLO, k1)
RESTORE_U_PCB_REG(t1, MULHI, k1)
@@ -786,7 +786,7 @@
/*
* Note: This saves EPCC, matching the explicit EPC save above.
*/
- SAVE_CHERI_CONTEXT(k1)
+ SAVE_CHERI_CONTEXT(k1, t0)
#endif
PTR_SUBU sp, k1, CALLFRAME_SIZ # switch to kernel SP
PTR_LA gp, _C_LABEL(_gp) # switch to kernel GP
@@ -850,7 +850,7 @@
/*
* Note: This restores EPCC, matching the explicit EPC restore below.
*/
- RESTORE_CHERI_CONTEXT(k1)
+ RESTORE_CHERI_CONTEXT(k1, t0)
#endif
RESTORE_U_PCB_REG(s0, S0, k1)
RESTORE_U_PCB_REG(s1, S1, k1)
==== //depot/projects/ctsrd/cheribsd/src/sys/mips/mips/swtch.S#10 (text+ko) ====
@@ -124,7 +124,7 @@
/*
* Note: This restores EPCC, matching the explicit EPC restore below.
*/
- RESTORE_CHERI_CONTEXT(k1)
+ RESTORE_CHERI_CONTEXT(k1, t0)
#endif
RESTORE_U_PCB_REG(t0, MULLO, k1)
RESTORE_U_PCB_REG(t1, MULHI, k1)
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