PERFORCE change 213991 for review
John Baldwin
jhb at FreeBSD.org
Fri Jul 6 19:12:27 UTC 2012
http://p4web.freebsd.org/@@213991?ac=10
Change 213991 by jhb at jhb_jhbbsd on 2012/07/06 19:11:59
Add clts() to cpufunc.h and reimplement setting CR0_TS in terms
of load_cr0() and rcr0() rather than using lmsw and smsw
(Intel discourages use of smsw and lmsw on 386 and newer
processors).
Affected files ...
.. //depot/projects/smpng/sys/amd64/amd64/fpu.c#25 edit
.. //depot/projects/smpng/sys/amd64/include/cpufunc.h#28 edit
.. //depot/projects/smpng/sys/i386/include/cpufunc.h#49 edit
.. //depot/projects/smpng/sys/i386/isa/npx.c#75 edit
Differences ...
==== //depot/projects/smpng/sys/amd64/amd64/fpu.c#25 (text+ko) ====
@@ -73,10 +73,6 @@
#define fxrstor(addr) __asm __volatile("fxrstor %0" : : "m" (*(addr)))
#define fxsave(addr) __asm __volatile("fxsave %0" : "=m" (*(addr)))
#define ldmxcsr(csr) __asm __volatile("ldmxcsr %0" : : "m" (csr))
-#define start_emulating() __asm __volatile( \
- "smsw %%ax; orb %0,%%al; lmsw %%ax" \
- : : "n" (CR0_TS) : "ax")
-#define stop_emulating() __asm __volatile("clts")
static __inline void
xrstor(char *addr, uint64_t mask)
@@ -109,13 +105,14 @@
void fxsave(caddr_t addr);
void fxrstor(caddr_t addr);
void ldmxcsr(u_int csr);
-void start_emulating(void);
-void stop_emulating(void);
void xrstor(char *addr, uint64_t mask);
void xsave(char *addr, uint64_t mask);
#endif /* __GNUCLIKE_ASM && !lint */
+#define start_emulating() load_cr0(rcr0() | CR0_TS)
+#define stop_emulating() clts()
+
#define GET_FPU_CW(thread) ((thread)->td_pcb->pcb_save->sv_env.en_cw)
#define GET_FPU_SW(thread) ((thread)->td_pcb->pcb_save->sv_env.en_sw)
==== //depot/projects/smpng/sys/amd64/include/cpufunc.h#28 (text+ko) ====
@@ -109,6 +109,13 @@
}
static __inline void
+clts(void)
+{
+
+ __asm __volatile("clts");
+}
+
+static __inline void
disable_intr(void)
{
__asm __volatile("cli" : : : "memory");
@@ -705,6 +712,9 @@
int breakpoint(void);
u_int bsfl(u_int mask);
u_int bsrl(u_int mask);
+void clflush(u_long addr);
+void clts(void);
+void cpuid_count(u_int ax, u_int cx, u_int *p);
void disable_intr(void);
void do_cpuid(u_int ax, u_int *p);
void enable_intr(void);
==== //depot/projects/smpng/sys/i386/include/cpufunc.h#49 (text+ko) ====
@@ -99,6 +99,13 @@
}
static __inline void
+clts(void)
+{
+
+ __asm __volatile("clts");
+}
+
+static __inline void
disable_intr(void)
{
#ifdef XEN
@@ -691,6 +698,9 @@
int breakpoint(void);
u_int bsfl(u_int mask);
u_int bsrl(u_int mask);
+void clflush(u_long addr);
+void clts(void);
+void cpuid_count(u_int ax, u_int cx, u_int *p);
void disable_intr(void);
void do_cpuid(u_int ax, u_int *p);
void enable_intr(void);
==== //depot/projects/smpng/sys/i386/isa/npx.c#75 (text+ko) ====
@@ -100,15 +100,6 @@
#define fxrstor(addr) __asm __volatile("fxrstor %0" : : "m" (*(addr)))
#define fxsave(addr) __asm __volatile("fxsave %0" : "=m" (*(addr)))
#endif
-#ifdef XEN
-#define start_emulating() (HYPERVISOR_fpu_taskswitch(1))
-#define stop_emulating() (HYPERVISOR_fpu_taskswitch(0))
-#else
-#define start_emulating() __asm __volatile( \
- "smsw %%ax; orb %0,%%al; lmsw %%ax" \
- : : "n" (CR0_TS) : "ax")
-#define stop_emulating() __asm __volatile("clts")
-#endif
#else /* !(__GNUCLIKE_ASM && !lint) */
void fldcw(u_short cw);
@@ -123,11 +114,17 @@
void fxsave(caddr_t addr);
void fxrstor(caddr_t addr);
#endif
-void start_emulating(void);
-void stop_emulating(void);
#endif /* __GNUCLIKE_ASM && !lint */
+#ifdef XEN
+#define start_emulating() (HYPERVISOR_fpu_taskswitch(1))
+#define stop_emulating() (HYPERVISOR_fpu_taskswitch(0))
+#else
+#define start_emulating() load_cr0(rcr0() | CR0_TS)
+#define stop_emulating() clts()
+#endif
+
#ifdef CPU_ENABLE_SSE
#define GET_FPU_CW(thread) \
(cpu_fxsr ? \
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