PERFORCE change 194102 for review
Jakub Wojciech Klama
jceel at FreeBSD.org
Thu Jun 2 11:26:24 UTC 2011
http://p4web.freebsd.org/@@194102?ac=10
Change 194102 by jceel at jceel on 2011/06/02 11:25:41
Initial port version, able to boot into single-user mode
with compiled-in memory disk. Peripherals working:
* UART
* Interrupt controller
* Timers
Affected files ...
.. //depot/projects/soc2011/jceel_lpc/Milestones#1 add
.. //depot/projects/soc2011/jceel_lpc/sys/arm/arm/locore.S#2 edit
.. //depot/projects/soc2011/jceel_lpc/sys/arm/arm/locore.S.orig#1 add
.. //depot/projects/soc2011/jceel_lpc/sys/arm/conf/EA3250#1 add
.. //depot/projects/soc2011/jceel_lpc/sys/arm/conf/EA3250.orig#1 add
.. //depot/projects/soc2011/jceel_lpc/sys/arm/lpc/files.lpc#1 add
.. //depot/projects/soc2011/jceel_lpc/sys/arm/lpc/files.lpc.orig#1 add
.. //depot/projects/soc2011/jceel_lpc/sys/arm/lpc/if_lpe.c#1 add
.. //depot/projects/soc2011/jceel_lpc/sys/arm/lpc/if_lpe.c.orig#1 add
.. //depot/projects/soc2011/jceel_lpc/sys/arm/lpc/if_lpereg.h#1 add
.. //depot/projects/soc2011/jceel_lpc/sys/arm/lpc/if_lpereg.h.orig#1 add
.. //depot/projects/soc2011/jceel_lpc/sys/arm/lpc/lpc_gpio.c#1 add
.. //depot/projects/soc2011/jceel_lpc/sys/arm/lpc/lpc_gpio.c.orig#1 add
.. //depot/projects/soc2011/jceel_lpc/sys/arm/lpc/lpc_intc.c#1 add
.. //depot/projects/soc2011/jceel_lpc/sys/arm/lpc/lpc_intc.c.orig#1 add
.. //depot/projects/soc2011/jceel_lpc/sys/arm/lpc/lpc_machdep.c#1 add
.. //depot/projects/soc2011/jceel_lpc/sys/arm/lpc/lpc_machdep.c.orig#1 add
.. //depot/projects/soc2011/jceel_lpc/sys/arm/lpc/lpc_ohci.c#1 add
.. //depot/projects/soc2011/jceel_lpc/sys/arm/lpc/lpc_ohci.c.orig#1 add
.. //depot/projects/soc2011/jceel_lpc/sys/arm/lpc/lpc_pll.c#1 add
.. //depot/projects/soc2011/jceel_lpc/sys/arm/lpc/lpc_pll.c.orig#1 add
.. //depot/projects/soc2011/jceel_lpc/sys/arm/lpc/lpc_pwr.c#1 add
.. //depot/projects/soc2011/jceel_lpc/sys/arm/lpc/lpc_pwr.c.orig#1 add
.. //depot/projects/soc2011/jceel_lpc/sys/arm/lpc/lpc_rtc.c#1 add
.. //depot/projects/soc2011/jceel_lpc/sys/arm/lpc/lpc_rtc.c.orig#1 add
.. //depot/projects/soc2011/jceel_lpc/sys/arm/lpc/lpc_space.c#1 add
.. //depot/projects/soc2011/jceel_lpc/sys/arm/lpc/lpc_space.c.orig#1 add
.. //depot/projects/soc2011/jceel_lpc/sys/arm/lpc/lpc_timer.c#1 add
.. //depot/projects/soc2011/jceel_lpc/sys/arm/lpc/lpc_timer.c.orig#1 add
.. //depot/projects/soc2011/jceel_lpc/sys/arm/lpc/lpcreg.h#1 add
.. //depot/projects/soc2011/jceel_lpc/sys/arm/lpc/lpcreg.h.orig#1 add
.. //depot/projects/soc2011/jceel_lpc/sys/arm/lpc/lpcvar.h#1 add
.. //depot/projects/soc2011/jceel_lpc/sys/arm/lpc/lpcvar.h.orig#1 add
.. //depot/projects/soc2011/jceel_lpc/sys/arm/lpc/std.lpc#1 add
.. //depot/projects/soc2011/jceel_lpc/sys/arm/lpc/std.lpc.orig#1 add
.. //depot/projects/soc2011/jceel_lpc/sys/boot/fdt/dts/ea3250.dts#1 add
.. //depot/projects/soc2011/jceel_lpc/sys/boot/fdt/dts/ea3250.dts.orig#1 add
.. //depot/projects/soc2011/jceel_lpc/sys/dev/uart/uart_dev_ns8250.c#2 edit
.. //depot/projects/soc2011/jceel_lpc/sys/dev/uart/uart_tty.c#2 edit
.. //depot/projects/soc2011/jceel_lpc/sys/dev/uart/uart_tty.c.orig#1 add
Differences ...
==== //depot/projects/soc2011/jceel_lpc/sys/arm/arm/locore.S#2 (text+ko) ====
@@ -71,6 +71,10 @@
* r1 - if (r0 == 0) then metadata pointer
*/
ASENTRY_NP(_start)
+ ldr r6, =0x40090000
+ ldr r7, =0x61
+ str r7, [r6]
+
/* Move metadata ptr to r12 (ip) */
mov ip, r0
@@ -134,6 +138,13 @@
bic r2, r2, #(CPU_CONTROL_BPRD_ENABLE)
mcr p15, 0, r2, c1, c0, 0
+
+
+ ldr r0, =0x40090000
+ ldr r1, =0x62
+ str r1, [r0]
+
+
nop
nop
nop
@@ -145,6 +156,7 @@
adr r4, mmu_init_table
b 3f
+
2:
str r3, [r0, r2]
add r2, r2, #4
@@ -159,6 +171,10 @@
orrne r5, r5, #PHYSADDR
movne pc, r5
+ ldr r6, =0x40090000
+ ldr r7, =0x64
+ str r7, [r6]
+
mcr p15, 0, r0, c2, c0, 0 /* Set TTB */
mcr p15, 0, r0, c8, c7, 0 /* Flush TLB */
@@ -176,6 +192,10 @@
#endif
mmu_done:
+ ldr r0, =0xd0090000
+ ldr r1, =0x66
+ str r1, [r0]
+
nop
adr r1, .Lstart
ldmia r1, {r1, r2, sp} /* Set initial stack and */
@@ -185,9 +205,19 @@
str r3, [r1], #0x0004 /* get zero init data */
subs r2, r2, #4
bgt .L1
+
+ ldr r0, =0xd0090000
+ ldr r1, =0x68
+ str r1, [r0]
+
+
ldr pc, .Lvirt_done
virt_done:
+ ldr r6, =0xd0090000
+ ldr r7, =0x67
+ str r7, [r6]
+
mov r0, ip /* Load argument: metadata ptr */
mov fp, #0 /* trace back starts here */
@@ -223,7 +253,7 @@
MMU_INIT(PHYSADDR, PHYSADDR , 64, L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW))
/* map VA 0xc0000000..0xc3ffffff to PA */
MMU_INIT(KERNBASE, PHYSADDR, 64, L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW))
-
+ MMU_INIT(0xd0000000, 0x40000000, 64, L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW))
.word 0 /* end of table */
#endif
.Lstart:
==== //depot/projects/soc2011/jceel_lpc/sys/dev/uart/uart_dev_ns8250.c#2 (text+ko) ====
@@ -240,8 +240,10 @@
/* Check known 0 bits that don't depend on DLAB. */
val = uart_getreg(bas, REG_IIR);
+#if 0
if (val & 0x30)
return (ENXIO);
+#endif
/*
* Bit 6 of the MCR (= 0x40) appears to be 1 for the Sun1699
* chip, but otherwise doesn't seem to have a function. In
==== //depot/projects/soc2011/jceel_lpc/sys/dev/uart/uart_tty.c#2 (text+ko) ====
@@ -59,6 +59,8 @@
static struct uart_devinfo uart_console;
+extern void lpc_early_puts(char *);
+
static void
uart_cnprobe(struct consdev *cp)
{
@@ -70,9 +72,13 @@
if (uart_cpu_getdev(UART_DEV_CONSOLE, &uart_console))
return;
+ lpc_early_puts("cnprobe: uart_cpu_getdev() done\r\n");
+
if (uart_probe(&uart_console))
return;
+ lpc_early_puts("cnprobe: uart_probe() done\r\n");
+
strlcpy(cp->cn_name, uart_driver_name, sizeof(cp->cn_name));
cp->cn_pri = (boothowto & RB_SERIAL) ? CN_REMOTE : CN_NORMAL;
cp->cn_arg = &uart_console;
@@ -97,7 +103,12 @@
di->cookie = cp;
di->type = UART_DEV_CONSOLE;
uart_add_sysdev(di);
+
+lpc_early_puts("cninit: uart_add_sysdev() done\r\n");
+
uart_init(di);
+
+ lpc_early_puts("cninit: uart_cninit() done\r\n");
}
static void
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