PERFORCE change 176973 for review
Alexander Motin
mav at FreeBSD.org
Fri Apr 16 16:37:49 UTC 2010
http://p4web.freebsd.org/@@176973?ac=10
Change 176973 by mav at mav_mavtest on 2010/04/16 16:37:45
NCQ and PMP working, timeout handling compiles,
error handling still missing.
Affected files ...
.. //depot/projects/scottl-camlock/src/sys/dev/mvs/mvs.c#2 edit
.. //depot/projects/scottl-camlock/src/sys/dev/mvs/mvs.h#2 edit
Differences ...
==== //depot/projects/scottl-camlock/src/sys/dev/mvs/mvs.c#2 (text+ko) ====
@@ -85,9 +85,7 @@
static void mvs_crbq_intr(device_t dev);
static void mvs_begin_transaction(device_t dev, union ccb *ccb);
static void mvs_legacy_execute_transaction(struct mvs_slot *slot);
-#if 0
static void mvs_timeout(struct mvs_slot *slot);
-#endif
static void mvs_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error);
static void mvs_execute_transaction(struct mvs_slot *slot);
static void mvs_end_transaction(struct mvs_slot *slot, enum mvs_err_type et);
@@ -189,6 +187,16 @@
rman_fini(&ctlr->sc_iomem);
return ENXIO;
}
+ device_printf(dev,
+ "Gen-%s, %d %sGbps ports, Port Multiplier %s%s\n",
+ ((ctlr->quirks & MVS_Q_GENI) ? "I" :
+ ((ctlr->quirks & MVS_Q_GENII) ? "II" : "IIe")),
+ ctlr->channels,
+ ((ctlr->quirks & MVS_Q_GENI) ? "1.5" : "3"),
+ ((ctlr->quirks & MVS_Q_GENI) ?
+ "not supported" : "supported"),
+ ((ctlr->quirks & MVS_Q_GENIIE) ?
+ " with FBS" : ""));
/* Attach all channels on this controller */
for (unit = 0; unit < ctlr->channels; unit++) {
child = device_add_child(dev, "mvsch", -1);
@@ -828,11 +836,18 @@
};
}
ch->curr_mode = mode;
+ ch->fbs_enabled = 0;
if (mode == MVS_EDMA_OFF)
return;
/* Configure new mode. */
-// reg = ATA_INL(ch->r_mem, EDMA_CFG);
- reg = EDMA_CFG_RESERVED | EDMA_CFG_RESERVED2;
+ reg = EDMA_CFG_RESERVED | EDMA_CFG_RESERVED2 | EDMA_CFG_EHOSTQUEUECACHEEN;
+ if (ch->pm_present) {
+ reg |= EDMA_CFG_EMASKRXPM;
+ if (ch->quirks & MVS_Q_GENIIE) {
+ reg |= EDMA_CFG_EEDMAFBS | EDMA_CFG_EDMAFBS;
+ ch->fbs_enabled = 1;
+ }
+ }
reg |= 1 << 24;
// reg |= 1 << 22;
reg &= ~(EDMA_CFG_ESATANATVCMDQUE | EDMA_CFG_EQUE);
@@ -957,8 +972,8 @@
struct mvs_channel *ch = device_get_softc(dev);
uint32_t iec, serr = 0, fisic = 0;
-device_printf(dev, "irq cause %02x IEC %08x\n",
- arg->cause, ATA_INL(ch->r_mem, EDMA_IEC));
+//device_printf(dev, "irq cause %02x IEC %08x\n",
+// arg->cause, ATA_INL(ch->r_mem, EDMA_IEC));
if ((ch->numtslots != 0 || ch->numdslots != 0) && (arg->cause & 2))
mvs_crbq_intr(dev);
if (arg->cause & 1) {
@@ -1224,13 +1239,14 @@
(ch->dma.workrp + MVS_CRPB_OFFSET + (MVS_CRPB_SIZE * ch->in_idx));
slot = le16toh(crpb->id) & MVS_CRPB_TAG_MASK;
if (ch->slot[slot].state >= MVS_SLOT_RUNNING) {
+//device_printf(dev, "CRPB %d %d %04x\n", ch->in_idx, slot, le16toh(crpb->rspflg));
flags = le16toh(crpb->rspflg);
ccb = ch->slot[slot].ccb;
ccb->ataio.res.status = (flags & MVS_CRPB_ATASTS_MASK) >>
MVS_CRPB_ATASTS_SHIFT;
mvs_end_transaction(&ch->slot[slot], MVS_ERR_NONE);
} else
-device_printf(dev, "EMPTY CRPB %d %p %d %04x %04x\n", ch->in_idx, crpb, slot, le16toh(crpb->id), le16toh(crpb->rspflg));
+device_printf(dev, "EMPTY CRPB %d %d %04x\n", ch->in_idx, slot, le16toh(crpb->rspflg));
ch->in_idx = (ch->in_idx + 1) & (MVS_MAX_SLOTS - 1);
}
@@ -1253,7 +1269,7 @@
if (ch->numdslots != 0)
return (1);
/* Can't mix NCQ and PIO commands. */
- if (ch->numrslots != 0 && ch->numtslots == 0)
+ if (ch->numpslots != 0)
return (1);
/* If we have no FBS */
if (!ch->fbs_enabled) {
@@ -1268,7 +1284,7 @@
if (ch->numtslots != 0)
return (1);
/* Can't mix non-NCQ DMA and PIO commands. */
- if (ch->numrslots != 0 && ch->numdslots == 0)
+ if (ch->numpslots != 0)
return (1);
/* PIO */
} else {
@@ -1413,8 +1429,8 @@
union ccb *ccb = slot->ccb;
int port = ccb->ccb_h.target_id & 0x0f;
- device_printf(dev, "Legacy command %02x size %d\n",
- ccb->ataio.cmd.command, ccb->ataio.dxfer_len);
+ device_printf(dev, "%d Legacy command %02x size %d\n",
+ port, ccb->ataio.cmd.command, ccb->ataio.dxfer_len);
slot->state = MVS_SLOT_RUNNING;
ch->rslots |= (1 << slot->slot);
ATA_OUTB(ch->r_mem, SATA_SATAICTL, port << SATA_SATAICTL_PMPTX_SHIFT);
@@ -1494,8 +1510,8 @@
int port = ccb->ccb_h.target_id & 0x0f;
int i;
- device_printf(dev, "EDMA command %02x size %d slot %d tag %d\n",
- ccb->ataio.cmd.command, ccb->ataio.dxfer_len, slot->slot, slot->tag);
+// device_printf(dev, "%d EDMA command %02x size %d (%p) slot %d tag %d\n",
+// port, ccb->ataio.cmd.command, ccb->ataio.dxfer_len, ccb->ataio.data_ptr, slot->slot, slot->tag);
/* Get address of the prepared EPRD */
eprd = ch->dma.workrq_bus + MVS_EPRD_OFFSET + (MVS_EPRD_SIZE * slot->slot);
/* Prepare CRQB. Gen IIe uses different CRQB format. */
@@ -1588,12 +1604,11 @@
ATA_OUTL(ch->r_mem, EDMA_REQQIP,
ch->dma.workrq_bus + MVS_CRQB_OFFSET + (MVS_CRQB_SIZE * ch->out_idx));
/* Start command execution timeout */
-// callout_reset(&slot->timeout, (int)ccb->ccb_h.timeout * hz / 2000,
-// (timeout_t*)mvs_timeout, slot);
+ callout_reset(&slot->timeout, (int)ccb->ccb_h.timeout * hz / 2000,
+ (timeout_t*)mvs_timeout, slot);
return;
}
-#if 0
/* Must be called with channel locked. */
static void
mvs_process_timeout(device_t dev)
@@ -1639,14 +1654,14 @@
{
device_t dev = slot->dev;
struct mvs_channel *ch = device_get_softc(dev);
- uint32_t sstatus;
- int ccs;
+// uint32_t sstatus;
+// int ccs;
int i;
/* Check for stale timeout. */
if (slot->state < MVS_SLOT_RUNNING)
return;
-
+#if 0
/* Check if slot was not being executed last time we checked. */
if (slot->state < MVS_SLOT_EXECUTING) {
/* Check if slot started executing. */
@@ -1662,12 +1677,12 @@
(timeout_t*)mvs_timeout, slot);
return;
}
-
+#endif
device_printf(dev, "Timeout on slot %d\n", slot->slot);
- device_printf(dev, "is %08x cs %08x ss %08x rs %08x tfd %02x serr %08x\n",
- ATA_INL(ch->r_mem, MVS_P_IS), ATA_INL(ch->r_mem, MVS_P_CI),
- ATA_INL(ch->r_mem, MVS_P_SACT), ch->rslots,
- ATA_INL(ch->r_mem, ATA_ALTSTAT), ATA_INL(ch->r_mem, SATA_SE));
+ device_printf(dev, "ic %08x iec %08x edma_s %08x dma_c %08x dma_s %08x rs %08x tfd %02x serr %08x\n",
+ ATA_INL(ch->r_mem, HC_IC), ATA_INL(ch->r_mem, EDMA_IEC),
+ ATA_INL(ch->r_mem, EDMA_S), ATA_INL(ch->r_mem, DMA_C), ATA_INL(ch->r_mem, DMA_S), ch->rslots,
+ ATA_INB(ch->r_mem, ATA_ALTSTAT), ATA_INL(ch->r_mem, SATA_SE));
/* Handle frozen command. */
if (ch->frozen) {
@@ -1680,7 +1695,7 @@
}
xpt_done(fccb);
}
- if (!ch->fbs_enabled) {
+ if (ch->fbs_enabled == 0 || ch->pm_present == 0) {
/* Without FBS we know real timeout source. */
ch->fatalerr = 1;
/* Handle command with timeout. */
@@ -1704,7 +1719,6 @@
ch->rslots & ~ch->toslots);
}
}
-#endif
/* Must be called with channel locked. */
static void
@@ -1714,8 +1728,7 @@
struct mvs_channel *ch = device_get_softc(dev);
union ccb *ccb = slot->ccb;
-#if 0
- bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map,
+ bus_dmamap_sync(ch->dma.workrq_tag, ch->dma.workrq_map,
BUS_DMASYNC_POSTWRITE);
/* Read result registers to the result struct
* May be incorrect if several commands finished same time,
@@ -1726,33 +1739,10 @@
if ((et == MVS_ERR_TFE) ||
(ccb->ataio.cmd.flags & CAM_ATAIO_NEEDRESULT)) {
- u_int8_t *fis = ch->dma.rfis + 0x40;
-
- bus_dmamap_sync(ch->dma.rfis_tag, ch->dma.rfis_map,
- BUS_DMASYNC_POSTREAD);
- if (ch->fbs_enabled) {
- fis += ccb->ccb_h.target_id * 256;
- res->status = fis[2];
- res->error = fis[3];
- } else {
- uint16_t tfd = ATA_INL(ch->r_mem, ATA_ALTSTAT);
-
- res->status = tfd;
- res->error = tfd >> 8;
- }
- res->lba_low = fis[4];
- res->lba_mid = fis[5];
- res->lba_high = fis[6];
- res->device = fis[7];
- res->lba_low_exp = fis[8];
- res->lba_mid_exp = fis[9];
- res->lba_high_exp = fis[10];
- res->sector_count = fis[12];
- res->sector_count_exp = fis[13];
+ mvs_tfd_read(dev, ccb);
} else
bzero(res, sizeof(*res));
}
-#endif
if (ch->numpslots == 0) {
if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map,
@@ -1871,9 +1861,9 @@
mvs_issue_read_log(dev);
}
/* If all the rest of commands are in timeout - give them chance. */
- }// else if ((ch->rslots & ~ch->toslots) == 0 &&
- // et != MVS_ERR_TIMEOUT)
- // mvs_rearm_timeout(dev);
+ } else if ((ch->rslots & ~ch->toslots) == 0 &&
+ et != MVS_ERR_TIMEOUT)
+ mvs_rearm_timeout(dev);
/* Start PM timer. */
if (ch->numrslots == 0 && ch->pm_level > 3) {
callout_schedule(&ch->pm_timer,
@@ -2322,7 +2312,7 @@
cpi->version_num = 1; /* XXX??? */
cpi->hba_inquiry = PI_SDTR_ABLE;
if (!(ch->quirks & MVS_Q_GENI))
- cpi->hba_inquiry |=/* PI_TAG_ABLE |*/ PI_SATAPM;
+ cpi->hba_inquiry |= PI_TAG_ABLE | PI_SATAPM;
cpi->target_sprt = 0;
cpi->hba_misc = PIM_SEQSCAN;
cpi->hba_eng_cnt = 0;
==== //depot/projects/scottl-camlock/src/sys/dev/mvs/mvs.h#2 (text+ko) ====
@@ -350,6 +350,11 @@
#define MVS_MAX_PORTS 8
#define MVS_MAX_SLOTS 32
+/* Just to be sure, if building as module. */
+#if MAXPHYS < 512 * 1024
+#undef MAXPHYS
+#define MAXPHYS 512 * 1024
+#endif
/* Pessimistic prognosis on number of required S/G entries */
#define MVS_SG_ENTRIES (btoc(MAXPHYS) + 1)
More information about the p4-projects
mailing list