PERFORCE change 176619 for review
Rafal Jaworowski
raj at FreeBSD.org
Wed Apr 7 14:58:23 UTC 2010
http://p4web.freebsd.org/@@176619?ac=10
Change 176619 by raj at raj_fdt on 2010/04/07 14:58:04
Improve FDT infrastructure
o Handle /memory node (providing info about available memory) and
eliminate using legacy bootinfo data (both in loader and kernel).
o Better PM state management for Marvell ARM.
o Further eliminate #defines usage in favour of DT-retrieved data.
o Fix a number of minor bugs and issues.
Affected files ...
.. //depot/projects/fdt/sys/arm/include/bootinfo.h#2 edit
.. //depot/projects/fdt/sys/arm/include/fdt.h#4 edit
.. //depot/projects/fdt/sys/arm/mv/common.c#9 edit
.. //depot/projects/fdt/sys/arm/mv/mv_machdep.c#12 edit
.. //depot/projects/fdt/sys/arm/mv/mvreg.h#3 edit
.. //depot/projects/fdt/sys/arm/mv/mvvar.h#7 edit
.. //depot/projects/fdt/sys/arm/mv/mvwin.h#5 edit
.. //depot/projects/fdt/sys/boot/fdt/fdt_loader_cmd.c#2 edit
.. //depot/projects/fdt/sys/boot/uboot/common/metadata.c#5 edit
.. //depot/projects/fdt/sys/dev/fdt/fdt_common.c#13 edit
.. //depot/projects/fdt/sys/dev/fdt/fdt_common.h#11 edit
.. //depot/projects/fdt/sys/dev/fdt/simplebus.c#9 edit
.. //depot/projects/fdt/sys/powerpc/booke/machdep.c#9 edit
.. //depot/projects/fdt/sys/powerpc/booke/platform_bare.c#5 edit
.. //depot/projects/fdt/sys/powerpc/booke/pmap.c#3 edit
.. //depot/projects/fdt/sys/powerpc/include/bootinfo.h#3 edit
.. //depot/projects/fdt/sys/powerpc/include/fdt.h#3 edit
Differences ...
==== //depot/projects/fdt/sys/arm/include/bootinfo.h#2 (text+ko) ====
@@ -34,39 +34,15 @@
#define BI_VERSION 1
-struct bi_mem_region {
- vm_paddr_t mem_base;
- vm_size_t mem_size;
-};
-
-struct bi_eth_addr {
- u_int8_t mac_addr[6];
- u_int8_t padding[2];
-};
-
struct bootinfo {
u_int32_t bi_version;
vm_offset_t bi_bar_base;
u_int32_t bi_cpu_clk;
u_int32_t bi_bus_clk;
- u_int8_t bi_mem_reg_no;
- u_int8_t bi_eth_addr_no;
- u_int8_t padding[2];
-
- u_int8_t bi_data[1];
- /*
- * The bi_data container is allocated in run time and has the
- * following layout:
- *
- * - bi_mem_reg_no elements of struct bi_mem_region
- * - bi_eth_addr_no elements of struct bi_eth_addr
- */
};
extern struct bootinfo *bootinfo;
-struct bi_mem_region *bootinfo_mr(void);
-struct bi_eth_addr *bootinfo_eth(void);
#endif
#endif /* _MACHINE_BOOTINFO_H_ */
==== //depot/projects/fdt/sys/arm/include/fdt.h#4 (text+ko) ====
@@ -30,6 +30,7 @@
*/
#ifndef _MACHINE_FDT_H_
+#define _MACHINE_FDT_H_
#include <dev/ofw/openfirm.h>
@@ -56,6 +57,11 @@
*/
#define fdtbus_bs_tag obio_tag
+struct mem_region {
+ vm_offset_t mr_start;
+ vm_size_t mr_size;
+};
+
int fdt_pci_devmap(phandle_t, struct pmap_devmap *devmap, vm_offset_t,
vm_offset_t);
==== //depot/projects/fdt/sys/arm/mv/common.c#9 (text+ko) ====
@@ -59,6 +59,12 @@
#define debugf(fmt, args...)
#endif
+#ifdef DEBUG
+#define MV_DUMP_WIN 1
+#else
+#define MV_DUMP_WIN 0
+#endif
+
static int win_eth_can_remap(int i);
static int decode_win_cpu_valid(void);
@@ -67,73 +73,76 @@
static int decode_win_pcie_valid(void);
static int decode_win_sata_valid(void);
static int decode_win_cesa_valid(void);
+static int decode_win_idma_valid(void);
+static int decode_win_xor_valid(void);
static void decode_win_cpu_setup(void);
-static void decode_win_usb_setup(void);
-static void decode_win_eth_setup(uint32_t);
-static void decode_win_pcie_setup(uint32_t);
-static void decode_win_sata_setup(void);
-static void decode_win_cesa_setup(void);
+static void decode_win_usb_setup(u_long);
+static void decode_win_eth_setup(u_long);
+static void decode_win_pcie_setup(u_long);
+static void decode_win_sata_setup(u_long);
+static void decode_win_cesa_setup(u_long);
+static void decode_win_idma_setup(u_long);
+static void decode_win_xor_setup(u_long);
-static void decode_win_cesa_dump(void);
-static void decode_win_usb_dump(void);
+static void decode_win_cesa_dump(u_long);
+static void decode_win_usb_dump(u_long);
+static void decode_win_eth_dump(u_long base);
+static void decode_win_idma_dump(u_long base);
+static void decode_win_xor_dump(u_long base);
static int fdt_get_ranges(const char *, void *, int, int *, int *);
static int win_cpu_from_dt(void);
-static int win_soc_from_dt(void);
+static int fdt_win_setup(void);
static uint32_t used_cpu_wins;
+static uint32_t dev_mask = 0;
static int cpu_wins_no = 0;
+static int eth_port = 0;
static struct decode_win cpu_win_tbl[MAX_CPU_WIN];
-u_long cesa_base = 0;
-u_long usb0_base = 0;
-u_long eth0_base = 0;
-u_long sata0_base = 0;
-u_long idma0_base = 0;
-u_long xor0_base = 0;
+static const struct decode_win *cpu_wins = cpu_win_tbl;
-static const struct decode_win *cpu_wins = cpu_win_tbl;
+typedef void (*decode_win_setup_t)(u_long);
+typedef void (*dump_win_t)(u_long);
struct soc_node_spec {
- const char *compat;
- u_long *base;
+ const char *compat;
+ decode_win_setup_t decode_handler;
+ dump_win_t dump_handler;
};
static struct soc_node_spec soc_nodes[] = {
- { "mrvl,cesa", &cesa_base },
- { "mrvl,ge", ð0_base },
- { "mrvl,usb-ehci", &usb0_base },
- { "mrvl,sata", &sata0_base },
- { "mrvl,xor", &xor0_base},
- { "mrvl,idma", &idma0_base},
- { NULL, NULL },
+ { "mrvl,cesa", &decode_win_cesa_setup, &decode_win_cesa_dump },
+ { "mrvl,ge", &decode_win_eth_setup, &decode_win_eth_dump },
+ { "mrvl,usb-ehci", &decode_win_usb_setup, &decode_win_usb_dump },
+ { "mrvl,sata", &decode_win_sata_setup, NULL },
+ { "mrvl,xor", &decode_win_xor_setup, &decode_win_xor_dump },
+ { "mrvl,idma", &decode_win_idma_setup, &decode_win_idma_dump },
+ { "mvrl,pcie", &decode_win_pcie_setup, NULL },
+ { NULL, NULL, NULL },
+};
+
+struct fdt_pm_mask_entry fdt_pm_mask_table[] = {
+ { "mrvl,ge", CPU_PM_CTRL_GE(0) },
+ { "mrvl,ge", CPU_PM_CTRL_GE(1) },
+ { "mrvl,usb-ehci", CPU_PM_CTRL_USB(0) },
+ { "mrvl,usb-ehci", CPU_PM_CTRL_USB(1) },
+ { "mrvl,usb-ehci", CPU_PM_CTRL_USB(2) },
+ { "mrvl,cesa", CPU_PM_CTRL_CRYPTO },
+ { "mrvl,xor", CPU_PM_CTRL_XOR },
+ { "mrvl,sata", CPU_PM_CTRL_SATA },
+
+ { NULL, 0 }
};
static __inline int
pm_is_disabled(uint32_t mask)
{
-#if 0
return (soc_power_ctrl_get(mask) == mask ? 0 : 1);
-#endif
- return (1);
-}
-
-static __inline uint32_t
-obio_get_pm_mask(uint32_t base)
-{
-#if 0
- struct obio_device *od;
-
- for (od = obio_devices; od->od_name != NULL; od++)
- if (od->od_base == base)
- return (od->od_pwr_mask);
-#endif
-
- return (CPU_PM_CTRL_NONE);
}
/*
@@ -187,6 +196,33 @@
#endif
}
+int
+fdt_pm(phandle_t node)
+{
+ uint32_t cpu_pm_ctrl;
+ int i, ena, compat;
+
+ ena = 1;
+ cpu_pm_ctrl = read_cpu_ctrl(CPU_PM_CTRL);
+ for (i = 0; fdt_pm_mask_table[i].compat != NULL; i++) {
+ if (dev_mask & (1 << i))
+ continue;
+
+ compat = fdt_is_compatible(node, fdt_pm_mask_table[i].compat);
+
+ if (compat && (~cpu_pm_ctrl & fdt_pm_mask_table[i].mask)) {
+ dev_mask |= (1 << i);
+ ena = 0;
+ break;
+ } else if (compat) {
+ dev_mask |= (1 << i);
+ break;
+ }
+ }
+
+ return (ena);
+}
+
uint32_t
read_cpu_ctrl(uint32_t reg)
{
@@ -314,8 +350,6 @@
rev = "Z0";
else if (r == 2)
rev = "A0";
- else if (r == 3)
- rev = "A1";
break;
case MV_DEV_MV78100_Z0:
dev = "Marvell MV78100 Z0";
@@ -350,17 +384,6 @@
SYSINIT(platform_identify, SI_SUB_CPU, SI_ORDER_SECOND, platform_identify,
NULL);
-#define MV_USB0_BASE (FDT_IMMR_VA + usb0_base)
-#define MV_CESA_BASE (FDT_IMMR_VA + cesa_base)
-#define MV_ETH0_BASE (FDT_IMMR_VA + eth0_base)
-#define MV_SATAHC_BASE (FDT_IMMR_VA + sata0_base)
-#define MV_XOR_BASE (FDT_IMMR_VA + xor0_base)
-#define MV_IDMA_BASE (FDT_IMMR_VA + idma0_base)
-
-/* XXX these are temporary and should be retrieved from the DT */
-#define MV_USB_AWR_BASE (MV_USB0_BASE + 0x320)
-#define MV_ETH1_BASE (MV_ETH0_BASE + 0x4000)
-
int
soc_decode_win(void)
{
@@ -377,45 +400,23 @@
if ((err = win_cpu_from_dt()) != 0)
return (err);
- if ((err = win_soc_from_dt()) != 0)
- return (err);
-
/* Retrieve our ID: some windows facilities vary between SoC models */
soc_id(&dev, &rev);
if (!decode_win_cpu_valid() || !decode_win_usb_valid() ||
!decode_win_eth_valid() || !decode_win_idma_valid() ||
!decode_win_pcie_valid() || !decode_win_sata_valid() ||
- !decode_win_cesa_valid())
+ !decode_win_cesa_valid() || !decode_win_xor_valid())
return (EINVAL);
decode_win_cpu_setup();
- decode_win_usb_setup();
- decode_win_eth_setup(MV_ETH0_BASE);
- if (dev == MV_DEV_MV78100 || dev == MV_DEV_MV78100_Z0)
- decode_win_eth_setup(MV_ETH1_BASE);
- if (dev == MV_DEV_88F6281 || dev == MV_DEV_MV78100 ||
- dev == MV_DEV_MV78100_Z0)
- decode_win_cesa_setup();
+ if (MV_DUMP_WIN)
+ soc_dump_decode_win();
- decode_win_idma_setup();
- decode_win_xor_setup();
-
- if (dev == MV_DEV_MV78100 || dev == MV_DEV_MV78100_Z0) {
- decode_win_pcie_setup(MV_PCIE00_BASE);
- decode_win_pcie_setup(MV_PCIE01_BASE);
- decode_win_pcie_setup(MV_PCIE02_BASE);
- decode_win_pcie_setup(MV_PCIE03_BASE);
- decode_win_pcie_setup(MV_PCIE10_BASE);
- decode_win_pcie_setup(MV_PCIE11_BASE);
- decode_win_pcie_setup(MV_PCIE12_BASE);
- decode_win_pcie_setup(MV_PCIE13_BASE);
- } else
- decode_win_pcie_setup(MV_PCIE_BASE);
+ eth_port = 0;
+ if ((err = fdt_win_setup()) != 0)
+ return (err);
- if (dev != MV_DEV_88F5281)
- decode_win_sata_setup();
-
return (0);
}
@@ -434,15 +435,15 @@
WIN_REG_IDX_RD(ddr, br, MV_WIN_DDR_BASE, MV_DDR_CADR_BASE)
WIN_REG_IDX_RD(ddr, sz, MV_WIN_DDR_SIZE, MV_DDR_CADR_BASE)
-WIN_REG_IDX_RD2(win_usb, cr, MV_WIN_USB_CTRL, MV_USB_AWR_BASE)
-WIN_REG_IDX_RD2(win_usb, br, MV_WIN_USB_BASE, MV_USB_AWR_BASE)
-WIN_REG_IDX_WR2(win_usb, cr, MV_WIN_USB_CTRL, MV_USB_AWR_BASE)
-WIN_REG_IDX_WR2(win_usb, br, MV_WIN_USB_BASE, MV_USB_AWR_BASE)
+WIN_REG_BASE_IDX_RD2(win_usb, cr, MV_WIN_USB_CTRL)
+WIN_REG_BASE_IDX_RD2(win_usb, br, MV_WIN_USB_BASE)
+WIN_REG_BASE_IDX_WR2(win_usb, cr, MV_WIN_USB_CTRL)
+WIN_REG_BASE_IDX_WR2(win_usb, br, MV_WIN_USB_BASE)
-WIN_REG_IDX_RD(win_cesa, cr, MV_WIN_CESA_CTRL, MV_CESA_BASE)
-WIN_REG_IDX_RD(win_cesa, br, MV_WIN_CESA_BASE, MV_CESA_BASE)
-WIN_REG_IDX_WR(win_cesa, cr, MV_WIN_CESA_CTRL, MV_CESA_BASE)
-WIN_REG_IDX_WR(win_cesa, br, MV_WIN_CESA_BASE, MV_CESA_BASE)
+WIN_REG_BASE_IDX_RD(win_cesa, cr, MV_WIN_CESA_CTRL)
+WIN_REG_BASE_IDX_RD(win_cesa, br, MV_WIN_CESA_BASE)
+WIN_REG_BASE_IDX_WR(win_cesa, cr, MV_WIN_CESA_CTRL)
+WIN_REG_BASE_IDX_WR(win_cesa, br, MV_WIN_CESA_BASE)
WIN_REG_BASE_IDX_RD(win_eth, br, MV_WIN_ETH_BASE)
WIN_REG_BASE_IDX_RD(win_eth, sz, MV_WIN_ETH_SIZE)
@@ -451,14 +452,14 @@
WIN_REG_BASE_IDX_WR(win_eth, sz, MV_WIN_ETH_SIZE)
WIN_REG_BASE_IDX_WR(win_eth, har, MV_WIN_ETH_REMAP)
-WIN_REG_IDX_RD2(win_xor, br, MV_WIN_XOR_BASE, MV_XOR_BASE)
-WIN_REG_IDX_RD2(win_xor, sz, MV_WIN_XOR_SIZE, MV_XOR_BASE)
-WIN_REG_IDX_RD2(win_xor, har, MV_WIN_XOR_REMAP, MV_XOR_BASE)
-WIN_REG_IDX_RD2(win_xor, ctrl, MV_WIN_XOR_CTRL, MV_XOR_BASE)
-WIN_REG_IDX_WR2(win_xor, br, MV_WIN_XOR_BASE, MV_XOR_BASE)
-WIN_REG_IDX_WR2(win_xor, sz, MV_WIN_XOR_SIZE, MV_XOR_BASE)
-WIN_REG_IDX_WR2(win_xor, har, MV_WIN_XOR_REMAP, MV_XOR_BASE)
-WIN_REG_IDX_WR2(win_xor, ctrl, MV_WIN_XOR_CTRL, MV_XOR_BASE)
+WIN_REG_BASE_IDX_RD2(win_xor, br, MV_WIN_XOR_BASE)
+WIN_REG_BASE_IDX_RD2(win_xor, sz, MV_WIN_XOR_SIZE)
+WIN_REG_BASE_IDX_RD2(win_xor, har, MV_WIN_XOR_REMAP)
+WIN_REG_BASE_IDX_RD2(win_xor, ctrl, MV_WIN_XOR_CTRL)
+WIN_REG_BASE_IDX_WR2(win_xor, br, MV_WIN_XOR_BASE)
+WIN_REG_BASE_IDX_WR2(win_xor, sz, MV_WIN_XOR_SIZE)
+WIN_REG_BASE_IDX_WR2(win_xor, har, MV_WIN_XOR_REMAP)
+WIN_REG_BASE_IDX_WR2(win_xor, ctrl, MV_WIN_XOR_CTRL)
WIN_REG_BASE_RD(win_eth, bare, 0x290)
WIN_REG_BASE_RD(win_eth, epap, 0x294)
@@ -473,21 +474,21 @@
WIN_REG_BASE_IDX_WR(win_pcie, remap, MV_WIN_PCIE_REMAP);
WIN_REG_BASE_IDX_WR(pcie, bar, MV_PCIE_BAR);
-WIN_REG_IDX_RD(win_idma, br, MV_WIN_IDMA_BASE, MV_IDMA_BASE)
-WIN_REG_IDX_RD(win_idma, sz, MV_WIN_IDMA_SIZE, MV_IDMA_BASE)
-WIN_REG_IDX_RD(win_idma, har, MV_WIN_IDMA_REMAP, MV_IDMA_BASE)
-WIN_REG_IDX_RD(win_idma, cap, MV_WIN_IDMA_CAP, MV_IDMA_BASE)
-WIN_REG_IDX_WR(win_idma, br, MV_WIN_IDMA_BASE, MV_IDMA_BASE)
-WIN_REG_IDX_WR(win_idma, sz, MV_WIN_IDMA_SIZE, MV_IDMA_BASE)
-WIN_REG_IDX_WR(win_idma, har, MV_WIN_IDMA_REMAP, MV_IDMA_BASE)
-WIN_REG_IDX_WR(win_idma, cap, MV_WIN_IDMA_CAP, MV_IDMA_BASE)
-WIN_REG_RD(win_idma, bare, 0xa80, MV_IDMA_BASE)
-WIN_REG_WR(win_idma, bare, 0xa80, MV_IDMA_BASE)
+WIN_REG_BASE_IDX_RD(win_idma, br, MV_WIN_IDMA_BASE)
+WIN_REG_BASE_IDX_RD(win_idma, sz, MV_WIN_IDMA_SIZE)
+WIN_REG_BASE_IDX_RD(win_idma, har, MV_WIN_IDMA_REMAP)
+WIN_REG_BASE_IDX_RD(win_idma, cap, MV_WIN_IDMA_CAP)
+WIN_REG_BASE_IDX_WR(win_idma, br, MV_WIN_IDMA_BASE)
+WIN_REG_BASE_IDX_WR(win_idma, sz, MV_WIN_IDMA_SIZE)
+WIN_REG_BASE_IDX_WR(win_idma, har, MV_WIN_IDMA_REMAP)
+WIN_REG_BASE_IDX_WR(win_idma, cap, MV_WIN_IDMA_CAP)
+WIN_REG_BASE_RD(win_idma, bare, 0xa80)
+WIN_REG_BASE_WR(win_idma, bare, 0xa80)
-WIN_REG_IDX_RD(win_sata, cr, MV_WIN_SATA_CTRL, MV_SATAHC_BASE);
-WIN_REG_IDX_RD(win_sata, br, MV_WIN_SATA_BASE, MV_SATAHC_BASE);
-WIN_REG_IDX_WR(win_sata, cr, MV_WIN_SATA_CTRL, MV_SATAHC_BASE);
-WIN_REG_IDX_WR(win_sata, br, MV_WIN_SATA_BASE, MV_SATAHC_BASE);
+WIN_REG_BASE_IDX_RD(win_sata, cr, MV_WIN_SATA_CTRL);
+WIN_REG_BASE_IDX_RD(win_sata, br, MV_WIN_SATA_BASE);
+WIN_REG_BASE_IDX_WR(win_sata, cr, MV_WIN_SATA_CTRL);
+WIN_REG_BASE_IDX_WR(win_sata, br, MV_WIN_SATA_BASE);
/**************************************************************************
* Decode windows helper routines
@@ -518,26 +519,6 @@
for (i = 0; i < MV_WIN_DDR_MAX; i++)
printf("DDR CS#%d: b 0x%08x, s 0x%08x\n", i,
ddr_br_read(i), ddr_sz_read(i));
-
- for (i = 0; i < MV_WIN_ETH_MAX; i++) {
- printf("ETH window#%d: b 0x%08x, s 0x%08x", i,
- win_eth_br_read(MV_ETH0_BASE, i),
- win_eth_sz_read(MV_ETH0_BASE, i));
-
- if (win_eth_can_remap(i))
- printf(", ha 0x%08x",
- win_eth_har_read(MV_ETH0_BASE, i));
-
- printf("\n");
- }
- printf("ETH windows: bare 0x%08x, epap 0x%08x\n",
- win_eth_bare_read(MV_ETH0_BASE),
- win_eth_epap_read(MV_ETH0_BASE));
-
- decode_win_idma_dump();
- decode_win_cesa_dump();
- decode_win_usb_dump();
- printf("\n");
}
/**************************************************************************
@@ -789,22 +770,26 @@
}
static void
-decode_win_usb_dump(void)
+decode_win_usb_dump(u_long base)
{
int i, p, m;
m = usb_max_ports();
- for (p = 0; p < m; p++)
+ for (p = 0; p < m; p++) {
+ if (pm_is_disabled(CPU_PM_CTRL_USB(p)))
+ continue;
+
for (i = 0; i < MV_WIN_USB_MAX; i++)
printf("USB window#%d: c 0x%08x, b 0x%08x\n", i,
- win_usb_cr_read(i, p), win_usb_br_read(i, p));
+ win_usb_cr_read(base, i, p), win_usb_br_read(base, i, p));
+ }
}
/*
* Set USB decode windows.
*/
static void
-decode_win_usb_setup(void)
+decode_win_usb_setup(u_long base)
{
uint32_t br, cr;
int i, j, p, m;
@@ -818,8 +803,8 @@
continue;
for (i = 0; i < MV_WIN_USB_MAX; i++) {
- win_usb_cr_write(i, p, 0);
- win_usb_br_write(i, p, 0);
+ win_usb_cr_write(base, i, p, 0);
+ win_usb_br_write(base, i, p, 0);
}
/* Only access to active DRAM banks is required */
@@ -836,11 +821,11 @@
/* Set the first free USB window */
for (j = 0; j < MV_WIN_USB_MAX; j++) {
- if (win_usb_cr_read(j, p) & 0x1)
+ if (win_usb_cr_read(base, j, p) & 0x1)
continue;
- win_usb_br_write(j, p, br);
- win_usb_cr_write(j, p, cr);
+ win_usb_br_write(base, j, p, br);
+ win_usb_cr_write(base, j, p, cr);
break;
}
}
@@ -897,14 +882,40 @@
}
static void
-decode_win_eth_setup(uint32_t base)
+decode_win_eth_dump(u_long base)
+{
+ int i;
+
+ if (pm_is_disabled(CPU_PM_CTRL_GE(eth_port - 1)))
+ return;
+
+ for (i = 0; i < MV_WIN_ETH_MAX; i++) {
+ printf("ETH window#%d: b 0x%08x, s 0x%08x", i,
+ win_eth_br_read(base, i),
+ win_eth_sz_read(base, i));
+
+ if (win_eth_can_remap(i))
+ printf(", ha 0x%08x",
+ win_eth_har_read(base, i));
+
+ printf("\n");
+ }
+ printf("ETH windows: bare 0x%08x, epap 0x%08x\n",
+ win_eth_bare_read(base),
+ win_eth_epap_read(base));
+}
+
+static void
+decode_win_eth_setup(u_long base)
{
uint32_t br, sz;
int i, j;
- if (pm_is_disabled(obio_get_pm_mask(base)))
+ if (pm_is_disabled(CPU_PM_CTRL_GE(eth_port)))
return;
+ eth_port++;
+
/* Disable, clear and revoke protection for all ETH windows */
for (i = 0; i < MV_WIN_ETH_MAX; i++) {
@@ -955,7 +966,7 @@
**************************************************************************/
static void
-decode_win_pcie_setup(uint32_t base)
+decode_win_pcie_setup(u_long base)
{
uint32_t size = 0;
uint32_t cr, br;
@@ -1011,51 +1022,51 @@
**************************************************************************/
#if defined(SOC_MV_ORION) || defined(SOC_MV_DISCOVERY)
static int
-idma_bare_read(int i)
+idma_bare_read(u_long base, int i)
{
uint32_t v;
- v = win_idma_bare_read();
+ v = win_idma_bare_read(base);
v &= (1 << i);
return (v >> i);
}
static void
-idma_bare_write(int i, int val)
+idma_bare_write(u_long base, int i, int val)
{
uint32_t v;
- v = win_idma_bare_read();
+ v = win_idma_bare_read(base);
v &= ~(1 << i);
v |= (val << i);
- win_idma_bare_write(v);
+ win_idma_bare_write(base, v);
}
/*
* Sets channel protection 'val' for window 'w' on channel 'c'
*/
static void
-idma_cap_write(int c, int w, int val)
+idma_cap_write(u_long base, int c, int w, int val)
{
uint32_t v;
- v = win_idma_cap_read(c);
+ v = win_idma_cap_read(base, c);
v &= ~(0x3 << (w * 2));
v |= (val << (w * 2));
- win_idma_cap_write(c, v);
+ win_idma_cap_write(base, c, v);
}
/*
* Set protection 'val' on all channels for window 'w'
*/
static void
-idma_set_prot(int w, int val)
+idma_set_prot(u_long base, int w, int val)
{
int c;
for (c = 0; c < MV_IDMA_CHAN_MAX; c++)
- idma_cap_write(c, w, val);
+ idma_cap_write(base, c, w, val);
}
static int
@@ -1070,7 +1081,7 @@
}
void
-decode_win_idma_setup(void)
+decode_win_idma_setup(u_long base)
{
uint32_t br, sz;
int i, j;
@@ -1082,14 +1093,14 @@
*/
for (i = 0; i < MV_WIN_IDMA_MAX; i++) {
- idma_bare_write(i, 1);
- win_idma_br_write(i, 0);
- win_idma_sz_write(i, 0);
+ idma_bare_write(base, i, 1);
+ win_idma_br_write(base, i, 0);
+ win_idma_sz_write(base, i, 0);
if (win_idma_can_remap(i) == 1)
- win_idma_har_write(i, 0);
+ win_idma_har_write(base, i, 0);
}
for (i = 0; i < MV_IDMA_CHAN_MAX; i++)
- win_idma_cap_write(i, 0);
+ win_idma_cap_write(base, i, 0);
/*
* Set up access to all active DRAM banks
@@ -1102,17 +1113,17 @@
/* Place DDR entries in non-remapped windows */
for (j = 0; j < MV_WIN_IDMA_MAX; j++)
if (win_idma_can_remap(j) != 1 &&
- idma_bare_read(j) == 1) {
+ idma_bare_read(base, j) == 1) {
/* Configure window */
- win_idma_br_write(j, br);
- win_idma_sz_write(j, sz);
+ win_idma_br_write(base, j, br);
+ win_idma_sz_write(base, j, sz);
/* Set protection RW on all channels */
- idma_set_prot(j, 0x3);
+ idma_set_prot(base, j, 0x3);
/* Enable window */
- idma_bare_write(j, 0);
+ idma_bare_write(base, j, 0);
break;
}
}
@@ -1128,21 +1139,22 @@
/* Set the first free IDMA window */
for (j = 0; j < MV_WIN_IDMA_MAX; j++) {
- if (idma_bare_read(j) == 0)
+ if (idma_bare_read(base, j) == 0)
continue;
/* Configure window */
- win_idma_br_write(j, br);
- win_idma_sz_write(j, sz);
+ win_idma_br_write(base, j, br);
+ win_idma_sz_write(base, j, sz);
if (win_idma_can_remap(j) &&
idma_wins[j].remap >= 0)
- win_idma_har_write(j, idma_wins[j].remap);
+ win_idma_har_write(base, j,
+ idma_wins[j].remap);
/* Set protection RW on all channels */
- idma_set_prot(j, 0x3);
+ idma_set_prot(base, j, 0x3);
/* Enable window */
- idma_bare_write(j, 0);
+ idma_bare_write(base, j, 0);
break;
}
}
@@ -1211,23 +1223,26 @@
}
void
-decode_win_idma_dump(void)
+decode_win_idma_dump(u_long base)
{
int i;
+ if (pm_is_disabled(CPU_PM_CTRL_IDMA))
+ return;
+
for (i = 0; i < MV_WIN_IDMA_MAX; i++) {
printf("IDMA window#%d: b 0x%08x, s 0x%08x", i,
- win_idma_br_read(i), win_idma_sz_read(i));
+ win_idma_br_read(base, i), win_idma_sz_read(base, i));
if (win_idma_can_remap(i))
- printf(", ha 0x%08x", win_idma_har_read(i));
+ printf(", ha 0x%08x", win_idma_har_read(base, i));
printf("\n");
}
for (i = 0; i < MV_IDMA_CHAN_MAX; i++)
printf("IDMA channel#%d: ap 0x%08x\n", i,
- win_idma_cap_read(i));
- printf("IDMA windows: bare 0x%08x\n", win_idma_bare_read());
+ win_idma_cap_read(base, i));
+ printf("IDMA windows: bare 0x%08x\n", win_idma_bare_read(base));
}
#else
@@ -1240,12 +1255,12 @@
}
void
-decode_win_idma_setup(void)
+decode_win_idma_setup(u_long base)
{
}
void
-decode_win_idma_dump(void)
+decode_win_idma_dump(u_long base)
{
}
#endif
@@ -1255,24 +1270,24 @@
**************************************************************************/
#if defined(SOC_MV_KIRKWOOD) || defined(SOC_MV_DISCOVERY)
static int
-xor_ctrl_read(int i, int c, int e)
+xor_ctrl_read(u_long base, int i, int c, int e)
{
uint32_t v;
- v = win_xor_ctrl_read(c, e);
+ v = win_xor_ctrl_read(base, c, e);
v &= (1 << i);
return (v >> i);
}
static void
-xor_ctrl_write(int i, int c, int e, int val)
+xor_ctrl_write(u_long base, int i, int c, int e, int val)
{
uint32_t v;
- v = win_xor_ctrl_read(c, e);
+ v = win_xor_ctrl_read(base, c, e);
v &= ~(1 << i);
v |= (val << i);
- win_xor_ctrl_write(c, e, v);
+ win_xor_ctrl_write(base, c, e, v);
}
/*
@@ -1280,26 +1295,26 @@
*/
static void
-xor_chan_write(int c, int e, int w, int val)
+xor_chan_write(u_long base, int c, int e, int w, int val)
{
uint32_t v;
- v = win_xor_ctrl_read(c, e);
+ v = win_xor_ctrl_read(base, c, e);
v &= ~(0x3 << (w * 2 + 16));
v |= (val << (w * 2 + 16));
- win_xor_ctrl_write(c, e, v);
+ win_xor_ctrl_write(base, c, e, v);
}
/*
* Set protection 'val' on all channels for window 'w' on engine 'e'
*/
static void
-xor_set_prot(int w, int e, int val)
+xor_set_prot(u_long base, int w, int e, int val)
{
int c;
for (c = 0; c < MV_XOR_CHAN_MAX; c++)
- xor_chan_write(c, e, w, val);
+ xor_chan_write(base, c, e, w, val);
}
static int
@@ -1328,7 +1343,7 @@
}
static void
-xor_active_dram(int c, int e, int *window)
+xor_active_dram(u_long base, int c, int e, int *window)
{
uint32_t br, sz;
int i, m, w;
@@ -1346,17 +1361,17 @@
/* Place DDR entries in non-remapped windows */
for (w = 0; w < MV_WIN_XOR_MAX; w++)
if (win_xor_can_remap(w) != 1 &&
- (xor_ctrl_read(w, c, e) == 0) &&
+ (xor_ctrl_read(base, w, c, e) == 0) &&
w > *window) {
/* Configure window */
- win_xor_br_write(w, e, br);
- win_xor_sz_write(w, e, sz);
+ win_xor_br_write(base, w, e, br);
+ win_xor_sz_write(base, w, e, sz);
/* Set protection RW on all channels */
- xor_set_prot(w, e, 0x3);
+ xor_set_prot(base, w, e, 0x3);
/* Enable window */
- xor_ctrl_write(w, c, e, 1);
+ xor_ctrl_write(base, w, c, e, 1);
(*window)++;
break;
}
@@ -1364,7 +1379,7 @@
}
void
-decode_win_xor_setup(void)
+decode_win_xor_setup(u_long base)
{
uint32_t br, sz;
int i, j, z, e = 1, m, window;
@@ -1383,16 +1398,16 @@
window = MV_XOR_NON_REMAP - 1;
for (i = 0; i < MV_WIN_XOR_MAX; i++) {
- win_xor_br_write(i, e, 0);
- win_xor_sz_write(i, e, 0);
+ win_xor_br_write(base, i, e, 0);
+ win_xor_sz_write(base, i, e, 0);
}
if (win_xor_can_remap(i) == 1)
- win_xor_har_write(i, e, 0);
+ win_xor_har_write(base, i, e, 0);
for (i = 0; i < MV_XOR_CHAN_MAX; i++) {
- win_xor_ctrl_write(i, e, 0);
- xor_active_dram(i, e, &window);
+ win_xor_ctrl_write(base, i, e, 0);
+ xor_active_dram(base, i, e, &window);
}
/*
@@ -1407,24 +1422,24 @@
/* Set the first free XOR window */
for (z = 0; z < MV_WIN_XOR_MAX; z++) {
- if (xor_ctrl_read(z, 0, e) &&
- xor_ctrl_read(z, 1, e))
+ if (xor_ctrl_read(base, z, 0, e) &&
+ xor_ctrl_read(base, z, 1, e))
continue;
/* Configure window */
- win_xor_br_write(z, e, br);
- win_xor_sz_write(z, e, sz);
+ win_xor_br_write(base, z, e, br);
+ win_xor_sz_write(base, z, e, sz);
if (win_xor_can_remap(z) &&
xor_wins[z].remap >= 0)
- win_xor_har_write(z, e,
+ win_xor_har_write(base, z, e,
xor_wins[z].remap);
/* Set protection RW on all channels */
- xor_set_prot(z, e, 0x3);
+ xor_set_prot(base, z, e, 0x3);
/* Enable window */
- xor_ctrl_write(z, 0, e, 1);
- xor_ctrl_write(z, 1, e, 1);
+ xor_ctrl_write(base, z, 0, e, 1);
+ xor_ctrl_write(base, z, 1, e, 1);
break;
}
}
@@ -1496,43 +1511,46 @@
}
void
-decode_win_xor_dump(void)
+decode_win_xor_dump(u_long base)
{
int i, j;
int e = 1;
+ if (pm_is_disabled(CPU_PM_CTRL_XOR))
+ return;
+
for (j = 0; j < xor_max_eng(); j++, e--) {
for (i = 0; i < MV_WIN_XOR_MAX; i++) {
printf("XOR window#%d: b 0x%08x, s 0x%08x", i,
- win_xor_br_read(i, e), win_xor_sz_read(i, e));
+ win_xor_br_read(base, i, e), win_xor_sz_read(base, i, e));
if (win_xor_can_remap(i))
- printf(", ha 0x%08x", win_xor_har_read(i, e));
+ printf(", ha 0x%08x", win_xor_har_read(base, i, e));
printf("\n");
}
for (i = 0; i < MV_XOR_CHAN_MAX; i++)
printf("XOR control#%d: 0x%08x\n", i,
- win_xor_ctrl_read(i, e));
+ win_xor_ctrl_read(base, i, e));
}
}
#else
/* Provide dummy functions to satisfy the build for SoCs not equipped with XOR */
-int
+static int
decode_win_xor_valid(void)
{
return (1);
}
-void
-decode_win_xor_setup(void)
+static void
+decode_win_xor_setup(u_long base)
{
}
-void
-decode_win_xor_dump(void)
+static void
+decode_win_xor_dump(u_long base)
{
}
#endif
@@ -1545,13 +1563,16 @@
* Dump CESA TDMA decode windows.
*/
static void
-decode_win_cesa_dump(void)
+decode_win_cesa_dump(u_long base)
{
int i;
+ if (pm_is_disabled(CPU_PM_CTRL_CRYPTO))
+ return;
+
for (i = 0; i < MV_WIN_CESA_MAX; i++)
printf("CESA window#%d: c 0x%08x, b 0x%08x\n", i,
- win_cesa_cr_read(i), win_cesa_br_read(i));
+ win_cesa_cr_read(base, i), win_cesa_br_read(base, i));
}
@@ -1559,7 +1580,7 @@
* Set CESA TDMA decode windows.
*/
static void
-decode_win_cesa_setup(void)
+decode_win_cesa_setup(u_long base)
{
uint32_t br, cr;
int i, j;
@@ -1569,8 +1590,8 @@
>>> TRUNCATED FOR MAIL (1000 lines) <<<
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