PERFORCE change 168646 for review
Andrew Turner
andrew at FreeBSD.org
Fri Sep 18 03:28:59 UTC 2009
http://perforce.freebsd.org/chv.cgi?CH=168646
Change 168646 by andrew at andrew_bender on 2009/09/18 03:28:41
Update the S3C2xx0 code to be closer to my devel tree.
Updated include:
* Remove the NAND driver as it will be replaced with a more generic version
* Map the OHCI registers. There is a forthcoming OHCI driver that will use these
* Update the clock code to be closer to the NetBSD version. It now works and keeps the correct time to under 1s/hour
* Update the register headers to include more s3c2440 registers
Affected files ...
.. //depot/projects/arm/src/sys/arm/s3c2xx0/files.s3c2xx0#8 edit
.. //depot/projects/arm/src/sys/arm/s3c2xx0/s3c2410reg.h#9 edit
.. //depot/projects/arm/src/sys/arm/s3c2xx0/s3c2440reg.h#3 edit
.. //depot/projects/arm/src/sys/arm/s3c2xx0/s3c24x0.c#13 edit
.. //depot/projects/arm/src/sys/arm/s3c2xx0/s3c24x0_clk.c#5 edit
.. //depot/projects/arm/src/sys/arm/s3c2xx0/s3c24x0_machdep.c#6 edit
.. //depot/projects/arm/src/sys/arm/s3c2xx0/s3c24x0_nand.c#5 delete
.. //depot/projects/arm/src/sys/arm/s3c2xx0/s3c24x0reg.h#6 edit
.. //depot/projects/arm/src/sys/arm/s3c2xx0/s3c2xx0var.h#10 edit
Differences ...
==== //depot/projects/arm/src/sys/arm/s3c2xx0/files.s3c2xx0#8 (text+ko) ====
@@ -6,7 +6,7 @@
arm/s3c2xx0/s3c2xx0_space.c standard
arm/s3c2xx0/s3c24x0_clk.c standard
arm/s3c2xx0/s3c24x0_mci.c optional mmc
-arm/s3c2xx0/s3c24x0_nand.c optional nand
arm/s3c2xx0/uart_bus_s3c2410.c optional uart
arm/s3c2xx0/uart_cpu_s3c2410.c optional uart
arm/s3c2xx0/uart_dev_s3c2410.c optional uart
+
==== //depot/projects/arm/src/sys/arm/s3c2xx0/s3c2410reg.h#9 (text+ko) ====
@@ -82,6 +82,7 @@
#define DCON_STOP (1<<14) /* Force the transfer to stop */
#define S3C2410_SDI_DAT 0x3c
#define S3C2410_SDI_IMSK 0x40 /* Interrupt mask */
+#define S3C2410_SDI_IMASK_ALL 0x3ffdf
/* ADC */
#define S3C2410_ADC_SIZE 0x14
==== //depot/projects/arm/src/sys/arm/s3c2xx0/s3c2440reg.h#3 (text+ko) ====
@@ -83,6 +83,7 @@
#define S3C2410_SDI_SIZE 0x44
#define DCON_START (1<<14) /* Start the data transfer */
#define S3C2440_SDI_IMSK 0x3c /* Interrupt mask */
+#define S3C2440_SDI_IMASK_ALL 0x3C7C0
#define S3C2440_SDI_DAT 0x40
/* ADC */
==== //depot/projects/arm/src/sys/arm/s3c2xx0/s3c24x0.c#13 (text+ko) ====
@@ -336,6 +336,10 @@
S3C24X0_TIMER_SIZE, 0, &sc->sc_timer_ioh))
panic("cannot map TIMER");
+ if (bus_space_map(iot, S3C24X0_USBHC_BASE,
+ S3C24X0_USBHC_SIZE, 0, &sc->sc_sx.sc_ohci_ioh))
+ panic("cannot map USB Host");
+
/*
* Identify the CPU
*/
@@ -395,6 +399,12 @@
S3C24X0_UART_BASE(i + 1) - S3C24X0_UART_BASE(i));
}
+ /* USB */
+ child = s3c24x0_add_child(dev, 0, "ohci", -1);
+ bus_set_resource(child, SYS_RES_IRQ, 0, S3C24X0_INT_USBH, 1);
+ bus_set_resource(child, SYS_RES_IOPORT, 0, S3C24X0_USBHC_BASE,
+ S3C24X0_USBHC_SIZE);
+
bus_generic_probe(dev);
bus_generic_attach(dev);
@@ -544,7 +554,7 @@
int
-arm_get_next_irq(void)
+arm_get_next_irq(int last __unused)
{
uint32_t intpnd;
int irq, subirq;
==== //depot/projects/arm/src/sys/arm/s3c2xx0/s3c24x0_clk.c#5 (text+ko) ====
@@ -78,6 +78,7 @@
s3c24x0_timer_attach(device_t dev)
{
timer_softc.dev = dev;
+
return (0);
}
@@ -96,18 +97,12 @@
DRIVER_MODULE(s3c24x0timer, s3c24x0, s3c24x0_timer_driver, s3c24x0_timer_devclass, 0, 0);
-#ifndef STATHZ
-#define STATHZ 64
-#endif
-
-#define hardintr (void *)hardclock
-#define statintr (void *)statclock
-
#define TIMER_FREQUENCY(pclk) ((pclk)/16) /* divider=1/16 */
static unsigned int timer4_reload_value;
static unsigned int timer4_prescaler;
static unsigned int timer4_mseccount;
+static volatile uint32_t s3c24x0_base;
#define usec_to_counter(t) \
((timer4_mseccount*(t))/1000)
@@ -132,9 +127,22 @@
s3c24x0_timer_get_timecount(struct timecounter *tc)
{
struct s3c24x0_softc *sc = (struct s3c24x0_softc *)s3c2xx0_softc;
+ int value;
+
+ value = bus_space_read_2(sc->sc_sx.sc_iot, sc->sc_timer_ioh,
+ TIMER_TCNTO(4));
+ return (s3c24x0_base - value);
+}
- return (bus_space_read_4(sc->sc_sx.sc_iot, sc->sc_timer_ioh,
- TIMER_TCON));
+static int
+clock_intr(void *arg)
+{
+ struct trapframe *fp = arg;
+
+ atomic_add_32(&s3c24x0_base, timer4_reload_value);
+
+ hardclock(TRAPF_USERMODE(fp), TRAPF_PC(fp));
+ return (FILTER_HANDLED);
}
void
@@ -145,16 +153,13 @@
struct resource *irq;
int rid = 0;
void *ihl;
- int prescaler, h;
+ int err, prescaler;
int pclk = s3c2xx0_softc->sc_pclk;
bus_space_tag_t iot = sc->sc_sx.sc_iot;
bus_space_handle_t ioh = sc->sc_timer_ioh;
uint32_t reg;
device_t dev = timer_softc.dev;
- stathz = STATHZ;
- profhz = stathz;
-
#define time_constant(hz) (TIMER_FREQUENCY(pclk) /(hz)/ prescaler)
#define calc_time_constant(hz) \
do { \
@@ -172,8 +177,7 @@
bus_space_write_4(iot, ioh, TIMER_TCON, 0);
/* calc suitable prescaler value */
- h = MIN(hz,stathz);
- calc_time_constant(h);
+ calc_time_constant(hz);
timer4_prescaler = prescaler;
timer4_reload_value = TIMER_FREQUENCY(pclk) / hz / prescaler;
@@ -182,45 +186,42 @@
bus_space_write_4(iot, ioh, TIMER_TCNTB(4),
((prescaler - 1) << 16) | (timer4_reload_value - 1));
- printf("clock: hz=%d stathz = %d PCLK=%d prescaler=%d tc=%ld\n",
- hz, stathz, pclk, prescaler, tc);
+ printf("clock: hz=%d PCLK=%d prescaler=%d tc=%ld\n",
+ hz, pclk, prescaler, tc);
- bus_space_write_4(iot, ioh, TIMER_TCNTB(3),
- ((prescaler - 1) << 16) | (time_constant(stathz) - 1));
-
irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, S3C24X0_INT_TIMER4,
S3C24X0_INT_TIMER4, 1, RF_ACTIVE);
if (!irq)
+ panic("Unable to allocate the clock irq handler.\n");
+
+ err = bus_setup_intr(dev, irq, INTR_TYPE_CLK | INTR_FAST,
+ clock_intr, NULL, NULL, &ihl);
+ if (err != 0)
panic("Unable to setup the clock irq handler.\n");
- else
- bus_setup_intr(dev, irq, INTR_TYPE_CLK | INTR_FAST,
- hardintr, NULL, NULL, &ihl);
/* set prescaler1 */
reg = bus_space_read_4(iot, ioh, TIMER_TCFG0);
bus_space_write_4(iot, ioh, TIMER_TCFG0,
(reg & ~0xff00) | ((prescaler-1) << 8));
- /* divider 1/16 for ch #3 and #4 */
+ /* divider 1/16 for ch #4 */
reg = bus_space_read_4(iot, ioh, TIMER_TCFG1);
bus_space_write_4(iot, ioh, TIMER_TCFG1,
- (reg & ~(TCFG1_MUX_MASK(3)|TCFG1_MUX_MASK(4))) |
- (TCFG1_MUX_DIV16 << TCFG1_MUX_SHIFT(3)) |
+ (reg & ~(TCFG1_MUX_MASK(4))) |
(TCFG1_MUX_DIV16 << TCFG1_MUX_SHIFT(4)) );
/* start timers */
reg = bus_space_read_4(iot, ioh, TIMER_TCON);
- reg &= ~(TCON_MASK(3)|TCON_MASK(4));
+ reg &= ~(TCON_MASK(4));
/* load the time constant */
- bus_space_write_4(iot, ioh, TIMER_TCON, reg |
- TCON_MANUALUPDATE(3) | TCON_MANUALUPDATE(4));
+ bus_space_write_4(iot, ioh, TIMER_TCON, reg | TCON_MANUALUPDATE(4));
/* set auto reload and start */
bus_space_write_4(iot, ioh, TIMER_TCON, reg |
- TCON_AUTORELOAD(3) | TCON_START(3) |
TCON_AUTORELOAD(4) | TCON_START(4) );
+ s3c24x0_timer_timecounter.tc_frequency = TIMER_FREQUENCY(pclk) / timer4_prescaler;
tc_init(&s3c24x0_timer_timecounter);
}
==== //depot/projects/arm/src/sys/arm/s3c2xx0/s3c24x0_machdep.c#6 (text+ko) ====
@@ -198,6 +198,13 @@
PTE_NOCACHE,
},
{
+ _A(S3C24X0_USBHC_BASE),
+ _A(S3C24X0_USBHC_BASE),
+ _S(S3C24X0_USBHC_SIZE),
+ VM_PROT_READ|VM_PROT_WRITE,
+ PTE_NOCACHE,
+ },
+ {
0,
0,
0,
==== //depot/projects/arm/src/sys/arm/s3c2xx0/s3c24x0reg.h#6 (text+ko) ====
@@ -391,7 +391,7 @@
#define CCON_CMD_START (1<<8)
#define CCON_CMDINDEX_MASK (0x7F) /* Command number index */
#define SDI_CSTA 0x10
-#define CSTA_RSPFAIL (1<<12)
+#define CSTA_RSPCRCFAIL (1<<12)
#define CSTA_CMDSENT (1<<11)
#define CSTA_CMDTOUT (1<<10)
#define CSTA_RSPFIN (1<<9)
@@ -516,9 +516,16 @@
#define GPIO_PDDOWN 0x38 /* 2442 */
#define GPIO_PECON 0x40
+#define PECON_INPUT(x) (0<<((x)*2)) /* Pin is used for input */
+#define PECON_OUTPUT(x) (1<<((x)*2)) /* Pin is used for output */
+#define PECON_FUNC_A(x) (2<<((x)*2)) /* Pin is used for function 'A' */
+#define PECON_FUNC_B(x) (3<<((x)*2)) /* Pin is used for function 'B' */
+#define PECON_MASK(x) (3<<((x)*2))
#define GPIO_PEDAT 0x44
#define GPIO_PEUP 0x48 /* 2410 & 2440 */
#define GPIO_PEDOWN 0x48 /* 2442 */
+#define PEUD_ENABLE(x) (~(1<<(x))) /* Enable the pull Up/Down */
+#define PEUD_DISABLE(x) (1<<(x)) /* Disable the pull Up/Down */
#define GPIO_PFCON 0x50
#define GPIO_PFDAT 0x54
==== //depot/projects/arm/src/sys/arm/s3c2xx0/s3c2xx0var.h#10 (text+ko) ====
@@ -58,6 +58,7 @@
bus_space_handle_t sc_rtc_ioh; /* real time clock */
bus_space_handle_t sc_mci_ioh; /* MMC/SD */
bus_space_handle_t sc_iic_ioh; /* IIC */
+ bus_space_handle_t sc_ohci_ioh; /* USB/OHCI */
bus_dma_tag_t sc_dmat;
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