PERFORCE change 163626 for review
Andrew Thompson
thompsa at FreeBSD.org
Sat Jun 6 04:27:05 UTC 2009
http://perforce.freebsd.org/chv.cgi?CH=163626
Change 163626 by thompsa at thompsa_burger on 2009/06/06 04:26:45
- assert locks on load
- remove printf
- remove double queue
Affected files ...
.. //depot/projects/usb_buf/src/sys/dev/usb/controller/ehci.c#12 edit
Differences ...
==== //depot/projects/usb_buf/src/sys/dev/usb/controller/ehci.c#12 (text+ko) ====
@@ -2201,10 +2201,9 @@
/* dequeue transfer */
usb2_transfer_done(urb, error);
- /* Load next */
+ /* load next */
urb = TAILQ_FIRST(&pipe->urb_hc_q);
if (error == 0 && urb != NULL) {
- printf("LOAD NEXT %p\n", urb);
TAILQ_REMOVE(&pipe->urb_hc_q, urb, ub_hcnext);
error = (pipe->methods->load)(urb);
if (error)
@@ -2276,12 +2275,11 @@
ehci_softc_t *sc = EHCI_BUS2SC(pipe->xroot->bus);
uint32_t temp;
+ USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
+
/* setup TD's and QH */
ehci_setup_standard_chain(urb, &sc->sc_async_p_last);
- /* put transfer on interrupt queue */
- ehci_transfer_intr_enqueue(urb);
-
/* XXX Performance quirk: Some Host Controllers have a too low
* interrupt rate. Issue an IAAD to stimulate the Host
* Controller after queueing the BULK transfer.
@@ -2327,6 +2325,8 @@
struct usb_pipe *pipe = urb->ub_pipe;
ehci_softc_t *sc = EHCI_BUS2SC(pipe->xroot->bus);
+ USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
+
/* setup TD's and QH */
ehci_setup_standard_chain(urb, &sc->sc_async_p_last);
@@ -2425,6 +2425,8 @@
struct usb_pipe *pipe = urb->ub_pipe;
ehci_softc_t *sc = EHCI_BUS2SC(pipe->xroot->bus);
+ USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
+
/* setup TD's and QH */
ehci_setup_standard_chain(urb, &sc->sc_intr_p_last[pipe->qh_pos]);
@@ -2524,6 +2526,8 @@
#endif
+ USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
+
DPRINTFN(6, "urb=%p next=%d nframes=%d\n",
urb, pipe->endpoint->isoc_next, urb->nframes);
@@ -2814,6 +2818,8 @@
#endif
+ USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
+
DPRINTFN(6, "urb=%p next=%d nframes=%d\n",
urb, pipe->endpoint->isoc_next, urb->nframes);
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