PERFORCE change 158278 for review
Oleksandr Tymoshenko
gonzo at FreeBSD.org
Wed Feb 25 11:44:14 PST 2009
http://perforce.freebsd.org/chv.cgi?CH=158278
Change 158278 by gonzo at gonzo_figaro on 2009/02/25 19:43:42
- Add AVR32 bits to libbfd
Affected files ...
.. //depot/projects/avr32/src/contrib/binutils/bfd/Makefile.am#2 edit
.. //depot/projects/avr32/src/contrib/binutils/bfd/Makefile.in#2 edit
.. //depot/projects/avr32/src/contrib/binutils/bfd/archures.c#2 edit
.. //depot/projects/avr32/src/contrib/binutils/bfd/bfd-in2.h#2 edit
.. //depot/projects/avr32/src/contrib/binutils/bfd/config.bfd#2 edit
.. //depot/projects/avr32/src/contrib/binutils/bfd/configure#2 edit
.. //depot/projects/avr32/src/contrib/binutils/bfd/configure.in#2 edit
.. //depot/projects/avr32/src/contrib/binutils/bfd/cpu-avr32.c#1 add
.. //depot/projects/avr32/src/contrib/binutils/bfd/elf-bfd.h#2 edit
.. //depot/projects/avr32/src/contrib/binutils/bfd/elf32-avr32.c#1 add
.. //depot/projects/avr32/src/contrib/binutils/bfd/elf32-avr32.h#1 add
.. //depot/projects/avr32/src/contrib/binutils/bfd/libbfd.h#2 edit
.. //depot/projects/avr32/src/contrib/binutils/bfd/reloc.c#2 edit
.. //depot/projects/avr32/src/contrib/binutils/bfd/targets.c#2 edit
Differences ...
==== //depot/projects/avr32/src/contrib/binutils/bfd/Makefile.am#2 (text+ko) ====
@@ -55,6 +55,7 @@
cpu-arc.lo \
cpu-arm.lo \
cpu-avr.lo \
+ cpu-avr32.lo \
cpu-cris.lo \
cpu-d10v.lo \
cpu-d30v.lo \
@@ -110,6 +111,7 @@
cpu-arc.c \
cpu-arm.c \
cpu-avr.c \
+ cpu-avr32.c \
cpu-cris.c \
cpu-d10v.c \
cpu-d30v.c \
@@ -213,6 +215,7 @@
elfarm-oabi.lo \
elfarm-nabi.lo \
elf32-avr.lo \
+ elf32-avr32.lo \
elf32-cris.lo \
elf32-d10v.lo \
elf32-d30v.lo \
@@ -378,6 +381,7 @@
elfarm-oabi.c \
elfarm-nabi.c \
elf32-avr.c \
+ elf32-avr32.c \
elf32-cris.c \
elf32-d10v.c \
elf32-d30v.c \
@@ -1137,6 +1141,10 @@
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(INCDIR)/elf/avr.h $(INCDIR)/elf/reloc-macros.h \
elf32-target.h
+elf32-avr32.lo: elf32-avr32.c $(INCDIR)/filenames.h elf-bfd.h \
+ $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
+ $(INCDIR)/bfdlink.h $(INCDIR)/elf/avr32.h $(INCDIR)/elf/reloc-macros.h \
+ elf32-target.h
elf32-cris.lo: elf32-cris.c $(INCDIR)/filenames.h elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(INCDIR)/elf/cris.h $(INCDIR)/elf/reloc-macros.h \
==== //depot/projects/avr32/src/contrib/binutils/bfd/Makefile.in#2 (text+ko) ====
@@ -183,6 +183,7 @@
cpu-arc.lo \
cpu-arm.lo \
cpu-avr.lo \
+ cpu-avr32.lo \
cpu-cris.lo \
cpu-d10v.lo \
cpu-d30v.lo \
@@ -239,6 +240,7 @@
cpu-arc.c \
cpu-arm.c \
cpu-avr.c \
+ cpu-avr32.c \
cpu-cris.c \
cpu-d10v.c \
cpu-d30v.c \
@@ -343,6 +345,7 @@
elfarm-oabi.lo \
elfarm-nabi.lo \
elf32-avr.lo \
+ elf32-avr32.lo \
elf32-cris.lo \
elf32-d10v.lo \
elf32-d30v.lo \
@@ -508,7 +511,7 @@
elf32-arc.c \
elfarm-oabi.c \
elfarm-nabi.c \
- elf32-avr.c \
+ elf32-avr32.c \
elf32-cris.c \
elf32-d10v.c \
elf32-d30v.c \
@@ -1674,6 +1677,10 @@
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(INCDIR)/elf/avr.h $(INCDIR)/elf/reloc-macros.h \
elf32-target.h
+elf32-avr32.lo: elf32-avr32.c $(INCDIR)/filenames.h elf-bfd.h \
+ $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
+ $(INCDIR)/bfdlink.h $(INCDIR)/elf/avr32.h $(INCDIR)/elf/reloc-macros.h \
+ elf32-target.h
elf32-cris.lo: elf32-cris.c $(INCDIR)/filenames.h elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(INCDIR)/elf/cris.h $(INCDIR)/elf/reloc-macros.h \
==== //depot/projects/avr32/src/contrib/binutils/bfd/archures.c#2 (text+ko) ====
@@ -252,6 +252,11 @@
.#define bfd_mach_arm_XScale 10
.#define bfd_mach_arm_ep9312 11
.#define bfd_mach_arm_iWMMXt 12
+. bfd_arch_avr32, {* Atmel AVR32 *}
+.#define bfd_mach_avr32_ap 7000
+.#define bfd_mach_avr32_uc 3000
+.#define bfd_mach_avr32_ucr1 3001
+.#define bfd_mach_avr32_ucr2 3002
. bfd_arch_ns32k, {* National Semiconductors ns32000 *}
. bfd_arch_w65, {* WDC 65816 *}
. bfd_arch_tic30, {* Texas Instruments TMS320C30 *}
@@ -373,6 +378,7 @@
extern const bfd_arch_info_type bfd_arc_arch;
extern const bfd_arch_info_type bfd_arm_arch;
extern const bfd_arch_info_type bfd_avr_arch;
+extern const bfd_arch_info_type bfd_avr32_arch;
extern const bfd_arch_info_type bfd_cris_arch;
extern const bfd_arch_info_type bfd_d10v_arch;
extern const bfd_arch_info_type bfd_d30v_arch;
@@ -433,6 +439,7 @@
&bfd_arc_arch,
&bfd_arm_arch,
&bfd_avr_arch,
+ &bfd_avr32_arch,
&bfd_cris_arch,
&bfd_d10v_arch,
&bfd_d30v_arch,
==== //depot/projects/avr32/src/contrib/binutils/bfd/bfd-in2.h#2 (text+ko) ====
@@ -1703,6 +1703,11 @@
#define bfd_mach_avr3 3
#define bfd_mach_avr4 4
#define bfd_mach_avr5 5
+ bfd_arch_avr32, /* Atmel AVR32 */
+#define bfd_mach_avr32_ap 7000
+#define bfd_mach_avr32_uc 3000
+#define bfd_mach_avr32_ucr1 3001
+#define bfd_mach_avr32_ucr2 3002
bfd_arch_cris, /* Axis CRIS */
bfd_arch_s390, /* IBM s390 */
#define bfd_mach_s390_31 31
@@ -3053,6 +3058,88 @@
into 22 bits. */
BFD_RELOC_AVR_CALL,
+/* Difference between two labels: L2 - L1. The value of L1 is encoded
+as sym + addend, while the initial difference after assembly is
+inserted into the object file by the assembler. */
+ BFD_RELOC_AVR32_DIFF32,
+ BFD_RELOC_AVR32_DIFF16,
+ BFD_RELOC_AVR32_DIFF8,
+
+/* Reference to a symbol through the Global Offset Table. The linker
+will allocate an entry for symbol in the GOT and insert the offset
+of this entry as the relocation value. */
+ BFD_RELOC_AVR32_GOT32,
+ BFD_RELOC_AVR32_GOT16,
+ BFD_RELOC_AVR32_GOT8,
+
+/* Normal (non-pc-relative) code relocations. Alignment and signedness
+is indicated by the suffixes. S means signed, U means unsigned. W
+means word-aligned, H means halfword-aligned, neither means
+byte-aligned (no alignment.) SUB5 is the same relocation as 16S. */
+ BFD_RELOC_AVR32_21S,
+ BFD_RELOC_AVR32_16U,
+ BFD_RELOC_AVR32_16S,
+ BFD_RELOC_AVR32_SUB5,
+ BFD_RELOC_AVR32_8S_EXT,
+ BFD_RELOC_AVR32_8S,
+ BFD_RELOC_AVR32_15S,
+
+/* PC-relative relocations are signed if neither 'U' nor 'S' is
+specified. However, we explicitly tack on a 'B' to indicate no
+alignment, to avoid confusion with data relocs. All of these resolve
+to sym + addend - offset, except the one with 'N' (negated) suffix.
+This particular one resolves to offset - sym - addend. */
+ BFD_RELOC_AVR32_22H_PCREL,
+ BFD_RELOC_AVR32_18W_PCREL,
+ BFD_RELOC_AVR32_16B_PCREL,
+ BFD_RELOC_AVR32_16N_PCREL,
+ BFD_RELOC_AVR32_14UW_PCREL,
+ BFD_RELOC_AVR32_11H_PCREL,
+ BFD_RELOC_AVR32_10UW_PCREL,
+ BFD_RELOC_AVR32_9H_PCREL,
+ BFD_RELOC_AVR32_9UW_PCREL,
+
+/* Subtract the link-time address of the GOT from (symbol + addend)
+and insert the result. */
+ BFD_RELOC_AVR32_GOTPC,
+
+/* Reference to a symbol through the GOT. The linker will allocate an
+entry for symbol in the GOT and insert the offset of this entry as
+the relocation value. addend must be zero. As usual, 'S' means
+signed, 'W' means word-aligned, etc. */
+ BFD_RELOC_AVR32_GOTCALL,
+ BFD_RELOC_AVR32_LDA_GOT,
+ BFD_RELOC_AVR32_GOT21S,
+ BFD_RELOC_AVR32_GOT18SW,
+ BFD_RELOC_AVR32_GOT16S,
+
+/* 32-bit constant pool entry. I don't think 8- and 16-bit entries make
+a whole lot of sense. */
+ BFD_RELOC_AVR32_32_CPENT,
+
+/* Constant pool references. Some of these relocations are signed,
+others are unsigned. It doesn't really matter, since the constant
+pool always comes after the code that references it. */
+ BFD_RELOC_AVR32_CPCALL,
+ BFD_RELOC_AVR32_16_CP,
+ BFD_RELOC_AVR32_9W_CP,
+
+/* sym must be the absolute symbol. The addend specifies the alignment
+order, e.g. if addend is 2, the linker must add padding so that the
+next address is aligned to a 4-byte boundary. */
+ BFD_RELOC_AVR32_ALIGN,
+
+/* Code relocations that will never make it to the output file. */
+ BFD_RELOC_AVR32_14UW,
+ BFD_RELOC_AVR32_10UW,
+ BFD_RELOC_AVR32_10SW,
+ BFD_RELOC_AVR32_STHH_W,
+ BFD_RELOC_AVR32_7UW,
+ BFD_RELOC_AVR32_6S,
+ BFD_RELOC_AVR32_6UW,
+ BFD_RELOC_AVR32_4UH,
+ BFD_RELOC_AVR32_3U,
+
/* Direct 12 bit. */
BFD_RELOC_390_12,
==== //depot/projects/avr32/src/contrib/binutils/bfd/config.bfd#2 (text+ko) ====
@@ -87,6 +87,7 @@
# Keep obsolete entries above the START comment, to keep them out of
# targmatch.h.
+echo "${targ}" >> /tmp/targ
case "${targ}" in
mips*-dec-bsd*)
echo "This target is obsolete and has been removed."
@@ -292,6 +293,10 @@
targ_defvec=bfd_elf32_avr_vec
;;
+ avr32-*-*)
+ targ_defvec=bfd_elf32_avr32_vec
+ ;;
+
c30-*-*aout* | tic30-*-*aout*)
targ_defvec=tic30_aout_vec
;;
==== //depot/projects/avr32/src/contrib/binutils/bfd/configure#2 (text+ko) ====
@@ -6280,6 +6280,7 @@
bfd_efi_app_ia64_vec) tb="$tb efi-app-ia64.lo pepigen.lo cofflink.lo"; target_size=64 ;;
bfd_elf32_am33lin_vec) tb="$tb elf32-am33lin.lo elf32.lo $elf" ;;
bfd_elf32_avr_vec) tb="$tb elf32-avr.lo elf32.lo $elf" ;;
+ bfd_elf32_avr32_vec) tb="$tb elf32-avr32.lo elf32.lo $elf" ;;
bfd_elf32_big_generic_vec) tb="$tb elf32-gen.lo elf32.lo $elf" ;;
bfd_elf32_bigarc_vec) tb="$tb elf32-arc.lo elf32.lo $elf" ;;
bfd_elf32_bigarm_oabi_vec) tb="$tb elfarm-oabi.lo elf32.lo $elf" ;;
==== //depot/projects/avr32/src/contrib/binutils/bfd/configure.in#2 (text+ko) ====
@@ -589,6 +589,7 @@
bfd_efi_app_ia64_vec) tb="$tb efi-app-ia64.lo pepigen.lo cofflink.lo"; target_size=64 ;;
bfd_elf32_am33lin_vec) tb="$tb elf32-am33lin.lo elf32.lo $elf" ;;
bfd_elf32_avr_vec) tb="$tb elf32-avr.lo elf32.lo $elf" ;;
+ bfd_elf32_avr32_vec) tb="$tb elf32-avr32.lo elf32.lo $elf" ;;
bfd_elf32_big_generic_vec) tb="$tb elf32-gen.lo elf32.lo $elf" ;;
bfd_elf32_bigarc_vec) tb="$tb elf32-arc.lo elf32.lo $elf" ;;
bfd_elf32_bigarm_oabi_vec) tb="$tb elfarm-oabi.lo elf32.lo $elf" ;;
==== //depot/projects/avr32/src/contrib/binutils/bfd/elf-bfd.h#2 (text+ko) ====
@@ -1177,6 +1177,10 @@
find_nearest_line. */
struct mips_elf_find_line *find_line_info;
+ /* Used by AVR32 ELF relaxation code. Contains an array of pointers
+ for each local symbol to the fragment where it is defined. */
+ struct fragment **local_sym_frag;
+
/* A place to stash dwarf1 info for this bfd. */
struct dwarf1_debug *dwarf1_find_line_info;
==== //depot/projects/avr32/src/contrib/binutils/bfd/libbfd.h#2 (text+ko) ====
@@ -1283,6 +1283,48 @@
"BFD_RELOC_AVR_HI8_LDI_PM_NEG",
"BFD_RELOC_AVR_HH8_LDI_PM_NEG",
"BFD_RELOC_AVR_CALL",
+ "BFD_RELOC_AVR32_DIFF32",
+ "BFD_RELOC_AVR32_DIFF16",
+ "BFD_RELOC_AVR32_DIFF8",
+ "BFD_RELOC_AVR32_GOT32",
+ "BFD_RELOC_AVR32_GOT16",
+ "BFD_RELOC_AVR32_GOT8",
+ "BFD_RELOC_AVR32_21S",
+ "BFD_RELOC_AVR32_16U",
+ "BFD_RELOC_AVR32_16S",
+ "BFD_RELOC_AVR32_SUB5",
+ "BFD_RELOC_AVR32_8S_EXT",
+ "BFD_RELOC_AVR32_8S",
+ "BFD_RELOC_AVR32_15S",
+ "BFD_RELOC_AVR32_22H_PCREL",
+ "BFD_RELOC_AVR32_18W_PCREL",
+ "BFD_RELOC_AVR32_16B_PCREL",
+ "BFD_RELOC_AVR32_16N_PCREL",
+ "BFD_RELOC_AVR32_14UW_PCREL",
+ "BFD_RELOC_AVR32_11H_PCREL",
+ "BFD_RELOC_AVR32_10UW_PCREL",
+ "BFD_RELOC_AVR32_9H_PCREL",
+ "BFD_RELOC_AVR32_9UW_PCREL",
+ "BFD_RELOC_AVR32_GOTPC",
+ "BFD_RELOC_AVR32_GOTCALL",
+ "BFD_RELOC_AVR32_LDA_GOT",
+ "BFD_RELOC_AVR32_GOT21S",
+ "BFD_RELOC_AVR32_GOT18SW",
+ "BFD_RELOC_AVR32_GOT16S",
+ "BFD_RELOC_AVR32_32_CPENT",
+ "BFD_RELOC_AVR32_CPCALL",
+ "BFD_RELOC_AVR32_16_CP",
+ "BFD_RELOC_AVR32_9W_CP",
+ "BFD_RELOC_AVR32_ALIGN",
+ "BFD_RELOC_AVR32_14UW",
+ "BFD_RELOC_AVR32_10UW",
+ "BFD_RELOC_AVR32_10SW",
+ "BFD_RELOC_AVR32_STHH_W",
+ "BFD_RELOC_AVR32_7UW",
+ "BFD_RELOC_AVR32_6S",
+ "BFD_RELOC_AVR32_6UW",
+ "BFD_RELOC_AVR32_4UH",
+ "BFD_RELOC_AVR32_3U",
"BFD_RELOC_390_12",
"BFD_RELOC_390_GOT12",
"BFD_RELOC_390_PLT32",
==== //depot/projects/avr32/src/contrib/binutils/bfd/reloc.c#2 (text+ko) ====
@@ -3322,6 +3322,131 @@
into 22 bits.
ENUM
+ BFD_RELOC_AVR32_DIFF32
+ENUMX
+ BFD_RELOC_AVR32_DIFF16
+ENUMX
+ BFD_RELOC_AVR32_DIFF8
+ENUMDOC
+ Difference between two labels: L2 - L1. The value of L1 is encoded
+ as sym + addend, while the initial difference after assembly is
+ inserted into the object file by the assembler.
+ENUM
+ BFD_RELOC_AVR32_GOT32
+ENUMX
+ BFD_RELOC_AVR32_GOT16
+ENUMX
+ BFD_RELOC_AVR32_GOT8
+ENUMDOC
+ Reference to a symbol through the Global Offset Table. The linker
+ will allocate an entry for symbol in the GOT and insert the offset
+ of this entry as the relocation value.
+ENUM
+ BFD_RELOC_AVR32_21S
+ENUMX
+ BFD_RELOC_AVR32_16U
+ENUMX
+ BFD_RELOC_AVR32_16S
+ENUMX
+ BFD_RELOC_AVR32_SUB5
+ENUMX
+ BFD_RELOC_AVR32_8S_EXT
+ENUMX
+ BFD_RELOC_AVR32_8S
+ENUMX
+ BFD_RELOC_AVR32_15S
+ENUMDOC
+ Normal (non-pc-relative) code relocations. Alignment and signedness
+ is indicated by the suffixes. S means signed, U means unsigned. W
+ means word-aligned, H means halfword-aligned, neither means
+ byte-aligned (no alignment.) SUB5 is the same relocation as 16S.
+ENUM
+ BFD_RELOC_AVR32_22H_PCREL
+ENUMX
+ BFD_RELOC_AVR32_18W_PCREL
+ENUMX
+ BFD_RELOC_AVR32_16B_PCREL
+ENUMX
+ BFD_RELOC_AVR32_16N_PCREL
+ENUMX
+ BFD_RELOC_AVR32_14UW_PCREL
+ENUMX
+ BFD_RELOC_AVR32_11H_PCREL
+ENUMX
+ BFD_RELOC_AVR32_10UW_PCREL
+ENUMX
+ BFD_RELOC_AVR32_9H_PCREL
+ENUMX
+ BFD_RELOC_AVR32_9UW_PCREL
+ENUMDOC
+ PC-relative relocations are signed if neither 'U' nor 'S' is
+ specified. However, we explicitly tack on a 'B' to indicate no
+ alignment, to avoid confusion with data relocs. All of these resolve
+ to sym + addend - offset, except the one with 'N' (negated) suffix.
+ This particular one resolves to offset - sym - addend.
+ENUM
+ BFD_RELOC_AVR32_GOTPC
+ENUMDOC
+ Subtract the link-time address of the GOT from (symbol + addend)
+ and insert the result.
+ENUM
+ BFD_RELOC_AVR32_GOTCALL
+ENUMX
+ BFD_RELOC_AVR32_LDA_GOT
+ENUMX
+ BFD_RELOC_AVR32_GOT21S
+ENUMX
+ BFD_RELOC_AVR32_GOT18SW
+ENUMX
+ BFD_RELOC_AVR32_GOT16S
+ENUMDOC
+ Reference to a symbol through the GOT. The linker will allocate an
+ entry for symbol in the GOT and insert the offset of this entry as
+ the relocation value. addend must be zero. As usual, 'S' means
+ signed, 'W' means word-aligned, etc.
+ENUM
+ BFD_RELOC_AVR32_32_CPENT
+ENUMDOC
+ 32-bit constant pool entry. I don't think 8- and 16-bit entries make
+ a whole lot of sense.
+ENUM
+ BFD_RELOC_AVR32_CPCALL
+ENUMX
+ BFD_RELOC_AVR32_16_CP
+ENUMX
+ BFD_RELOC_AVR32_9W_CP
+ENUMDOC
+ Constant pool references. Some of these relocations are signed,
+ others are unsigned. It doesn't really matter, since the constant
+ pool always comes after the code that references it.
+ENUM
+ BFD_RELOC_AVR32_ALIGN
+ENUMDOC
+ sym must be the absolute symbol. The addend specifies the alignment
+ order, e.g. if addend is 2, the linker must add padding so that the
+ next address is aligned to a 4-byte boundary.
+ENUM
+ BFD_RELOC_AVR32_14UW
+ENUMX
+ BFD_RELOC_AVR32_10UW
+ENUMX
+ BFD_RELOC_AVR32_10SW
+ENUMX
+ BFD_RELOC_AVR32_STHH_W
+ENUMX
+ BFD_RELOC_AVR32_7UW
+ENUMX
+ BFD_RELOC_AVR32_6S
+ENUMX
+ BFD_RELOC_AVR32_6UW
+ENUMX
+ BFD_RELOC_AVR32_4UH
+ENUMX
+ BFD_RELOC_AVR32_3U
+ENUMDOC
+ Code relocations that will never make it to the output file.
+
+ENUM
BFD_RELOC_390_12
ENUMDOC
Direct 12 bit.
==== //depot/projects/avr32/src/contrib/binutils/bfd/targets.c#2 (text+ko) ====
@@ -512,6 +512,7 @@
extern const bfd_target bfd_efi_app_ia32_vec;
extern const bfd_target bfd_efi_app_ia64_vec;
extern const bfd_target bfd_elf32_avr_vec;
+extern const bfd_target bfd_elf32_avr32_vec;
extern const bfd_target bfd_elf32_big_generic_vec;
extern const bfd_target bfd_elf32_bigarc_vec;
extern const bfd_target bfd_elf32_bigarm_oabi_vec;
@@ -798,6 +799,7 @@
&bfd_efi_app_ia64_vec,
#endif
&bfd_elf32_avr_vec,
+ &bfd_elf32_avr32_vec,
/* This, and other vectors, may not be used in any *.mt configuration.
But that does not mean they are unnecessary. If configured with
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