PERFORCE change 160785 for review

Ulf Lilleengen lulf at FreeBSD.org
Sat Apr 18 16:00:40 UTC 2009


http://perforce.freebsd.org/chv.cgi?CH=160785

Change 160785 by lulf at lulf_carrot on 2009/04/18 16:00:07

	- Drop using a clk_index, and create the device clocks in the power
	  manager itself instead. We might use a softc per clock to distinguish
	         between clocks that are on the same height such as pba,pbb,cpu,hsb or
	         mci,uart,spi etc.
	- Remove lookup_index and rename lookup_name to lookup_clock.
	- Add function to set a clock parent.
	- PBB/PBA are not clocks more than just a mask, so drop them and let
	         the clock tree "leafs" like mci handle it.

Affected files ...

.. //depot/projects/avr32/src/sys/avr32/avr32/at32.c#11 edit
.. //depot/projects/avr32/src/sys/avr32/avr32/at32_pm.c#7 edit
.. //depot/projects/avr32/src/sys/avr32/avr32/at32_tc.c#3 edit
.. //depot/projects/avr32/src/sys/avr32/avr32/at32_tc_channel.c#3 edit
.. //depot/projects/avr32/src/sys/avr32/conf/cpu/at32ap700x.hints#5 edit
.. //depot/projects/avr32/src/sys/kern/devclk_if.m#6 edit
.. //depot/projects/avr32/src/sys/kern/subr_devclk.c#6 edit
.. //depot/projects/avr32/src/sys/sys/devclk.h#6 edit

Differences ...

==== //depot/projects/avr32/src/sys/avr32/avr32/at32.c#11 (text+ko) ====

@@ -67,13 +67,8 @@
 	struct resource *);
 static struct resource *at32_alloc_resource(device_t, device_t, int, int *,
 	u_long, u_long, u_long, u_int);
-static uint64_t at32_clk_get_rate(device_t, device_t);
-static int at32_clk_set_rate(device_t, device_t, uint64_t);
-static void at32_clk_enable(device_t, device_t);
-static void at32_clk_disable(device_t, device_t);
+static const char *at32_lookup_clock(device_t, device_t);
 
-static const char *at32_clk_lookup_name(device_t, device_t);
-static int at32_clk_lookup_index(device_t, device_t);
 /* Driver variables and private data */
 struct at32_softc {
 	struct rman		sc_irq_rman;
@@ -82,7 +77,6 @@
 };
 struct at32_ivar {
 	char *clk_name;
-	int clk_index;
 	struct resource_list	resources;
 };
 
@@ -103,13 +97,7 @@
 	DEVMETHOD(bus_get_resource,		bus_generic_rl_get_resource),
 	DEVMETHOD(bus_release_resource,		at32_release_resource),
 
-	DEVMETHOD(devclk_lookup_name,		at32_clk_lookup_name),
-	DEVMETHOD(devclk_lookup_index,		at32_clk_lookup_index),
-/*
-	DEVMETHOD(devclk_get_rate,		at32_clk_get_rate),
-	DEVMETHOD(devclk_set_rate,		at32_clk_set_rate),
-	DEVMETHOD(devclk_enable,		at32_clk_enable),
-	DEVMETHOD(devclk_disable,		at32_clk_disable),*/
+	DEVMETHOD(devclk_lookup_clock,		at32_lookup_clock),
 	{0, 0},
 };
 
@@ -226,9 +214,6 @@
 	ivar = device_get_ivars(child);
 	ivar->clk_name = NULL;
 	if (resource_string_value(dname, dunit, "clk", &resval) == 0) {
-		if (resource_int_value(dname, dunit, "clk_index",
-		    &ivar->clk_index) != 0)
-			ivar->clk_index = 0; /* Default */
 		ivar->clk_name = malloc(strlen(resval) + 1, M_DEVBUF, M_WAITOK |
 		    M_ZERO);
 		strlcpy(ivar->clk_name, resval, strlen(resval) + 1);
@@ -368,55 +353,10 @@
 }
 
 static const char *
-at32_clk_lookup_name(device_t dev, device_t child)
+at32_lookup_clock(device_t dev, device_t child)
 {
 	struct at32_ivar *ivar;
 
 	ivar = device_get_ivars(child);
 	return (ivar->clk_name);
 }
-
-static int
-at32_clk_lookup_index(device_t dev, device_t child)
-{
-	struct at32_ivar *ivar;
-
-	ivar = device_get_ivars(child);
-	return (ivar->clk_index);
-}
-
-#if 0
-static uint64_t
-at32_clk_get_rate(device_t dev, device_t child)
-{
-	avr32_impl();
-	return (0);
-}
-
-static int
-at32_clk_set_rate(device_t dev, device_t child, uint64_t rate)
-{
-	avr32_impl();
-	return (0);
-}
-
-static void
-at32_clk_enable(device_t dev, device_t child)
-{
-	struct at32_ivar *ivar = device_get_ivars(child);
-
-	/* Only activate if it actually has a clock. */
-	if (strcmp(ivar->clk_name, "") != 0)
-		devclk_activate(ivar->clk_name, ivar->clk_index);
-}
-
-static void
-at32_clk_disable(device_t dev, device_t child)
-{
-	struct at32_ivar *ivar = device_get_ivars(child);
-
-	/* Only deactivate if it actually has a clock. */
-	if (strcmp(ivar->clk_name, "") != 0)
-		devclk_deactivate(ivar->clk_name, ivar->clk_index);
-}
-#endif

==== //depot/projects/avr32/src/sys/avr32/avr32/at32_pm.c#7 (text+ko) ====

@@ -65,26 +65,21 @@
 static int at32_pm_activate(device_t);
 static void at32_pm_deactivate(device_t);
 
-static void at32_pba_enable(devclk_t, int);
-static void at32_pba_disable(devclk_t, int);
-static uint64_t at32_pba_get_rate(devclk_t, int);
-static int at32_pba_set_rate(devclk_t, int, uint64_t);
+static void at32_mci_enable(devclk_t);
+static void at32_mci_disable(devclk_t);
+static uint64_t at32_mci_get_rate(devclk_t);
+static int at32_mci_set_rate(devclk_t, uint64_t);
 
-static void at32_pbb_enable(devclk_t, int);
-static void at32_pbb_disable(devclk_t, int);
-static uint64_t at32_pbb_get_rate(devclk_t, int);
-static int at32_pbb_set_rate(devclk_t, int, uint64_t);
+static void at32_pll_enable(devclk_t);
+static void at32_pll_disable(devclk_t);
+static uint64_t at32_pll_get_rate(devclk_t);
+static int at32_pll_set_rate(devclk_t, uint64_t);
 
-static void at32_pll_enable(devclk_t, int);
-static void at32_pll_disable(devclk_t, int);
-static uint64_t at32_pll_get_rate(devclk_t, int);
-static int at32_pll_set_rate(devclk_t, int, uint64_t);
+static void at32_osc_enable(devclk_t);
+static void at32_osc_disable(devclk_t);
+static uint64_t at32_osc_get_rate(devclk_t);
+static int at32_osc_set_rate(devclk_t, uint64_t);
 
-static void at32_osc_enable(devclk_t, int);
-static void at32_osc_disable(devclk_t, int);
-static uint64_t at32_osc_get_rate(devclk_t, int);
-static int at32_osc_set_rate(devclk_t, int, uint64_t);
-
 /* Driver variables and private data */
 struct at32_pm_softc {
 	struct resource		*regs_res;
@@ -93,6 +88,14 @@
 	bus_space_handle_t	bsh;
 };
 
+#if 0
+struct at32_clk_softc {
+	const char *name;
+	int index;
+	devclk_t clk;
+};
+#endif
+
 static device_method_t at32_pm_methods[] = {
 	/* Device interface */
 	DEVMETHOD(device_probe,		at32_pm_probe),
@@ -130,27 +133,16 @@
 };
 DEFINE_CLASS(at32_pll, at32_pll_methods, sizeof(struct devclk));
 
-/* Class defining the PBB clock mask. */
-static kobj_method_t at32_pbb_methods[] = {
-	KOBJMETHOD(devclk_enable,	at32_pbb_enable),
-	KOBJMETHOD(devclk_disable,	at32_pbb_disable),
-	KOBJMETHOD(devclk_set_rate,	at32_pbb_set_rate),
-	KOBJMETHOD(devclk_get_rate,	at32_pbb_get_rate),
+/* Class defining the mci device clock. */
+static kobj_method_t at32_mci_methods[] = {
+	KOBJMETHOD(devclk_enable,	at32_mci_enable),
+	KOBJMETHOD(devclk_disable,	at32_mci_disable),
+	KOBJMETHOD(devclk_set_rate,	at32_mci_set_rate),
+	KOBJMETHOD(devclk_get_rate,	at32_mci_get_rate),
 	{0, 0},
 };
-DEFINE_CLASS(at32_pbb, at32_pbb_methods, sizeof(struct devclk));
+DEFINE_CLASS(at32_mci, at32_mci_methods, sizeof(struct devclk));
 
-/* Class defining the pba clock mask. */
-static kobj_method_t at32_pba_methods[] = {
-	KOBJMETHOD(devclk_enable,	at32_pba_enable),
-	KOBJMETHOD(devclk_disable,	at32_pba_disable),
-	KOBJMETHOD(devclk_set_rate,	at32_pba_set_rate),
-	KOBJMETHOD(devclk_get_rate,	at32_pba_get_rate),
-	{0, 0},
-};
-DEFINE_CLASS(at32_pba, at32_pba_methods, sizeof(struct devclk));
-
-
 /* Code */
 static int
 at32_pm_probe(device_t dev)
@@ -183,11 +175,9 @@
 at32_pm_activate(device_t dev)
 {
 	struct at32_pm_softc *sc = device_get_softc(dev);
+	devclk_t clk;
 	int err = ENOMEM;
 
-	/* Make sure device clock is enabled before writing */
-	devclk_enable(dev);
-
 	/* Set private data and map register space */
 	sc->regs_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &sc->regs_rid, 0,
 		~0, 0, RF_ACTIVE);
@@ -201,20 +191,18 @@
 
 	/* Register main clocks. */
 	//devclk_register_clock(dev, "osc32", NULL);
-	devclk_register_clock(dev, &at32_osc_class, "osc0", NULL);
+	devclk_register_clock(dev, &at32_osc_class, "osc0");
 	//devclk_register_clock(dev, &sc->osc1, "osc1", NULL);
 
 	/* Register prescalers. */
-	devclk_register_clock(dev, &at32_pll_class, "pll0", "osc0");
+	clk = devclk_register_clock(dev, &at32_pll_class, "pll0");
+	devclk_set_parent(clk, "osc0");
 	//devclk_register_clock(dev, &sc->pll1, "pll1", &sc->osc0);
 
 	/* Register master device clocks. */
-	devclk_register_clock(dev, &at32_pbb_class, "pbb", "pll0");
-	devclk_register_clock(dev, &at32_pba_class, "pba", "pll0");
-//	devclk_register_clock(dev, &sc->cpu, "cpu", &sc->pll0);
-//	devclk_register_clock(dev, &sc->hsb, "hsb", &sc->cpu);
-//	devclk_register_clock(dev, &sc->pba, "pba", &sc->hsb);
-//	devclk_register_clock(dev, &sc->pbb, "pbb", &sc->hsb);
+	clk = devclk_register_clock(dev, &at32_mci_class, "mci");
+	devclk_set_parent(clk, "pll0");
+	/* XXX: Implement rest of device clocks. */
 	return (0);
 
 err:
@@ -237,186 +225,81 @@
 }
 
 static void
-at32_pbb_enable(devclk_t clk, int index)
+at32_mci_enable(devclk_t clk)
 {
 	struct at32_pm_softc *sc;
 	uint32_t reg;
 
 	KASSERT(clk != NULL, ("NULL clk"));
-	KASSERT(index < 31, ("index > register width"));
 	sc = device_get_softc(clk->dev);
 	reg = RD4(AT32_PM_PBBMASK);
-	WR4(AT32_PM_PBBMASK, reg | (1 << index));
+	WR4(AT32_PM_PBBMASK, reg | (1 << 9));
 }
 
 static void
-at32_pbb_disable(devclk_t clk, int index)
+at32_mci_disable(devclk_t clk)
 {
 	struct at32_pm_softc *sc;
 	uint32_t reg;
 
 	KASSERT(clk != NULL, ("NULL clk"));
-	KASSERT(index < 31, ("index > register width"));
 	sc = device_get_softc(clk->dev);
 	reg = RD4(AT32_PM_PBBMASK);
-	WR4(AT32_PM_PBBMASK, reg & ~(1 << index));
+	WR4(AT32_PM_PBBMASK, reg & ~(1 << 9));
 }
 
-extern uint64_t clock_cpu_frequency;
-
 static uint64_t
-at32_pbb_get_rate(devclk_t clk, int index)
+at32_mci_get_rate(devclk_t clk)
 {
-	/* XXX: Temporary. */
-	return (clock_cpu_frequency);
-}
-
-static int
-at32_pbb_set_rate(devclk_t clk, int index, uint64_t rate)
-{
 	return (0);
-}
-
-static void
-at32_pba_enable(devclk_t clk, int index)
-{
-	struct at32_pm_softc *sc;
-	uint32_t reg;
+} 
 
-	KASSERT(clk != NULL, ("NULL clk"));
-	KASSERT(index < 31, ("index > register width"));
-	sc = device_get_softc(clk->dev);
-	reg = RD4(AT32_PM_PBAMASK);
-	WR4(AT32_PM_PBAMASK, reg | (1 << index));
-}
-
-static void
-at32_pba_disable(devclk_t clk, int index)
-{
-	struct at32_pm_softc *sc;
-	uint32_t reg;
-
-	KASSERT(clk != NULL, ("NULL clk"));
-	KASSERT(index < 31, ("index > register width"));
-	sc = device_get_softc(clk->dev);
-	reg = RD4(AT32_PM_PBAMASK);
-	WR4(AT32_PM_PBAMASK, reg & ~(1 << index));
-}
-
-static uint64_t
-at32_pba_get_rate(devclk_t clk, int index)
-{
-	/* XXX: Temporary. */
-	return (clock_cpu_frequency);
-}
-
 static int
-at32_pba_set_rate(devclk_t clk, int index, uint64_t rate)
+at32_mci_set_rate(devclk_t clk, uint64_t rate)
 {
 	return (0);
 }
 
 static void
-at32_osc_enable(devclk_t clk, int index)
+at32_osc_enable(devclk_t clk)
 {
-	/* In this case, index means which oscilliator. */
-	switch (index) {
-	case 0:	/* OSC0 */
-		break;
-	case 1:	/* OSC1 */
-		break;
-	case 2:	/* OSC32 */
-		break;
-	}
 } 
 
 static void
-at32_osc_disable(devclk_t clk, int index)
+at32_osc_disable(devclk_t clk)
 {
-	/* In this case, index means which oscilliator. */
-	switch (index) {
-	case 0:	/* OSC0 */
-		break;
-	case 1:	/* OSC1 */
-		break;
-	case 2:	/* OSC32 */
-		break;
-	}
 }
 
 static uint64_t
-at32_osc_get_rate(devclk_t clk, int index)
+at32_osc_get_rate(devclk_t clk)
 {
-	/* In this case, index means which oscilliator. */
-	switch (index) {
-	case 0:	/* OSC0 */
-		break;
-	case 1:	/* OSC1 */
-		break;
-	case 2:	/* OSC32 */
-		break;
-	}
+	return (0);
 } 
 
 static int
-at32_osc_set_rate(devclk_t clk, int index, uint64_t rate)
+at32_osc_set_rate(devclk_t clk, uint64_t rate)
 {
-	/* In this case, index means which oscilliator. */
-	switch (index) {
-	case 0:	/* OSC0 */
-		break;
-	case 1:	/* OSC1 */
-		break;
-	case 2:	/* OSC32 */
-		break;
-	}
 	return (0);
 }
 
 static void
-at32_pll_enable(devclk_t clk, int index)
+at32_pll_enable(devclk_t clk)
 {
-	/* Here, index means which pll. */
-	switch (index) {
-	case 0:	/* PLL0. */
-		break;
-	case 1:	/* PLL1. */
-		break;
-	}
 } 
 
 static void
-at32_pll_disable(devclk_t clk, int index)
+at32_pll_disable(devclk_t clk)
 {
-	/* Here, index means which pll. */
-	switch (index) {
-	case 0:	/* PLL0. */
-		break;
-	case 1:	/* PLL1. */
-		break;
-	}
 }
 
 static uint64_t
-at32_pll_get_rate(devclk_t clk, int index)
+at32_pll_get_rate(devclk_t clk)
 {
-	switch (index) {
-	case 0:	/* PLL0 */
-		break;
-	case 1:	/* PLL1 */
-		break;
-	}
 	return (0);
 } 
 
 static int
-at32_pll_set_rate(devclk_t clk, int index, uint64_t rate)
+at32_pll_set_rate(devclk_t clk, uint64_t rate)
 {
-	switch (index) {
-	case 0:	/* PLL0 */
-		break;
-	case 1:	/* PLL1 */
-		break;
-	}
 	return (0);
 }

==== //depot/projects/avr32/src/sys/avr32/avr32/at32_tc.c#3 (text+ko) ====

@@ -67,8 +67,7 @@
 	u_long, u_long, u_long, u_int);
 static int at32_tc_release_resource(device_t, device_t, int, int,
 	struct resource *);
-static const char *at32_tc_clk_lookup_name(device_t, device_t);
-static int at32_tc_clk_lookup_index(device_t, device_t);
+static const char *at32_tc_lookup_clock(device_t, device_t);
 
 /*** Driver variables and private data */
 struct at32_tc_softc {
@@ -99,8 +98,7 @@
 	DEVMETHOD(bus_setup_intr,		bus_generic_setup_intr),
 	DEVMETHOD(bus_teardown_intr,		bus_generic_teardown_intr),
 
-	DEVMETHOD(devclk_lookup_name,		at32_tc_clk_lookup_name),
-	DEVMETHOD(devclk_lookup_index,		at32_tc_clk_lookup_index),
+	DEVMETHOD(devclk_lookup_clock,		at32_tc_lookup_clock),
 
 	{0, 0},
 };
@@ -127,7 +125,7 @@
 	int rid, err = ENOMEM;
 
 	/* Make sure device clock is enabled before writing */
-	devclk_enable(dev);
+	//devclk_enable(dev);
 
 	/* Setup register space */
 	rid = 0;
@@ -193,7 +191,7 @@
 	}
 
 	/* Turn off device clock */
-	devclk_disable(dev);
+	//devclk_disable(dev);
 	return (0);
 }
 
@@ -354,23 +352,12 @@
 }
 
 static const char *
-at32_tc_clk_lookup_name(device_t dev, device_t child)
+at32_tc_lookup_clock(device_t dev, device_t child)
 {
 	device_t parent;
 
 	parent = device_get_parent(dev);
 	if (parent != NULL)
-		return (DEVCLK_LOOKUP_NAME(parent, dev));
-	return (NULL);
-}
-
-static int
-at32_tc_clk_lookup_index(device_t dev, device_t child)
-{
-	device_t parent;
-
-	parent = device_get_parent(dev);
-	if (parent != NULL)
-		return (DEVCLK_LOOKUP_INDEX(parent, dev));
+		return (DEVCLK_LOOKUP_CLOCK(parent, dev));
 	return (NULL);
 }

==== //depot/projects/avr32/src/sys/avr32/avr32/at32_tc_channel.c#3 (text+ko) ====

@@ -104,7 +104,7 @@
 	int rid, err = ENOMEM;
 
 	/* Make sure device clock is enabled before writing */
-	devclk_enable(dev);
+	//devclk_enable(dev);
 
 	/* Setup register space */
 	rid = 0;
@@ -157,7 +157,7 @@
 	}
 
 	/* Turn off device clock */
-	devclk_disable(dev);
+	//devclk_disable(dev);
 	return (0);
 }
 

==== //depot/projects/avr32/src/sys/avr32/conf/cpu/at32ap700x.hints#5 (text+ko) ====

@@ -34,29 +34,21 @@
 hint.uart.0.maddr="0xFFE00C00"
 hint.uart.0.msize="0x400"
 hint.uart.0.irq="6"
-hint.uart.0.clk="pba"
-hint.uart.0.clk_index="3"
 
 hint.uart.1.at="at32bus0"
 hint.uart.1.maddr="0xFFE01000"
 hint.uart.1.msize="0x400"
 hint.uart.1.irq="7"
-#hint.uart.1.clk="pba"
-#hint.uart.1.clk_index="4"
 
 hint.uart.2.at="at32bus0"
 hint.uart.2.maddr="0xFFE01400"
 hint.uart.2.msize="0x400"
 hint.uart.2.irq="8"
-#hint.uart.2.clk="pba"
-#hint.uart.2.clk_index="5"
 
 hint.uart.3.at="at32bus0"
 hint.uart.3.maddr="0xFFE01800"
 hint.uart.3.msize="0x400"
 hint.uart.3.irq="9"
-#hint.uart.3.clk="pba"
-#hint.uart.3.clk_index="6"
 
 hint.atmel_ssc.0.at="at32bus0"
 hint.atmel_ssc.0.maddr="0xFFE01C00"
@@ -168,8 +160,7 @@
 hint.atmel_mci.0.maddr="0xFFF02400"
 hint.atmel_mci.0.msize="0x400"
 hint.atmel_mci.0.irq="28"
-hint.atmel_mci.0.clk="pbb"
-hint.atmel_mci.0.clk_index="9"
+hint.atmel_mci.0.clk="mci"
 
 hint.at32_ac97c.0.at="at32bus0"
 hint.at32_ac97c.0.maddr="0xFFF02800"

==== //depot/projects/avr32/src/sys/kern/devclk_if.m#6 (text+ko) ====

@@ -33,36 +33,26 @@
 # Get device clock rate
 METHOD uint64_t get_rate {
 	devclk_t	_clk;
-	int		_index;
 };
 
 # Set device clock rate
 METHOD int set_rate {
 	devclk_t	_clk;
-	int		_index;
 	uint64_t	_rate;
 };
 
 # Enable a device clock
 METHOD void enable {
 	devclk_t	_clk;
-	int		_index;
 };
 
 # Disable a device clock
 METHOD void disable {
 	devclk_t	_clk;
-	int		_index;
 };
 
-# Look for clock name
-METHOD const char* lookup_name {
-	device_t	_dev;
-	device_t	_child;
-};
-
-# Look for clock index
-METHOD int lookup_index {
+# Look for clock name mapped to child
+METHOD const char* lookup_clock {
 	device_t	_dev;
 	device_t	_child;
 };

==== //depot/projects/avr32/src/sys/kern/subr_devclk.c#6 (text+ko) ====

@@ -55,19 +55,20 @@
 	device_t parent;
 	devclk_t clk;
 	const char *name;
-	int index;
 
-	/* The device parent should know which clock to use. */
+	/* Get the device knowing how the mapping is. */
 	parent = device_get_parent(dev);
 	if (parent != NULL) {
-		name = DEVCLK_LOOKUP_NAME(parent, dev);
-		if (name == NULL)
+		name = DEVCLK_LOOKUP_CLOCK(parent, dev);
+		if (name == NULL) {
+			device_printf(dev, "warning: devclk_get_rate() without "
+			    "clock\n");
 			goto bad;
-		index = DEVCLK_LOOKUP_INDEX(parent, dev);
+		}
 		clk = devclk_find_clock(name);
 		if (clk == NULL)
 			goto bad;
-		return (DEVCLK_GET_RATE(clk, index));
+		return (DEVCLK_GET_RATE(clk));
 	}
 bad:
 	return (EINVAL);
@@ -79,19 +80,20 @@
 	device_t parent;
 	devclk_t clk;
 	const char *name;
-	int index;
 
 	/* The device parent should know which clock to use. */
 	parent = device_get_parent(dev);
 	if (parent != NULL) {
-		name = DEVCLK_LOOKUP_NAME(parent, dev);
-		if (name == NULL)
+		name = DEVCLK_LOOKUP_CLOCK(parent, dev);
+		if (name == NULL) {
+			device_printf(dev, "warning: devclk_set_rate() without "
+			    "clock\n");
 			goto bad;
-		index = DEVCLK_LOOKUP_INDEX(parent, dev);
+		}
 		clk = devclk_find_clock(name);
 		if (clk == NULL)
 			goto bad;
-		DEVCLK_SET_RATE(clk, index, rate);
+		DEVCLK_SET_RATE(clk, rate);
 		return (0);
 	}
 bad:
@@ -104,18 +106,19 @@
 	device_t parent;
 	devclk_t clk;
 	const char *name;
-	int index;
 
 	/* The device parent should know which clock to use. */
 	parent = device_get_parent(dev);
 	if (parent != NULL) {
-		name = DEVCLK_LOOKUP_NAME(parent, dev);
-		if (name == NULL)
+		name = DEVCLK_LOOKUP_CLOCK(parent, dev);
+		if (name == NULL) {
+			device_printf(dev, "warning: devclk_enable() without "
+			    "clock\n");
 			return;
-		index = DEVCLK_LOOKUP_INDEX(parent, dev);
+		}
 		clk = devclk_find_clock(name);
 		if (clk != NULL)
-			DEVCLK_ENABLE(clk, index);
+			DEVCLK_ENABLE(clk);
 	}
 }
 
@@ -125,37 +128,45 @@
 	device_t parent;
 	devclk_t clk;
 	const char *name;
-	int index;
 
 	/* The device parent should know which clock to use. */
 	parent = device_get_parent(dev);
 	if (parent != NULL) {
-		name = DEVCLK_LOOKUP_NAME(parent, dev);
-		if (name == NULL)
+		name = DEVCLK_LOOKUP_CLOCK(parent, dev);
+		if (name == NULL) {
+			device_printf(dev, "warning: devclk_disable() without "
+			    "clock\n");
 			return;
-		index = DEVCLK_LOOKUP_INDEX(parent, dev);
+		}
 		clk = devclk_find_clock(name);
 		if (clk != NULL)
-			DEVCLK_DISABLE(clk, index);
+			DEVCLK_DISABLE(clk);
 	}
 }
 
 /**
  * Register clock to be associated with dev
  */
-void
-devclk_register_clock(device_t dev, kobj_class_t cls, const char *name,
-    const char *parent)
+devclk_t
+devclk_register_clock(device_t dev, kobj_class_t cls, const char *name)
 {
 	devclk_t clk;
 	
 	clk = kobj_create(cls, M_DEVBUF, M_WAITOK | M_ZERO);
 	clk->dev = dev;
-	strlcpy(clk->name, name, sizeof(clk->name));
-	clk->parent = ((parent == NULL) ? NULL : devclk_find_clock(parent));
+	clk->name = strdup(name, M_DEVBUF);
 
 	/* Insert clock into list. */
 	STAILQ_INSERT_HEAD(&devclks, clk, link);
+	return (clk);
+}
+
+void
+devclk_set_parent(devclk_t clk, const char *parent)
+{
+
+	KASSERT(parent != NULL, ("NULL parent"));
+	clk->parent = devclk_find_clock(parent);
 }
 
 static devclk_t

==== //depot/projects/avr32/src/sys/sys/devclk.h#6 (text+ko) ====

@@ -7,16 +7,20 @@
 struct devclk {
 	KOBJ_FIELDS;
 	device_t dev;		/* Device responsible for clock. */
-	char name[32];		/* Clock name.			 */
 	struct devclk *parent;	/* Clock we originate from.	 */
+	char *name;		/* Clock name.			 */
 	int index;		/* Our index in our parent. 	 */
 	STAILQ_ENTRY(devclk) link;
+	void *data;		/* Arch dependant data.		 */
 };
 typedef struct devclk* devclk_t;
 typedef STAILQ_HEAD(, devclk) devclk_list_t;
 
 #include "devclk_if.h"
 
+/**
+ * Initialize clock manager.
+ */
 void devclk_init(void);
 
 /**
@@ -42,12 +46,11 @@
 /**
  * Add a clock to the devclk manager.
  */
-void	devclk_register_clock(device_t, kobj_class_t, const char *, const char *);
+devclk_t	devclk_register_clock(device_t, kobj_class_t, const char *);
 
 /**
- * Register a mapping from device to clock
+ * Set the parent of a device clock.
  */
-void	devclk_register_map(device_t, const char *, int);
-
+void	devclk_set_parent(devclk_t, const char *);
 #endif /* _KERNEL */
 #endif /* !_SYS_DEVCLK_H_ */


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