PERFORCE change 149482 for review

[Rafal Jaworowski]

http://perforce.freebsd.org/chv.cgi?CH=149482

Change 149482 by raj at raj_mimi on 2008/09/09 16:06:53

	Introduce support for Marvell Kirkwood family of SOCs, based on
	the Feroceon/Shiva 88FR131 core.
	
	The new kernel config file is DB-88F6XXX. The code was tested on
	88F6281 chips with the following evaluation systems: DB-88F6281,
	RD-88F6281.
	
	1. build the kernel:
	
	make buildkernel TARGET_ARCH=arm KERNCONF=DB-88F6XXX
	
	2. run from U-Boot:
	
	>> tftp 200000 mv6281/kernel.bin
	>> go 200000
	
	Obtained from:	Marvell, Semihalf

Affected files ...

.. //depot/projects/arm/src/sys/arm/arm/elf_trampoline.c#20 edit
.. //depot/projects/arm/src/sys/arm/conf/DB-88F6XXX#1 add
.. //depot/projects/arm/src/sys/arm/include/intr.h#9 edit
.. //depot/projects/arm/src/sys/arm/mv/kirkwood/db88f6xxx.c#1 add
.. //depot/projects/arm/src/sys/arm/mv/kirkwood/files.db88f6xxx#1 add
.. //depot/projects/arm/src/sys/arm/mv/kirkwood/kirkwood.c#1 add
.. //depot/projects/arm/src/sys/arm/mv/kirkwood/std.db88f6xxx#1 add
.. //depot/projects/arm/src/sys/conf/Makefile.arm#26 edit
.. //depot/projects/arm/src/sys/conf/options.arm#29 edit

Differences ...

==== //depot/projects/arm/src/sys/arm/arm/elf_trampoline.c#20 (text+ko) ====

@@ -73,6 +73,8 @@
 #endif
 #ifdef CPU_XSCALE_81342
 #define cpu_l2cache_wbinv_all	xscalec3_l2cache_purge
+#elif defined(SOC_MV_KIRKWOOD) || defined(SOC_MV_DISCOVERY)
+#define cpu_l2cache_wbinv_all	feroceon_l2cache_wbinv_all
 #else
 #define cpu_l2cache_wbinv_all()	
 #endif

==== //depot/projects/arm/src/sys/arm/include/intr.h#9 (text+ko) ====

@@ -44,7 +44,9 @@
 #elif defined(CPU_XSCALE_PXA2X0)
 #include <arm/xscale/pxa/pxareg.h>
 #define	NIRQ		IRQ_GPIO_MAX
-#elif defined(CPU_ARM9)
+#elif defined(SOC_MV_DISCOVERY)
+#define NIRQ		96
+#elif defined(CPU_ARM9) || defined(SOC_MV_KIRKWOOD)
 #define NIRQ		64
 #else
 #define NIRQ		32

==== //depot/projects/arm/src/sys/conf/Makefile.arm#26 (text+ko) ====

@@ -75,7 +75,8 @@
 	$S/$M/$M/cpufunc_asm_arm8.S $S/$M/$M/cpufunc_asm_arm9.S \
 	$S/$M/$M/cpufunc_asm_sa1.S $S/$M/$M/cpufunc_asm_arm10.S \
 	$S/$M/$M/cpufunc_asm_xscale.S $S/$M/$M/cpufunc_asm.S \
-	$S/$M/$M/cpufunc_asm_xscale_c3.S $S/$M/$M/cpufunc_asm_armv5_ec.S
+	$S/$M/$M/cpufunc_asm_xscale_c3.S $S/$M/$M/cpufunc_asm_armv5_ec.S \
+	$S/$M/$M/cpufunc_asm_feroceon.S
 KERNEL_EXTRA=trampoline
 KERNEL_EXTRA_INSTALL=kernel.gz.tramp
 trampoline: ${KERNEL_KO}.tramp

==== //depot/projects/arm/src/sys/conf/options.arm#29 (text+ko) ====

@@ -23,6 +23,7 @@
 LOADERRAMADDR		opt_global.h
 PHYSADDR		opt_global.h
 SKYEYE_WORKAROUNDS	opt_global.h
+SOC_MV_KIRKWOOD		opt_global.h
 SOC_MV_ORION		opt_global.h
 STARTUP_PAGETABLE_ADDR	opt_global.h
 XSCALE_CACHE_READ_WRITE_ALLOCATE	opt_global.h