PERFORCE change 153775 for review
Sam Leffler
sam at FreeBSD.org
Sat Nov 29 10:31:02 PST 2008
http://perforce.freebsd.org/chv.cgi?CH=153775
Change 153775 by sam at sam_ebb on 2008/11/29 18:30:52
try to modularize per-board setup better and add Cambria; it's
still a mess
Affected files ...
.. //depot/projects/vap/sys/arm/xscale/ixp425/avila_ata.c#3 edit
Differences ...
==== //depot/projects/vap/sys/arm/xscale/ixp425/avila_ata.c#3 (text+ko) ====
@@ -67,13 +67,64 @@
#include <dev/ata/ata-all.h>
#include <ata_if.h>
-#define AVILA_IDE_GPIN 12 /* GPIO pin # */
-#define AVILA_IDE_IRQ IXP425_INT_GPIO_12
-#define AVILA_IDE_CTRL 0x06 /* control register */
+#define AVILA_IDE_CTRL 0x06
+
+struct ata_config {
+ const char *desc; /* description for probe */
+ uint8_t gpin; /* GPIO pin */
+ uint8_t irq; /* IRQ */
+ uint32_t base16; /* CS base addr for 16-bit */
+ uint32_t size16; /* CS size for 16-bit */
+ uint32_t off16; /* CS offset for 16-bit */
+ uint32_t basealt; /* CS base addr for alt */
+ uint32_t sizealt; /* CS size for alt */
+ uint32_t offalt; /* CS offset for alt */
+};
+
+static const struct ata_config *
+ata_getconfig(struct ixp425_softc *sa)
+{
+ static const struct ata_config configs[] = {
+ { .desc = "Gateworks Avila IDE/CF Controller",
+ .gpin = 12,
+ .irq = IXP425_INT_GPIO_12,
+ .base16 = IXP425_EXP_BUS_CS1_HWBASE,
+ .size16 = IXP425_EXP_BUS_CS1_SIZE,
+ .off16 = EXP_TIMING_CS1_OFFSET,
+ .basealt = IXP425_EXP_BUS_CS2_HWBASE,
+ .sizealt = IXP425_EXP_BUS_CS2_SIZE,
+ .offalt = EXP_TIMING_CS2_OFFSET,
+ },
+ { .desc = "Gateworks Cambria IDE/CF Controller",
+ .gpin = 12,
+ .irq = IXP425_INT_GPIO_12,
+ .base16 = CAMBRIA_CFSEL0_HWBASE,
+ .size16 = CAMBRIA_CFSEL0_SIZE,
+ .off16 = EXP_TIMING_CS3_OFFSET,
+ .basealt = CAMBRIA_CFSEL1_HWBASE,
+ .sizealt = CAMBRIA_CFSEL1_SIZE,
+ .offalt = EXP_TIMING_CS3_OFFSET,
+ },
+ { .desc = "ADI Pronghorn Metro IDE/CF Controller",
+ .gpin = 0,
+ .irq = IXP425_INT_GPIO_0,
+ .base16 = IXP425_EXP_BUS_CS3_HWBASE,
+ .size16 = IXP425_EXP_BUS_CS3_SIZE,
+ .off16 = EXP_TIMING_CS3_OFFSET,
+ .basealt = IXP425_EXP_BUS_CS4_HWBASE,
+ .sizealt = IXP425_EXP_BUS_CS4_SIZE,
+ .offalt = EXP_TIMING_CS4_OFFSET,
+ },
+ };
-#define PRONGHORN_IDE_GPIN 0 /* GPIO pin # */
-#define PRONGHORN_IDE_IRQ IXP425_INT_GPIO_0
-#define PRONGHORN_IDE_CNTRL 0x06 /* control register */
+ /* XXX honor hint? (but then no multi-board support) */
+ /* XXX total hack */
+ if ((cpu_id() & CPU_ID_CPU_MASK) == CPU_ID_IXP435)
+ return &configs[1]; /* Cambria */
+ if (EXP_BUS_READ_4(sa, EXP_TIMING_CS2_OFFSET) != 0)
+ return &configs[0]; /* Avila */
+ return &configs[2]; /* Pronghorn */
+}
struct ata_avila_softc {
device_t sc_dev;
@@ -105,14 +156,14 @@
ata_avila_probe(device_t dev)
{
struct ixp425_softc *sa = device_get_softc(device_get_parent(dev));
+ const struct ata_config *config;
- /* XXX any way to check? */
- if (EXP_BUS_READ_4(sa, EXP_TIMING_CS2_OFFSET) != 0)
- device_set_desc_copy(dev, "Gateworks Avila IDE/CF Controller");
- else
- device_set_desc_copy(dev,
- "ADI Pronghorn Metro IDE/CF Controller");
- return 0;
+ config = ata_getconfig(sa);
+ if (config != NULL) {
+ device_set_desc_copy(dev, config->desc);
+ return 0;
+ }
+ return ENXIO;
}
static int
@@ -120,41 +171,25 @@
{
struct ata_avila_softc *sc = device_get_softc(dev);
struct ixp425_softc *sa = device_get_softc(device_get_parent(dev));
- u_int32_t alt_t_off, ide_gpin, ide_irq;
+ const struct ata_config *config;
+
+ config = ata_getconfig(sa);
+ KASSERT(config != NULL, ("no board config"));
sc->sc_dev = dev;
/* NB: borrow from parent */
sc->sc_iot = sa->sc_iot;
sc->sc_exp_ioh = sa->sc_exp_ioh;
- if (EXP_BUS_READ_4(sc, EXP_TIMING_CS2_OFFSET) != 0) {
- /* Avila board */
- if (bus_space_map(sc->sc_iot, IXP425_EXP_BUS_CS1_HWBASE,
- IXP425_EXP_BUS_CS1_SIZE, 0, &sc->sc_ioh))
- panic("%s: unable to map Expansion Bus CS1 window",
- __func__);
- if (bus_space_map(sc->sc_iot, IXP425_EXP_BUS_CS2_HWBASE,
- IXP425_EXP_BUS_CS2_SIZE, 0, &sc->sc_alt_ioh))
- panic("%s: unable to map Expansion Bus CS2 window",
- __func__);
- ide_gpin = AVILA_IDE_GPIN;
- ide_irq = AVILA_IDE_IRQ;
- sc->sc_16bit_off = EXP_TIMING_CS1_OFFSET;
- alt_t_off = EXP_TIMING_CS2_OFFSET;
- } else {
- /* Pronghorn */
- if (bus_space_map(sc->sc_iot, IXP425_EXP_BUS_CS3_HWBASE,
- IXP425_EXP_BUS_CS3_SIZE, 0, &sc->sc_ioh))
- panic("%s: unable to map Expansion Bus CS3 window",
- __func__);
- if (bus_space_map(sc->sc_iot, IXP425_EXP_BUS_CS4_HWBASE,
- IXP425_EXP_BUS_CS4_SIZE, 0, &sc->sc_alt_ioh))
- panic("%s: unable to map Expansion Bus CS4 window",
- __func__);
- ide_gpin = PRONGHORN_IDE_GPIN;
- ide_irq = PRONGHORN_IDE_IRQ;
- sc->sc_16bit_off = EXP_TIMING_CS3_OFFSET;
- alt_t_off = EXP_TIMING_CS4_OFFSET;
- }
+
+ if (bus_space_map(sc->sc_iot, config->base16, config->size16,
+ 0, &sc->sc_ioh))
+ panic("%s: cannot map 16-bit window (0x%x/0x%x)",
+ __func__, config->base16, config->size16);
+ if (bus_space_map(sc->sc_iot, config->basealt, config->sizealt,
+ 0, &sc->sc_alt_ioh))
+ panic("%s: cannot map alt window (0x%x/0x%x)",
+ __func__, config->basealt, config->sizealt);
+ sc->sc_16bit_off = config->off16;
/*
* Craft special resource for ATA bus space ops
@@ -184,30 +219,30 @@
rman_set_bushandle(&sc->sc_alt_ata, sc->sc_alt_ioh);
GPIO_CONF_WRITE_4(sa, IXP425_GPIO_GPOER,
- GPIO_CONF_READ_4(sa, IXP425_GPIO_GPOER) | (1<<ide_gpin));
+ GPIO_CONF_READ_4(sa, IXP425_GPIO_GPOER) | (1<<config->gpin));
/* set interrupt type */
- GPIO_CONF_WRITE_4(sa, GPIO_TYPE_REG(ide_gpin),
- (GPIO_CONF_READ_4(sa, GPIO_TYPE_REG(ide_gpin)) &~
- GPIO_TYPE(ide_gpin, GPIO_TYPE_MASK)) |
- GPIO_TYPE(ide_gpin, GPIO_TYPE_EDG_RISING));
+ GPIO_CONF_WRITE_4(sa, GPIO_TYPE_REG(config->gpin),
+ (GPIO_CONF_READ_4(sa, GPIO_TYPE_REG(config->gpin)) &~
+ GPIO_TYPE(config->gpin, GPIO_TYPE_MASK)) |
+ GPIO_TYPE(config->gpin, GPIO_TYPE_EDG_RISING));
/* clear ISR */
- GPIO_CONF_WRITE_4(sa, IXP425_GPIO_GPISR, (1<<ide_gpin));
+ GPIO_CONF_WRITE_4(sa, IXP425_GPIO_GPISR, (1<<config->gpin));
/* configure CS1/3 window, leaving timing unchanged */
EXP_BUS_WRITE_4(sc, sc->sc_16bit_off,
EXP_BUS_READ_4(sc, sc->sc_16bit_off) |
EXP_BYTE_EN | EXP_WR_EN | EXP_BYTE_RD16 | EXP_CS_EN);
/* configure CS2/4 window, leaving timing unchanged */
- EXP_BUS_WRITE_4(sc, alt_t_off,
- EXP_BUS_READ_4(sc, alt_t_off) |
+ EXP_BUS_WRITE_4(sc, config->offalt,
+ EXP_BUS_READ_4(sc, config->offalt) |
EXP_BYTE_EN | EXP_WR_EN | EXP_BYTE_RD16 | EXP_CS_EN);
/* setup interrupt */
sc->sc_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &sc->sc_rid,
- ide_irq, ide_irq, 1, RF_ACTIVE);
+ config->irq, config->irq, 1, RF_ACTIVE);
if (!sc->sc_irq)
- panic("Unable to allocate irq %u.\n", ide_irq);
+ panic("Unable to allocate irq %u.\n", config->irq);
bus_setup_intr(dev, sc->sc_irq,
INTR_TYPE_BIO | INTR_MPSAFE | INTR_ENTROPY,
NULL, ata_avila_intr, sc, &sc->sc_ih);
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