PERFORCE change 134243 for review

[Warner Losh]

http://perforce.freebsd.org/chv.cgi?CH=134243

Change 134243 by imp at imp_paco-paco on 2008/01/27 21:29:02

	Eliminate mips_cpu_switch.  No need for the indirection here.  It
	almost guarnatees a cache miss and requires more pages in the
	critical path.  This makes the call to cpu_switch direct.  We still
	don't use the lock passed in...

Affected files ...

.. //depot/projects/mips2-jnpr/src/sys/mips/mips/pm_machdep.c#5 edit
.. //depot/projects/mips2-jnpr/src/sys/mips/mips/swtch.S#9 edit
.. //depot/projects/mips2-jnpr/src/sys/mips/mips/trap.c#8 edit

Differences ...

==== //depot/projects/mips2-jnpr/src/sys/mips/mips/pm_machdep.c#5 (text+ko) ====

@@ -478,8 +478,12 @@
 	td->td_frame->sp = ((register_t) stack) & ~(sizeof(__int64_t) - 1);
 	td->td_frame->pc = entry & ~3;
 	td->td_frame->t9 = entry & ~3; /* abicall req */
-	td->td_frame->sr = SR_KSU_USER | SR_EXL | SR_INT_ENAB;
-	td->td_frame->sr |=  idle_mask & ALL_INT_MASK;
+#if 0
+//	td->td_frame->sr = SR_KSU_USER | SR_EXL | SR_INT_ENAB;
+//?	td->td_frame->sr |=  idle_mask & ALL_INT_MASK;
+#else
+	td->td_frame->sr = SR_KSU_USER | SR_EXL;// mips2 also did COP_0_BIT
+#endif
 	/*
 	 * FREEBSD_DEVELOPERS_FIXME:
 	 * Setup any other CPU-Specific registers (Not MIPS Standard)
@@ -531,10 +535,3 @@
 	td->td_md.md_ss_addr = 0;
 	return 0;
 }
-
-void
-cpu_switch(struct thread *old, struct thread *new, struct mtx * new_lock)
-{
-
-	func_3args_asmmacro(&mips_cpu_switch, old, new, new_lock);
-}

==== //depot/projects/mips2-jnpr/src/sys/mips/mips/swtch.S#9 (text+ko) ====

@@ -274,10 +274,10 @@
 /*
  *XXX Fixme:	should be written to new interface that requires lock
  *		storage.  We fake it for now.
- * mips_cpu_switch(struct thread *old, struct thread *new);
+ * cpu_switch(struct thread *old, struct thread *new);
  * Find the highest priority process and resume it.
  */
-NON_LEAF(mips_cpu_switch, STAND_FRAME_SIZE, ra)
+NON_LEAF(cpu_switch, STAND_FRAME_SIZE, ra)
 	mfc0	t0, COP_0_STATUS_REG		# t0 = saved status register
 	nop
 	nop
@@ -405,7 +405,7 @@
 
 	j	ra
 	nop
-END(mips_cpu_switch)
+END(cpu_switch)
 KSEG0TEXT_END;
 
 /*----------------------------------------------------------------------------

==== //depot/projects/mips2-jnpr/src/sys/mips/mips/trap.c#8 (text+ko) ====

@@ -1339,8 +1339,8 @@
 		subr = (unsigned) MipsKernTLBInvalidException;
 	else if (pcBetween(MipsUserTLBInvalidException, MipsTLBMissException))
 		subr = (unsigned) MipsUserTLBInvalidException;
-	else if (pcBetween(mips_cpu_switch, MipsSwitchFPState))
-		subr = (unsigned) mips_cpu_switch;
+	else if (pcBetween(cpu_switch, MipsSwitchFPState))
+		subr = (unsigned) cpu_switch;
 	else if (pcBetween(_locore, _locoreEnd))	{
 		subr = (unsigned) _locore;
 		ra = 0;
@@ -1528,7 +1528,7 @@
 	Name(MipsUserGenException),
 	Name(MipsKernIntr),
 	Name(MipsUserIntr),
-	Name(mips_cpu_switch),
+	Name(cpu_switch),
 	{0, 0}
 };