PERFORCE change 134091 for review

[Randall R. Stewart]

http://perforce.freebsd.org/chv.cgi?CH=134091

Change 134091 by rrs at rrs-mips2-jnpr on 2008/01/25 16:17:26

	Gets it so the serial driver compiles.

Affected files ...

.. //depot/projects/mips2-jnpr/src/sys/mips/conf/OCTEON_rrs#1 add
.. //depot/projects/mips2-jnpr/src/sys/mips/mips/tick.c#3 edit
.. //depot/projects/mips2-jnpr/src/sys/mips/mips32/octeon32/bus_octeon.h#1 add
.. //depot/projects/mips2-jnpr/src/sys/mips/mips32/octeon32/cpuinfo_octeon.h#1 branch
.. //depot/projects/mips2-jnpr/src/sys/mips/mips32/octeon32/files.octeon32#5 edit
.. //depot/projects/mips2-jnpr/src/sys/mips/mips32/octeon32/octeon_machdep.c#1 add
.. //depot/projects/mips2-jnpr/src/sys/mips/mips32/octeon32/octeon_pcmap_regs.h#1 branch
.. //depot/projects/mips2-jnpr/src/sys/mips/mips32/octeon32/std.octeon32#4 edit
.. //depot/projects/mips2-jnpr/src/sys/mips/mips32/octeon32/uart_bus_octeonusart.c#4 edit
.. //depot/projects/mips2-jnpr/src/sys/mips/mips32/octeon32/uart_cpu_octeonusart.c#4 edit
.. //depot/projects/mips2-jnpr/src/sys/mips/mips32/octeon32/uart_dev_oct16550.c#3 edit

Differences ...

==== //depot/projects/mips2-jnpr/src/sys/mips/mips/tick.c#3 (text+ko) ====

@@ -72,6 +72,14 @@
 	800,			/* quality (adjusted in code) */
 };
 
+void tick_early_init (uint32_t clock_hz)
+{
+  /* Cavium early init code */
+  counter_freq = clock_hz;
+  counts_per_usec = (clock_hz / (1000 * 1000));
+}
+
+
 static uint64_t
 tick_ticker(void)
 {
@@ -141,6 +149,8 @@
 	return (mips_rd_count());
 }
 
+#ifdef __DUPLCATE_OUT_WARNER
+/* fix me */
 /*
  * Wait for about n microseconds (at least!).
  */
@@ -172,6 +182,7 @@
 		}
 	}
 }
+#endif
 
 int
 sysbeep(int pitch, int period)

==== //depot/projects/mips2-jnpr/src/sys/mips/mips32/octeon32/files.octeon32#5 (text+ko) ====

@@ -5,8 +5,9 @@
 mips/mips32/octeon32/uart_cpu_octeonusart.c	optional uart
 mips/mips32/octeon32/uart_bus_octeonusart.c	optional uart
 mips/mips32/octeon32/uart_dev_oct16550.c	optional uart
+mips/mips/tick.c                                standard
 #mips/mips/mp_machdep.c                          optional smp
-#mips/mips4k/octeon32/octeon_machdep.c		standard
+mips/mips32/octeon32/octeon_machdep.c		standard
 #mips/mips4k/octeon32/octeon_pci.c		standard
 
 #dev/flash/octeon_ebt3000_cf.c			optional cf

==== //depot/projects/mips2-jnpr/src/sys/mips/mips32/octeon32/std.octeon32#4 (text+ko) ====


==== //depot/projects/mips2-jnpr/src/sys/mips/mips32/octeon32/uart_bus_octeonusart.c#4 (text+ko) ====

@@ -60,6 +60,9 @@
 
 #include "uart_if.h"
 
+extern struct uart_class uart_oct16550_class;
+
+
 static int uart_octeon_probe(device_t dev);
 static void octeon_uart_identify(driver_t * drv, device_t parent);
 

==== //depot/projects/mips2-jnpr/src/sys/mips/mips32/octeon32/uart_cpu_octeonusart.c#4 (text+ko) ====

@@ -53,6 +53,7 @@
 bus_space_tag_t uart_bus_space_io;
 bus_space_tag_t uart_bus_space_mem;
 
+extern struct uart_class uart_oct16550_class;
 extern struct uart_ops octeon_usart_ops;
 extern struct bus_space octeon_bs_tag;
 

==== //depot/projects/mips2-jnpr/src/sys/mips/mips32/octeon32/uart_dev_oct16550.c#3 (text+ko) ====

@@ -71,6 +71,15 @@
 
 #include <dev/ic/ns16550.h>
 
+/* Octeon specific includes with loads of in-lines */
+#include <mips/mips32/octeon32/octeon_pcmap_regs.h>
+#include <mips/mips32/octeon32/bus_octeon.h>
+
+/* Cavium specific defines pulled from there update of ns16559.h */
+#define IIR_BUSY           0x7
+#define com_usr            39      /* Octeon 16750/16550 Uart Status Reg */
+#define REG_USR            com_usr
+#define USR_TXFIFO_NOTFULL 2    /* Uart TX FIFO Not full */
 
 #include "uart_if.h"