PERFORCE change 133519 for review

[Warner Losh]

http://perforce.freebsd.org/chv.cgi?CH=133519

Change 133519 by imp at imp_lighthouse on 2008/01/18 03:22:01

	We need some stuff from in here.  There's a bunch of undefines now,
	but I'll sort that out in the next iteration.

Affected files ...

.. //depot/projects/mips2-jnpr/src/sys/conf/files.mips#8 edit
.. //depot/projects/mips2-jnpr/src/sys/mips/include/locore.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/mips/cpu-mips2.c#2 edit

Differences ...

==== //depot/projects/mips2-jnpr/src/sys/conf/files.mips#8 (text+ko) ====

@@ -43,6 +43,7 @@
 # ----------------------------------------------------------------------
 mips/mips/autoconf.c		standard
 mips/mips/cpu.c			standard
+mips/mips/cpu-mips2.c		standard
 mips/mips/elf_machdep.c		standard
 mips/mips/exception.S		standard
 mips/mips/gdb_machdep.c		standard

==== //depot/projects/mips2-jnpr/src/sys/mips/include/locore.h#2 (text+ko) ====

@@ -1,4 +1,4 @@
-/* $NetBSD: locore.h,v 1.62 2002/06/01 13:45:45 simonb Exp $ */
+/* $NetBSD: locore.h,v 1.78 2007/10/17 19:55:36 garbled Exp $ */
 
 /*
  * Copyright 1996 The Board of Trustees of The Leland Stanford
@@ -34,24 +34,31 @@
 /*
  * CPU identification, from PRID register.
  */
+typedef int mips_prid_t;
 
-#define	MIPS_PRID_REV(x)	(((x) >>  0) & 0x00ff)
-#define	MIPS_PRID_IMPL(x)	(((x) >>  8) & 0x00ff)
+#define MIPS_PRID_REV(x)	(((x) >>  0) & 0x00ff)
+#define MIPS_PRID_IMPL(x)	(((x) >>  8) & 0x00ff)
 
 /* pre-MIPS32/64 */
-#define	MIPS_PRID_RSVD(x)	(((x) >> 16) & 0xffff)
-#define	MIPS_PRID_REV_MIN(x)	((MIPS_PRID_REV(x) >> 0) & 0x0f)
-#define	MIPS_PRID_REV_MAJ(x)	((MIPS_PRID_REV(x) >> 4) & 0x0f)
+#define MIPS_PRID_RSVD(x)	(((x) >> 16) & 0xffff)
+#define MIPS_PRID_REV_MIN(x)	((MIPS_PRID_REV(x) >> 0) & 0x0f)
+#define MIPS_PRID_REV_MAJ(x)	((MIPS_PRID_REV(x) >> 4) & 0x0f)
 
 /* MIPS32/64 */
-#define	MIPS_PRID_CID(x)	(((x) >> 16) & 0x00ff)	/* Company ID */
-#define	    MIPS_PRID_CID_PREHISTORIC	0x00	/* Not MIPS32/64 */
-#define	    MIPS_PRID_CID_MTI		0x01	/* MIPS Technologies, Inc. */
-#define	    MIPS_PRID_CID_BROADCOM	0x02	/* Broadcom */
-#define	    MIPS_PRID_CID_ALCHEMY	0x03	/* Alchemy Semiconductor */
-#define	    MIPS_PRID_CID_SIBYTE	0x04	/* SiByte */
-#define	    MIPS_PRID_CID_SANDCRAFT	0x05	/* SandCraft */
-#define	MIPS_PRID_COPTS(x)	(((x) >> 24) & 0x00ff)	/* Company Options */
+#define MIPS_PRID_CID(x)	(((x) >> 16) & 0x00ff)	/* Company ID */
+#define     MIPS_PRID_CID_PREHISTORIC	0x00	/* Not MIPS32/64 */
+#define     MIPS_PRID_CID_MTI		0x01	/* MIPS Technologies, Inc. */
+#define     MIPS_PRID_CID_BROADCOM	0x02	/* Broadcom */
+#define     MIPS_PRID_CID_ALCHEMY	0x03	/* Alchemy Semiconductor */
+#define     MIPS_PRID_CID_SIBYTE	0x04	/* SiByte */
+#define     MIPS_PRID_CID_SANDCRAFT	0x05	/* SandCraft */
+#define     MIPS_PRID_CID_PHILIPS	0x06	/* Philips */
+#define     MIPS_PRID_CID_TOSHIBA	0x07	/* Toshiba */
+#define     MIPS_PRID_CID_LSI		0x08	/* LSI */
+				/*	0x09	unannounced */
+				/*	0x0a	unannounced */
+#define     MIPS_PRID_CID_LEXRA		0x0b	/* Lexra */
+#define MIPS_PRID_COPTS(x)	(((x) >> 24) & 0x00ff)	/* Company Options */
 
 #ifdef _KERNEL
 #ifdef __HAVE_MIPS_MACHDEP_CACHE_CONFIG

==== //depot/projects/mips2-jnpr/src/sys/mips/mips/cpu-mips2.c#2 (text+ko) ====

@@ -48,12 +48,10 @@
 #include <machine/tlb.h>
 
 /*
- * cpu_id and fpu_id are initialized in locore.S.  mips_num_tlb_entries is
+ * mips_num_tlb_entries is
  * initialized by us in the mips_cpu_init thingo.
  */
 int mips_num_tlb_entries;
-int cpu_id;
-int fpu_id;
 
 void	mips_get_identity(struct mips_cpuinfo *cpuinfo);