PERFORCE change 134782 for review
Olivier Houchard
cognet at FreeBSD.org
Mon Feb 4 06:59:34 PST 2008
http://perforce.freebsd.org/chv.cgi?CH=134782
Change 134782 by cognet at cognet-mips on 2008/02/04 14:58:39
Apply the same hack gonzo did in tlb.S to swtch.S, and revert back
to td_kstack in KSEG2 (gonzo is my hero).
Affected files ...
.. //depot/projects/mips2-jnpr/src/sys/mips/mips/swtch.S#12 edit
.. //depot/projects/mips2-jnpr/src/sys/mips/mips/vm_machdep.c#17 edit
Differences ...
==== //depot/projects/mips2-jnpr/src/sys/mips/mips/swtch.S#12 (text+ko) ====
@@ -81,12 +81,14 @@
#define _MFC0 dmfc0
#define _MTC0 dmtc0
#define WIRED_SHIFT 34
+#define PAGE_SHIFT 34
#else
#define _SLL sll
#define _SRL srl
#define _MFC0 mfc0
#define _MTC0 mtc0
#define WIRED_SHIFT 2
+#define PAGE_SHIFT 2
#endif
.set noreorder # Noreorder is default style!
#if defined(ISA_MIPS32)
@@ -356,8 +358,10 @@
nop
pgm:
bltz s0, entry0set
- li s0, MIPS_KSEG0_START # invalidate tlb entry
- mtc0 s0, COP_0_TLB_HI
+ li t1, MIPS_KSEG0_START + 0x0fff0000 # invalidate tlb entry
+ sll s0, PAGE_SHIFT + 1
+ addu t1, s0
+ mtc0 t1, COP_0_TLB_HI
mtc0 zero, COP_0_TLB_LO0
mtc0 zero, COP_0_TLB_LO1
HAZARD_DELAY
==== //depot/projects/mips2-jnpr/src/sys/mips/mips/vm_machdep.c#17 (text+ko) ====
@@ -107,23 +107,17 @@
{
register struct proc *p1;
struct pcb *pcb2;
-#if 0
pt_entry_t *pte;
int i;
-#endif
p1 = td1->td_proc;
if ((flags & RFPROC) == 0)
return;
-#if 0
if(td2->td_kstack & (1 << PAGE_SHIFT))
td2->td_md.md_realstack = td2->td_kstack + PAGE_SIZE;
else
td2->td_md.md_realstack = td2->td_kstack;
-#endif
- td2->td_md.md_realstack =
- MIPS_PHYS_TO_KSEG0(MIPS_CACHED_TO_PHYS((vm_offset_t)td2->td_kstack));
/* Point the pcb to the top of the stack */
pcb2 = (struct pcb *)(td2->td_md.md_realstack +
(td2->td_kstack_pages - 1) * PAGE_SIZE) - 1;
@@ -149,7 +143,6 @@
td2->td_frame->v1 = 1;
td2->td_frame->a3 = 0;
-#if 0
if (!(pte = pmap_segmap(kernel_pmap, td2->td_md.md_realstack)))
panic("cpu_fork: invalid segmap");
pte += ((vm_offset_t)td2->td_md.md_realstack >> PGSHIFT) & (NPTEPG - 1);
@@ -158,7 +151,6 @@
td2->td_md.md_upte[i] = *pte & ~(PG_RO|PG_WIRED);
pte++;
}
-#endif
if (td1 == PCPU_GET(fpcurthread))
MipsSaveCurFPState(td1);
@@ -229,7 +221,6 @@
void
cpu_thread_swapin(struct thread *td)
{
-#if 0
pt_entry_t *pte;
int i;
@@ -247,7 +238,6 @@
td->td_md.md_upte[i] = *pte & ~(PG_RO|PG_WIRED);
pte++;
}
-#endif
}
void
@@ -258,7 +248,6 @@
void
cpu_thread_alloc(struct thread *td)
{
-#if 0
pt_entry_t *pte;
int i;
@@ -266,15 +255,11 @@
td->td_md.md_realstack = td->td_kstack + PAGE_SIZE;
else
td->td_md.md_realstack = td->td_kstack;
-#endif
- td->td_md.md_realstack =
- MIPS_PHYS_TO_KSEG0(MIPS_CACHED_TO_PHYS((vm_offset_t)td->td_kstack));
td->td_pcb = (struct pcb *)(td->td_md.md_realstack +
(td->td_kstack_pages - 1) * PAGE_SIZE) - 1;
td->td_frame = &td->td_pcb->pcb_regs;
-#if 0
if (!(pte = pmap_segmap(kernel_pmap, td->td_md.md_realstack)))
panic("cpu_thread_alloc: invalid segmap");
pte += ((vm_offset_t)td->td_md.md_realstack >> PGSHIFT) & (NPTEPG - 1);
@@ -283,7 +268,6 @@
td->td_md.md_upte[i] = *pte & ~(PG_RO|PG_WIRED);
pte++;
}
-#endif
}
/*
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