PERFORCE change 134674 for review

[Randall R. Stewart]

http://perforce.freebsd.org/chv.cgi?CH=134674

Change 134674 by rrs at rrs-mips2-jnpr on 2008/02/02 21:00:00

	moves over some more octeon specific changes
	       -nexus with OCTEON SMP (even though we are not
	        ready)
	       -bus_space_read/write (8/16)

Affected files ...

.. //depot/projects/mips2-jnpr/src/sys/mips/conf/OCTEON_rrs#8 edit
.. //depot/projects/mips2-jnpr/src/sys/mips/include/bus.h#7 edit
.. //depot/projects/mips2-jnpr/src/sys/mips/include/bus_octeon.h#1 add
.. //depot/projects/mips2-jnpr/src/sys/mips/mips/nexus.c#3 edit

Differences ...

==== //depot/projects/mips2-jnpr/src/sys/mips/conf/OCTEON_rrs#8 (text+ko) ====

@@ -43,8 +43,8 @@
 
 options		SCHED_4BSD		#4BSD scheduler
 options		INET			#InterNETworking
-options		NFSCLIENT		#Network Filesystem Client
-options 	NFS_ROOT		#NFS usable as /, requires NFSCLIENT
+#options		NFSCLIENT		#Network Filesystem Client
+#options 	NFS_ROOT		#NFS usable as /, requires NFSCLIENT
 options         PSEUDOFS		#Pseudo-filesystem framework
 options		_KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions
 
@@ -79,6 +79,6 @@
 
 #
 # Use the following for RFS in mem-device
-# options         MD_ROOT
+options         MD_ROOT
 # options         ROOTDEVNAME = \"ufs:md0\"
-# options         MD_ROOT_SIZE = 40960
+options         MD_ROOT_SIZE = 25200

==== //depot/projects/mips2-jnpr/src/sys/mips/include/bus.h#7 (text+ko) ====

@@ -75,6 +75,9 @@
 #ifndef _MACHINE_BUS_H_
 #define	_MACHINE_BUS_H_
 
+#ifdef TARGET_OCTEON
+#include <machine/bus_octeon.h>
+#else
 #include <machine/_bus.h>
 #include <machine/cpufunc.h>
 
@@ -902,4 +905,5 @@
 #define	bus_space_copy_region_stream_4(t, h1, o1, h2, o2, c) \
 	bus_space_copy_region_4((t), (h1), (o1), (h2), (o2), (c))
 
+#endif /* !TARGET_OCTEON */
 #endif /* !_MACHINE_BUS_H_ */

==== //depot/projects/mips2-jnpr/src/sys/mips/mips/nexus.c#3 (text+ko) ====

@@ -184,11 +184,14 @@
 	cpu_establish_hardintr(device_get_nameunit(child), filt, intr, arg,
 	    irq, flags, cookiep);
 #ifdef TARGET_OCTEON
+#ifdef OCTEON_SMP
+        mp_intr_enable();
+#else
 	intr_enable();
-#else
+#endif
+#else	
 	intr_restore(sr);
 #endif
-
 	return (0);
 }