PERFORCE change 126960 for review
Warner Losh
imp at FreeBSD.org
Sat Sep 29 02:20:35 PDT 2007
http://perforce.freebsd.org/chv.cgi?CH=126960
Change 126960 by imp at imp_paco-paco on 2007/09/29 09:20:05
Build machdep
Affected files ...
.. //depot/projects/arm/src/sys/arm/orion/files.orion#2 edit
.. //depot/projects/arm/src/sys/arm/orion/orion_machdep.c#2 edit
Differences ...
==== //depot/projects/arm/src/sys/arm/orion/files.orion#2 (text+ko) ====
@@ -17,6 +17,7 @@
arm/arm/cpufunc_asm_armv5_ec.S standard
arm/arm/irq_dispatch.S standard
arm/orion/orion.c standard
+arm/orion/orion_machdep.c standard
arm/orion/ohci_orion.c optional ohci
# I believe we have bog-standard 16550CF uarts
arm/orion/uart_bus_orion.c optional uart
==== //depot/projects/arm/src/sys/arm/orion/orion_machdep.c#2 (text+ko) ====
@@ -45,10 +45,9 @@
#include "opt_msgbuf.h"
#include "opt_ddb.h"
-#include "opt_at91.h"
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/at91/kb920x_machdep.c,v 1.23 2007/07/31 17:43:18 imp Exp $");
+__FBSDID("$FreeBSD$");
#define _ARM32_BUS_DMA_PRIVATE
#include <sys/param.h>
@@ -92,9 +91,7 @@
#include <machine/bus.h>
#include <sys/reboot.h>
-#include <arm/at91/at91rm92reg.h>
-#include <arm/at91/at91_piovar.h>
-#include <arm/at91/at91_pio_rm9200.h>
+#include <arm/orion/orionreg.h>
#define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */
#define KERNEL_PT_KERN 1
@@ -156,6 +153,7 @@
VM_PROT_READ|VM_PROT_WRITE,
PTE_NOCACHE,
},
+#ifdef not_this_one
/*
* We can't just map the OHCI registers VA == PA, because
* AT91RM92_OHCI_BASE belongs to the userland address space.
@@ -178,6 +176,7 @@
PTE_NOCACHE,
},
#endif
+#endif
{
0,
0,
@@ -187,69 +186,25 @@
}
};
-#define SDRAM_START 0xa0000000
-
#ifdef DDB
extern vm_offset_t ksym_start, ksym_end;
#endif
+void
+DELAY(int us)
+{
+ /* XXX write me */
+}
+
static long
ramsize(void)
{
- uint32_t *SDRAMC = (uint32_t *)(AT91RM92_BASE + AT91RM92_SDRAMC_BASE);
- uint32_t cr, mr;
- int banks, rows, cols, bw;
-
- cr = SDRAMC[AT91RM92_SDRAMC_CR / 4];
- mr = SDRAMC[AT91RM92_SDRAMC_MR / 4];
- bw = (mr & AT91RM92_SDRAMC_MR_DBW_16) ? 1 : 2;
- banks = (cr & AT91RM92_SDRAMC_CR_NB_4) ? 2 : 1;
- rows = ((cr & AT91RM92_SDRAMC_CR_NR_MASK) >> 2) + 11;
- cols = (cr & AT91RM92_SDRAMC_CR_NC_MASK) + 8;
- return (1 << (cols + rows + banks + bw));
+ return 64 << 20;
}
static long
board_init(void)
{
- /*
- * Since the USART supprots RS-485 multidrop mode, it allows the
- * TX pins to float. However, for RS-232 operations, we don't want
- * these pins to float. Instead, they should be pulled up to avoid
- * mismatches. Linux does something similar when it configures the
- * TX lines. This implies that we also allow the RX lines to float
- * rather than be in the state they are left in by the boot loader.
- * Since they are input pins, I think that this is the right thing
- * to do.
- */
-
- /* PIOA's A periph: Turn USART 0 and 2's TX/RX pins */
- at91_pio_use_periph_a(AT91RM92_PIOA_BASE,
- AT91C_PA18_RXD0 | AT91C_PA22_RXD2, 0);
- at91_pio_use_periph_a(AT91RM92_PIOA_BASE,
- AT91C_PA17_TXD0 | AT91C_PA23_TXD2, 1);
- /* PIOA's B periph: Turn USART 3's TX/RX pins */
- at91_pio_use_periph_b(AT91RM92_PIOA_BASE, AT91C_PA6_RXD3, 0);
- at91_pio_use_periph_b(AT91RM92_PIOA_BASE, AT91C_PA5_TXD3, 1);
-#ifdef AT91_TSC
- /* We're using TC0's A1 and A2 input */
- at91_pio_use_periph_b(AT91RM92_PIOA_BASE,
- AT91C_PA19_TIOA1 | AT91C_PA21_TIOA2, 0);
-#endif
- /* PIOB's A periph: Turn USART 1's TX/RX pins */
- at91_pio_use_periph_a(AT91RM92_PIOB_BASE, AT91C_PB21_RXD1, 0);
- at91_pio_use_periph_a(AT91RM92_PIOB_BASE, AT91C_PB20_TXD1, 1);
-
- /* Pin assignment */
-#ifdef AT91_TSC
- /* Assert PA24 low -- talk to rubidium */
- at91_pio_use_gpio(AT91RM92_PIOA_BASE, AT91C_PIO_PA24);
- at91_pio_gpio_output(AT91RM92_PIOA_BASE, AT91C_PIO_PA24, 0);
- at91_pio_gpio_clear(AT91RM92_PIOA_BASE, AT91C_PIO_PA24);
- at91_pio_use_gpio(AT91RM92_PIOB_BASE,
- AT91C_PIO_PB16 | AT91C_PIO_PB17 | AT91C_PIO_PB18 | AT91C_PIO_PB19);
-#endif
-
return (ramsize());
}
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