PERFORCE change 126948 for review
John Birrell
jb at FreeBSD.org
Fri Sep 28 16:17:49 PDT 2007
http://perforce.freebsd.org/chv.cgi?CH=126948
Change 126948 by jb at jb_freebsd1 on 2007/09/28 23:16:57
IF6
Affected files ...
.. //depot/projects/dtrace6/src/gnu/usr.bin/man/man/man.c#2 integrate
.. //depot/projects/dtrace6/src/lib/libc/net/getaddrinfo.c#2 integrate
.. //depot/projects/dtrace6/src/lib/libpam/modules/pam_exec/pam_exec.c#2 integrate
.. //depot/projects/dtrace6/src/lib/libutil/pidfile.3#2 integrate
.. //depot/projects/dtrace6/src/lib/libutil/pidfile.c#2 integrate
.. //depot/projects/dtrace6/src/release/doc/en_US.ISO8859-1/relnotes/common/new.sgml#2 integrate
.. //depot/projects/dtrace6/src/sbin/dhclient/dhclient.8#2 integrate
.. //depot/projects/dtrace6/src/share/man/man4/cxgb.4#2 integrate
.. //depot/projects/dtrace6/src/share/man/man9/DECLARE_GEOM_CLASS.9#2 integrate
.. //depot/projects/dtrace6/src/sys/amd64/amd64/identcpu.c#2 integrate
.. //depot/projects/dtrace6/src/sys/amd64/conf/NOTES#2 integrate
.. //depot/projects/dtrace6/src/sys/amd64/include/specialreg.h#2 integrate
.. //depot/projects/dtrace6/src/sys/conf/files.amd64#2 integrate
.. //depot/projects/dtrace6/src/sys/conf/files.i386#2 integrate
.. //depot/projects/dtrace6/src/sys/dev/coretemp/coretemp.c#1 branch
.. //depot/projects/dtrace6/src/sys/dev/ichwd/ichwd.c#2 integrate
.. //depot/projects/dtrace6/src/sys/dev/ichwd/ichwd.h#2 integrate
.. //depot/projects/dtrace6/src/sys/i386/conf/NOTES#2 integrate
.. //depot/projects/dtrace6/src/sys/i386/i386/identcpu.c#2 integrate
.. //depot/projects/dtrace6/src/sys/i386/include/specialreg.h#2 integrate
.. //depot/projects/dtrace6/src/sys/kern/kern_umtx.c#2 integrate
.. //depot/projects/dtrace6/src/sys/modules/Makefile#2 integrate
.. //depot/projects/dtrace6/src/sys/modules/coretemp/Makefile#1 branch
.. //depot/projects/dtrace6/src/sys/netgraph/ng_base.c#2 integrate
.. //depot/projects/dtrace6/src/sys/netinet/tcp_syncache.c#2 integrate
.. //depot/projects/dtrace6/src/usr.bin/calendar/calendars/calendar.dutch#2 integrate
.. //depot/projects/dtrace6/src/usr.bin/calendar/calendars/hr_HR.ISO8859-2/calendar.praznici#2 integrate
.. //depot/projects/dtrace6/src/usr.bin/netstat/main.c#2 integrate
.. //depot/projects/dtrace6/src/usr.bin/netstat/mroute.c#2 integrate
.. //depot/projects/dtrace6/src/usr.sbin/mixer/mixer.8#2 integrate
Differences ...
==== //depot/projects/dtrace6/src/gnu/usr.bin/man/man/man.c#2 (text+ko) ====
@@ -16,7 +16,7 @@
#ifndef lint
static const char rcsid[] =
- "$FreeBSD: src/gnu/usr.bin/man/man/man.c,v 1.62 2003/10/26 06:40:37 bde Exp $";
+ "$FreeBSD: src/gnu/usr.bin/man/man/man.c,v 1.62.10.1 2007/09/28 02:31:57 edwin Exp $";
#endif /* not lint */
#define MAN_MAIN
@@ -866,11 +866,26 @@
next:
+#if HAVE_LIBZ > 0
+ if ((fp = gzopen (ult, "r")) == NULL)
+ {
+ /* check for the compressed version too */
+ strlcat(ult, ".gz", FILENAME_MAX);
+ if ((fp = gzopen (ult, "r")) == NULL)
+ return ult; /* we munged it, but it doesn't exist anyway */
+ }
+#else
if ((fp = fopen (ult, "r")) == NULL)
return ult;
+#endif
+#if HAVE_LIBZ > 0
+ end = gzgets (fp, buf, BUFSIZ);
+ gzclose(fp);
+#else
end = fgets (buf, BUFSIZ, fp);
fclose(fp);
+#endif
if (!end || strlen (buf) < 5)
return ult;
==== //depot/projects/dtrace6/src/lib/libc/net/getaddrinfo.c#2 (text+ko) ====
@@ -54,7 +54,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/lib/libc/net/getaddrinfo.c,v 1.69.2.9 2006/07/30 06:11:43 ume Exp $");
+__FBSDID("$FreeBSD: src/lib/libc/net/getaddrinfo.c,v 1.69.2.10 2007/09/28 06:23:03 jinmei Exp $");
#include "namespace.h"
#include <sys/types.h>
@@ -570,8 +570,24 @@
* in the most efficient order.
*/
if (hints == NULL || !(hints->ai_flags & AI_PASSIVE)) {
- if (!numeric)
+ if (!numeric) {
+ char *canonname;
+
+ canonname =
+ sentinel.ai_next->ai_canonname;
+ if (canonname != NULL) {
+ sentinel.ai_next->ai_canonname
+ = NULL;
+ }
(void)reorder(&sentinel);
+ if (sentinel.ai_next->ai_canonname ==
+ NULL) {
+ sentinel.ai_next->ai_canonname
+ = canonname;
+ } else {
+ free(canonname);
+ }
+ }
}
*res = sentinel.ai_next;
return SUCCESS;
==== //depot/projects/dtrace6/src/lib/libpam/modules/pam_exec/pam_exec.c#2 (text+ko) ====
@@ -33,7 +33,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/lib/libpam/modules/pam_exec/pam_exec.c,v 1.4.2.1 2005/09/19 20:56:10 cperciva Exp $");
+__FBSDID("$FreeBSD: src/lib/libpam/modules/pam_exec/pam_exec.c,v 1.4.2.2 2007/09/28 07:04:35 des Exp $");
#include <sys/types.h>
#include <sys/wait.h>
@@ -63,8 +63,9 @@
_pam_exec(pam_handle_t *pamh __unused, int flags __unused,
int argc, const char *argv[])
{
- int childerr, envlen, i, nitems, pam_err, status;
+ int envlen, i, nitems, pam_err, status;
char *env, **envlist, **tmp;
+ volatile int childerr;
pid_t pid;
if (argc < 1)
==== //depot/projects/dtrace6/src/lib/libutil/pidfile.3#2 (text+ko) ====
@@ -22,7 +22,7 @@
.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
.\" SUCH DAMAGE.
.\"
-.\" $FreeBSD: src/lib/libutil/pidfile.3,v 1.3.2.1 2006/01/15 17:50:35 delphij Exp $
+.\" $FreeBSD: src/lib/libutil/pidfile.3,v 1.3.2.2 2007/09/28 06:35:14 des Exp $
.\"
.Dd August 22, 2005
.Dt PIDFILE 3
@@ -105,14 +105,24 @@
.Rv -std pidfile_write pidfile_close pidfile_remove
.Sh EXAMPLES
The following example shows in which order these functions should be used.
+Note that it is safe to pass
+.Dv NULL
+to
+.Fn pidfile_write ,
+.Fn pidfile_remove
+and
+.Fn pidfile_close
+functions.
.Bd -literal
struct pidfh *pfh;
pid_t otherpid, childpid;
pfh = pidfile_open("/var/run/daemon.pid", 0600, &otherpid);
if (pfh == NULL) {
- if (errno == EEXIST)
- errx(EXIT_FAILURE, "Daemon already running, pid: %d.", otherpid);
+ if (errno == EEXIST) {
+ errx(EXIT_FAILURE, "Daemon already running, pid: %jd.",
+ (intmax_t)otherpid);
+ }
/* If we cannot create pidfile from other reasons, only warn. */
warn("Cannot open or create pidfile");
}
@@ -137,7 +147,7 @@
/* Do child work. */
break;
default:
- syslog(LOG_INFO, "Child %d started.", childpid);
+ syslog(LOG_INFO, "Child %jd started.", (intmax_t)childpid);
break;
}
}
==== //depot/projects/dtrace6/src/lib/libutil/pidfile.c#2 (text+ko) ====
@@ -25,7 +25,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/lib/libutil/pidfile.c,v 1.1.2.3 2007/09/21 17:27:48 obrien Exp $");
+__FBSDID("$FreeBSD: src/lib/libutil/pidfile.c,v 1.1.2.4 2007/09/28 06:34:22 des Exp $");
#include <sys/param.h>
#include <sys/file.h>
@@ -46,7 +46,6 @@
pidfile_verify(struct pidfh *pfh)
{
struct stat sb;
- int fd;
if (pfh == NULL || pfh->pf_fd == -1)
return (EDOOFUS);
@@ -89,19 +88,19 @@
{
struct pidfh *pfh;
struct stat sb;
- int error, fd;
+ int error, fd, len;
pfh = malloc(sizeof(*pfh));
if (pfh == NULL)
return (NULL);
- if (path == NULL) {
- snprintf(pfh->pf_path, sizeof(pfh->pf_path), "/var/run/%s.pid",
- getprogname());
- } else {
- strlcpy(pfh->pf_path, path, sizeof(pfh->pf_path));
- }
- if (strlen(pfh->pf_path) == sizeof(pfh->pf_path) - 1) {
+ if (path == NULL)
+ len = snprintf(pfh->pf_path, sizeof(pfh->pf_path),
+ "/var/run/%s.pid", getprogname());
+ else
+ len = snprintf(pfh->pf_path, sizeof(pfh->pf_path),
+ "%s", path);
+ if (len >= (int)sizeof(pfh->pf_path)) {
free(pfh);
errno = ENAMETOOLONG;
return (NULL);
@@ -147,7 +146,6 @@
int
pidfile_write(struct pidfh *pfh)
{
- struct stat sb;
char pidstr[16];
int error, fd;
==== //depot/projects/dtrace6/src/release/doc/en_US.ISO8859-1/relnotes/common/new.sgml#2 (text+ko) ====
@@ -3,7 +3,7 @@
<corpauthor>The &os; Project</corpauthor>
- <pubdate>$FreeBSD: src/release/doc/en_US.ISO8859-1/relnotes/common/new.sgml,v 1.883.2.80 2007/07/26 14:44:52 bmah Exp $</pubdate>
+ <pubdate>$FreeBSD: src/release/doc/en_US.ISO8859-1/relnotes/common/new.sgml,v 1.883.2.81 2007/09/28 05:08:34 bmah Exp $</pubdate>
<copyright>
<year>2000</year>
@@ -282,6 +282,10 @@
<sect2 id="userland">
<title>Userland Changes</title>
+ <para>The &man.camcontrol.8; utility now supports
+ a <command>readcap</command> command to display the size of
+ devices.</para>
+
<para>A bug in &man.freebsd-update.8;, which caused it not
to update SMP kernels correctly, has been fixed.</para>
==== //depot/projects/dtrace6/src/sbin/dhclient/dhclient.8#2 (text+ko) ====
@@ -36,9 +36,9 @@
.\" see ``http://www.isc.org/isc''. To learn more about Vixie
.\" Enterprises, see ``http://www.vix.com''.
.\"
-.\" $FreeBSD: src/sbin/dhclient/dhclient.8,v 1.2.2.3 2006/01/24 06:03:16 brooks Exp $
+.\" $FreeBSD: src/sbin/dhclient/dhclient.8,v 1.2.2.4 2007/09/28 11:09:11 gabor Exp $
.\"
-.Dd July 22, 2005
+.Dd August 13, 2007
.Dt DHCLIENT 8
.Os
.Sh NAME
@@ -176,10 +176,7 @@
.Sh SEE ALSO
.Xr dhclient.conf 5 ,
.Xr dhclient.leases 5 ,
-.Xr dhclient-script 8 ,
-.Xr dhcp 8 ,
-.Xr dhcpd 8 ,
-.Xr dhcrelay 8
+.Xr dhclient-script 8
.Sh AUTHORS
.An -nosplit
The
==== //depot/projects/dtrace6/src/share/man/man4/cxgb.4#2 (text+ko) ====
@@ -29,7 +29,7 @@
.\"
.\" * Other names and brands may be claimed as the property of others.
.\"
-.\" $FreeBSD: src/share/man/man4/cxgb.4,v 1.4.2.2 2007/03/19 16:22:56 bmah Exp $
+.\" $FreeBSD: src/share/man/man4/cxgb.4,v 1.4.2.3 2007/09/28 07:10:36 brueffer Exp $
.\"
.Dd March 14, 2007
.Dt CXGB 4
@@ -47,7 +47,7 @@
.Ed
.Pp
To load the driver as a
-module at boot time, place the following lines in
+module at boot time, place the following line in
.Xr loader.conf 5 :
.Bd -literal -offset indent
if_cxgb_load="YES"
==== //depot/projects/dtrace6/src/share/man/man9/DECLARE_GEOM_CLASS.9#2 (text+ko) ====
@@ -22,9 +22,9 @@
.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
.\"
-.\" $FreeBSD: src/share/man/man9/DECLARE_GEOM_CLASS.9,v 1.4 2005/01/13 09:33:06 ru Exp $
+.\" $FreeBSD: src/share/man/man9/DECLARE_GEOM_CLASS.9,v 1.4.2.1 2007/09/28 11:10:37 gabor Exp $
.\"
-.Dd January 6, 2005
+.Dd August 13, 2007
.Dt DECLARE_GEOM_CLASS 9
.Os
.Sh NAME
@@ -110,7 +110,7 @@
.Sh EXAMPLES
Example class declaration.
.Bd -literal -offset indent
-static struct geom *
+static struct g_geom *
g_example_taste(struct g_class *mp, struct g_provider *pp,
int flags __unused)
{
==== //depot/projects/dtrace6/src/sys/amd64/amd64/identcpu.c#2 (text+ko) ====
@@ -39,7 +39,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/amd64/amd64/identcpu.c,v 1.136.2.4 2006/12/06 20:12:13 sobomax Exp $");
+__FBSDID("$FreeBSD: src/sys/amd64/amd64/identcpu.c,v 1.136.2.5 2007/09/28 08:26:16 des Exp $");
#include "opt_cpu.h"
@@ -220,19 +220,19 @@
"\004MON" /* MONITOR/MWAIT Instructions */
"\005DS_CPL" /* CPL Qualified Debug Store */
"\006VMX" /* Virtual Machine Extensions */
- "\007<b6>"
+ "\007SMX" /* Safer Mode Extensions */
"\010EST" /* Enhanced SpeedStep */
"\011TM2" /* Thermal Monitor 2 */
- "\012<b9>"
- "\013CNTX-ID" /* L1 context ID available */
+ "\012SSSE3" /* SSSE3 */
+ "\013CNXT-ID" /* L1 context ID available */
"\014<b11>"
"\015<b12>"
"\016CX16" /* CMPXCHG16B Instruction */
- "\017XTPR" /* Send Task Priority Messages*/
- "\020<b15>"
+ "\017xTPR" /* Send Task Priority Messages*/
+ "\020PDCM" /* Perf/Debug Capability MSR */
"\021<b16>"
"\022<b17>"
- "\023<b18>"
+ "\023DCA" /* Direct Cache Access */
"\024<b19>"
"\025<b20>"
"\026<b21>"
@@ -307,7 +307,7 @@
"\006<b5>"
"\007<b6>"
"\010<b7>"
- "\011<b8>"
+ "\011Prefetch" /* 3DNow! Prefetch/PrefetchW */
"\012<b9>"
"\013<b10>"
"\014<b11>"
@@ -335,13 +335,8 @@
}
if (cpu_feature & CPUID_HTT && strcmp(cpu_vendor,
- "AuthenticAMD") == 0) {
+ "AuthenticAMD") == 0)
cpu_feature &= ~CPUID_HTT;
- if (bootverbose)
- printf("\nHTT bit cleared - FreeBSD"
- " does not have licensing issues"
- " requiring it.\n");
- }
/*
* If this CPU supports HTT or CMP then mention the
==== //depot/projects/dtrace6/src/sys/amd64/conf/NOTES#2 (text+ko) ====
@@ -4,7 +4,7 @@
# This file contains machine dependent kernel configuration notes. For
# machine independent notes, look in /sys/conf/NOTES.
#
-# $FreeBSD: src/sys/amd64/conf/NOTES,v 1.36.2.11 2006/09/29 21:21:52 jhb Exp $
+# $FreeBSD: src/sys/amd64/conf/NOTES,v 1.36.2.12 2007/09/28 08:54:40 des Exp $
#
#
@@ -359,6 +359,13 @@
#
device ichwd
+#
+# Temperature sensors:
+#
+# coretemp: on-die sensor on Intel Core and newer CPUs
+#
+device coretemp
+
#---------------------------------------------------------------------------
# ISDN4BSD
#
==== //depot/projects/dtrace6/src/sys/amd64/include/specialreg.h#2 (text+ko) ====
@@ -27,7 +27,7 @@
* SUCH DAMAGE.
*
* from: @(#)specialreg.h 7.1 (Berkeley) 5/9/91
- * $FreeBSD: src/sys/amd64/include/specialreg.h,v 1.30.8.2 2007/05/02 16:16:57 jhb Exp $
+ * $FreeBSD: src/sys/amd64/include/specialreg.h,v 1.30.8.4 2007/09/28 08:43:53 des Exp $
*/
#ifndef _MACHINE_SPECIALREG_H_
@@ -109,33 +109,42 @@
#define CPUID_SS 0x08000000
#define CPUID_HTT 0x10000000
#define CPUID_TM 0x20000000
-#define CPUID_B30 0x40000000
+#define CPUID_IA64 0x40000000
#define CPUID_PBE 0x80000000
-#define CPUID2_SSE3 0x00000001
-#define CPUID2_MON 0x00000008
-#define CPUID2_DS_CPL 0x00000010
-#define CPUID2_EST 0x00000080
-#define CPUID2_TM2 0x00000100
-#define CPUID2_CNTXID 0x00000400
-#define CPUID2_CX16 0x00002000
+#define CPUID2_SSE3 0x00000001
+#define CPUID2_MON 0x00000008
+#define CPUID2_DS_CPL 0x00000010
+#define CPUID2_VMX 0x00000020
+#define CPUID2_SMX 0x00000040
+#define CPUID2_EST 0x00000080
+#define CPUID2_TM2 0x00000100
+#define CPUID2_SSSE3 0x00000200
+#define CPUID2_CNXTID 0x00000400
+#define CPUID2_CX16 0x00002000
+#define CPUID2_XTPR 0x00004000
+#define CPUID2_PDCM 0x00008000
+#define CPUID2_DCA 0x00040000
/*
* Important bits in the AMD extended cpuid flags
*/
-#define AMDID_SYSCALL 0x00000800
-#define AMDID_MP 0x00080000
-#define AMDID_NX 0x00100000
-#define AMDID_EXT_MMX 0x00400000
-#define AMDID_FFXSR 0x01000000
-#define AMDID_RDTSCP 0x08000000
-#define AMDID_LM 0x20000000
-#define AMDID_EXT_3DNOW 0x40000000
-#define AMDID_3DNOW 0x80000000
+#define AMDID_SYSCALL 0x00000800
+#define AMDID_MP 0x00080000
+#define AMDID_NX 0x00100000
+#define AMDID_EXT_MMX 0x00400000
+#define AMDID_FFXSR 0x01000000
+#define AMDID_RDTSCP 0x08000000
+#define AMDID_LM 0x20000000
+#define AMDID_EXT_3DNOW 0x40000000
+#define AMDID_3DNOW 0x80000000
-#define AMDID2_LAHF 0x00000001
-#define AMDID2_CMP 0x00000002
-#define AMDID2_CR8 0x00000010
+#define AMDID2_LAHF 0x00000001
+#define AMDID2_CMP 0x00000002
+#define AMDID2_SVM 0x00000004
+#define AMDID2_EXT_APIC 0x00000008
+#define AMDID2_CR8 0x00000010
+#define AMDID2_PREFETCH 0x00000100
/*
* CPUID instruction 1 ebx info
@@ -148,29 +157,30 @@
/*
* AMD extended function 8000_0008h ecx info
*/
-#define AMDID_CMP_CORES 0x000000ff
+#define AMDID_CMP_CORES 0x000000ff
/*
* Model-specific registers for the i386 family
*/
-#define MSR_P5_MC_ADDR 0x000
-#define MSR_P5_MC_TYPE 0x001
-#define MSR_TSC 0x010
+#define MSR_P5_MC_ADDR 0x000
+#define MSR_P5_MC_TYPE 0x001
+#define MSR_TSC 0x010
#define MSR_P5_CESR 0x011
#define MSR_P5_CTR0 0x012
#define MSR_P5_CTR1 0x013
#define MSR_IA32_PLATFORM_ID 0x017
-#define MSR_APICBASE 0x01b
-#define MSR_EBL_CR_POWERON 0x02a
+#define MSR_APICBASE 0x01b
+#define MSR_EBL_CR_POWERON 0x02a
#define MSR_TEST_CTL 0x033
-#define MSR_BIOS_UPDT_TRIG 0x079
+#define MSR_BIOS_UPDT_TRIG 0x079
#define MSR_BBL_CR_D0 0x088
#define MSR_BBL_CR_D1 0x089
#define MSR_BBL_CR_D2 0x08a
-#define MSR_BIOS_SIGN 0x08b
-#define MSR_PERFCTR0 0x0c1
-#define MSR_PERFCTR1 0x0c2
-#define MSR_MTRRcap 0x0fe
+#define MSR_BIOS_SIGN 0x08b
+#define MSR_PERFCTR0 0x0c1
+#define MSR_PERFCTR1 0x0c2
+#define MSR_IA32_EXT_CONFIG 0x0ee /* Undocumented. Core Solo/Duo only */
+#define MSR_MTRRcap 0x0fe
#define MSR_BBL_CR_ADDR 0x116
#define MSR_BBL_CR_DECC 0x118
#define MSR_BBL_CR_CTL 0x119
@@ -180,46 +190,47 @@
#define MSR_SYSENTER_CS_MSR 0x174
#define MSR_SYSENTER_ESP_MSR 0x175
#define MSR_SYSENTER_EIP_MSR 0x176
-#define MSR_MCG_CAP 0x179
-#define MSR_MCG_STATUS 0x17a
-#define MSR_MCG_CTL 0x17b
-#define MSR_EVNTSEL0 0x186
-#define MSR_EVNTSEL1 0x187
-#define MSR_THERM_CONTROL 0x19a
-#define MSR_THERM_INTERRUPT 0x19b
-#define MSR_THERM_STATUS 0x19c
-#define MSR_DEBUGCTLMSR 0x1d9
-#define MSR_LASTBRANCHFROMIP 0x1db
-#define MSR_LASTBRANCHTOIP 0x1dc
-#define MSR_LASTINTFROMIP 0x1dd
-#define MSR_LASTINTTOIP 0x1de
-#define MSR_ROB_CR_BKUPTMPDR6 0x1e0
-#define MSR_MTRRVarBase 0x200
-#define MSR_MTRR64kBase 0x250
-#define MSR_MTRR16kBase 0x258
-#define MSR_MTRR4kBase 0x268
-#define MSR_PAT 0x277
-#define MSR_MTRRdefType 0x2ff
-#define MSR_MC0_CTL 0x400
-#define MSR_MC0_STATUS 0x401
-#define MSR_MC0_ADDR 0x402
-#define MSR_MC0_MISC 0x403
-#define MSR_MC1_CTL 0x404
-#define MSR_MC1_STATUS 0x405
-#define MSR_MC1_ADDR 0x406
-#define MSR_MC1_MISC 0x407
-#define MSR_MC2_CTL 0x408
-#define MSR_MC2_STATUS 0x409
-#define MSR_MC2_ADDR 0x40a
-#define MSR_MC2_MISC 0x40b
-#define MSR_MC3_CTL 0x40c
-#define MSR_MC3_STATUS 0x40d
-#define MSR_MC3_ADDR 0x40e
-#define MSR_MC3_MISC 0x40f
-#define MSR_MC4_CTL 0x410
-#define MSR_MC4_STATUS 0x411
-#define MSR_MC4_ADDR 0x412
-#define MSR_MC4_MISC 0x413
+#define MSR_MCG_CAP 0x179
+#define MSR_MCG_STATUS 0x17a
+#define MSR_MCG_CTL 0x17b
+#define MSR_EVNTSEL0 0x186
+#define MSR_EVNTSEL1 0x187
+#define MSR_THERM_CONTROL 0x19a
+#define MSR_THERM_INTERRUPT 0x19b
+#define MSR_THERM_STATUS 0x19c
+#define MSR_IA32_MISC_ENABLE 0x1a0
+#define MSR_DEBUGCTLMSR 0x1d9
+#define MSR_LASTBRANCHFROMIP 0x1db
+#define MSR_LASTBRANCHTOIP 0x1dc
+#define MSR_LASTINTFROMIP 0x1dd
+#define MSR_LASTINTTOIP 0x1de
+#define MSR_ROB_CR_BKUPTMPDR6 0x1e0
+#define MSR_MTRRVarBase 0x200
+#define MSR_MTRR64kBase 0x250
+#define MSR_MTRR16kBase 0x258
+#define MSR_MTRR4kBase 0x268
+#define MSR_PAT 0x277
+#define MSR_MTRRdefType 0x2ff
+#define MSR_MC0_CTL 0x400
+#define MSR_MC0_STATUS 0x401
+#define MSR_MC0_ADDR 0x402
+#define MSR_MC0_MISC 0x403
+#define MSR_MC1_CTL 0x404
+#define MSR_MC1_STATUS 0x405
+#define MSR_MC1_ADDR 0x406
+#define MSR_MC1_MISC 0x407
+#define MSR_MC2_CTL 0x408
+#define MSR_MC2_STATUS 0x409
+#define MSR_MC2_ADDR 0x40a
+#define MSR_MC2_MISC 0x40b
+#define MSR_MC3_CTL 0x40c
+#define MSR_MC3_STATUS 0x40d
+#define MSR_MC3_ADDR 0x40e
+#define MSR_MC3_MISC 0x40f
+#define MSR_MC4_CTL 0x410
+#define MSR_MC4_STATUS 0x411
+#define MSR_MC4_ADDR 0x412
+#define MSR_MC4_MISC 0x413
/*
* Constants related to MSR's.
@@ -244,9 +255,9 @@
/*
* Constants related to MTRRs
*/
-#define MTRR_N64K 8 /* numbers of fixed-size entries */
-#define MTRR_N16K 16
-#define MTRR_N4K 64
+#define MTRR_N64K 8 /* numbers of fixed-size entries */
+#define MTRR_N16K 16
+#define MTRR_N4K 64
/* Performance Control Register (5x86 only). */
#define PCR0 0x20
@@ -343,11 +354,11 @@
#define RCR6 0xe2
#define RCR7 0xe3
-#define RCR_RCD 0x01 /* Disables caching for ARRx (x = 0-6). */
-#define RCR_RCE 0x01 /* Enables caching for ARR7. */
-#define RCR_WWO 0x02 /* Weak write ordering. */
+#define RCR_RCD 0x01 /* Disables caching for ARRx (x = 0-6). */
+#define RCR_RCE 0x01 /* Enables caching for ARR7. */
+#define RCR_WWO 0x02 /* Weak write ordering. */
#define RCR_WL 0x04 /* Weak locking. */
-#define RCR_WG 0x08 /* Write gathering. */
+#define RCR_WG 0x08 /* Write gathering. */
#define RCR_WT 0x10 /* Write-through. */
#define RCR_NLB 0x20 /* LBA# pin is not asserted. */
@@ -356,7 +367,7 @@
#define AMD_WT_ALLOC_PRE 0x20000 /* programmable range enable */
#define AMD_WT_ALLOC_FRE 0x10000 /* fixed (A0000-FFFFF) range enable */
-/* X86-64 MSR's */
+/* AMD64 MSR's */
#define MSR_EFER 0xc0000080 /* extended features */
#define MSR_STAR 0xc0000081 /* legacy mode SYSCALL target/cs/ss */
#define MSR_LSTAR 0xc0000082 /* long mode SYSCALL target rip */
==== //depot/projects/dtrace6/src/sys/conf/files.amd64#2 (text+ko) ====
@@ -1,7 +1,7 @@
# This file tells config what files go into building a kernel,
# files marked standard are always included.
#
-# $FreeBSD: src/sys/conf/files.amd64,v 1.71.2.15 2007/08/30 20:29:01 sobomax Exp $
+# $FreeBSD: src/sys/conf/files.amd64,v 1.71.2.16 2007/09/28 17:24:53 des Exp $
#
# The long compile-with and dependency lines are required because of
# limitations in config: backslash-newline doesn't work in strings, and
@@ -147,6 +147,7 @@
dev/atkbdc/atkbdc_isa.c optional atkbdc isa
dev/atkbdc/atkbdc_subr.c optional atkbdc
dev/atkbdc/psm.c optional psm atkbdc
+dev/coretemp/coretemp.c optional coretemp
dev/fb/fb.c optional fb
dev/fb/fb.c optional vga
dev/fb/splash.c optional splash
==== //depot/projects/dtrace6/src/sys/conf/files.i386#2 (text+ko) ====
@@ -1,7 +1,7 @@
# This file tells config what files go into building a kernel,
# files marked standard are always included.
#
-# $FreeBSD: src/sys/conf/files.i386,v 1.538.2.14 2007/08/29 15:04:26 netchild Exp $
+# $FreeBSD: src/sys/conf/files.i386,v 1.538.2.15 2007/09/28 08:54:40 des Exp $
#
# The long compile-with and dependency lines are required because of
# limitations in config: backslash-newline doesn't work in strings, and
@@ -162,6 +162,7 @@
dev/ce/if_ce.c optional ce
dev/ce/tau32-ddk.c optional ce
dev/cm/if_cm_isa.c optional cm isa
+dev/coretemp/coretemp.c optional coretemp
dev/cp/cpddk.c optional cp
dev/cp/if_cp.c optional cp
dev/ctau/ctau.c optional ctau
==== //depot/projects/dtrace6/src/sys/dev/ichwd/ichwd.c#2 (text+ko) ====
@@ -51,10 +51,12 @@
* (document no. 292273-001). The WDT is also described in the individual
* chipset datasheets, e.g. Intel82801EB ICH5 / 82801ER ICH5R Datasheet
* (document no. 252516-001) sections 9.10 and 9.11.
+ *
+ * ICH6/7/8 support by Takeharu KATO <takeharu1219 at ybb.ne.jp>
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/dev/ichwd/ichwd.c,v 1.5.2.3 2007/03/27 21:13:21 n_hibma Exp $");
+__FBSDID("$FreeBSD: src/sys/dev/ichwd/ichwd.c,v 1.5.2.4 2007/09/28 08:46:10 des Exp $");
#include <sys/param.h>
#include <sys/kernel.h>
@@ -71,20 +73,27 @@
#include <dev/ichwd/ichwd.h>
static struct ichwd_device ichwd_devices[] = {
- { VENDORID_INTEL, DEVICEID_82801AA, "Intel 82801AA watchdog timer" },
- { VENDORID_INTEL, DEVICEID_82801AB, "Intel 82801AB watchdog timer" },
- { VENDORID_INTEL, DEVICEID_82801BA, "Intel 82801BA watchdog timer" },
- { VENDORID_INTEL, DEVICEID_82801BAM, "Intel 82801BAM watchdog timer" },
- { VENDORID_INTEL, DEVICEID_82801CA, "Intel 82801CA watchdog timer" },
- { VENDORID_INTEL, DEVICEID_82801CAM, "Intel 82801CAM watchdog timer" },
- { VENDORID_INTEL, DEVICEID_82801DB, "Intel 82801DB watchdog timer" },
- { VENDORID_INTEL, DEVICEID_82801DBM, "Intel 82801DBM watchdog timer" },
- { VENDORID_INTEL, DEVICEID_82801E, "Intel 82801E watchdog timer" },
- { VENDORID_INTEL, DEVICEID_82801EBR, "Intel 82801EB/ER watchdog timer" },
- { VENDORID_INTEL, DEVICEID_82801FBR, "Intel 82801FB/FR watchdog timer" },
- { VENDORID_INTEL, DEVICEID_ICH5, "Intel ICH5 watchdog timer"},
- { VENDORID_INTEL, DEVICEID_6300ESB, "Intel 6300ESB watchdog timer"},
- { 0, 0, NULL },
+ { DEVICEID_82801AA, "Intel 82801AA watchdog timer", 1 },
+ { DEVICEID_82801AB, "Intel 82801AB watchdog timer", 1 },
+ { DEVICEID_82801BA, "Intel 82801BA watchdog timer", 2 },
+ { DEVICEID_82801BAM, "Intel 82801BAM watchdog timer", 2 },
+ { DEVICEID_82801CA, "Intel 82801CA watchdog timer", 3 },
+ { DEVICEID_82801CAM, "Intel 82801CAM watchdog timer", 3 },
+ { DEVICEID_82801DB, "Intel 82801DB watchdog timer", 4 },
+ { DEVICEID_82801DBM, "Intel 82801DBM watchdog timer", 4 },
+ { DEVICEID_82801E, "Intel 82801E watchdog timer", 5 },
+ { DEVICEID_82801EBR, "Intel 82801EB/ER watchdog timer", 5 },
+ { DEVICEID_6300ESB, "Intel 6300ESB watchdog timer", 5 },
+ { DEVICEID_82801FBR, "Intel 82801FB/FR watchdog timer", 6 },
+ { DEVICEID_ICH6M, "Intel ICH6M watchdog timer", 6 },
+ { DEVICEID_ICH6W, "Intel ICH6W watchdog timer", 6 },
+ { DEVICEID_ICH7, "Intel ICH7 watchdog timer", 7 },
+ { DEVICEID_ICH7M, "Intel ICH7M watchdog timer", 7 },
+ { DEVICEID_ICH7MDH, "Intel ICH7MDH watchdog timer", 7 },
+ { DEVICEID_ICH8, "Intel ICH8 watchdog timer", 8 },
+ { DEVICEID_ICH8DH, "Intel ICH8DH watchdog timer", 8 },
+ { DEVICEID_ICH8DO, "Intel ICH8DO watchdog timer", 8 },
+ { 0, NULL, 0 },
};
static devclass_t ichwd_devclass;
@@ -95,6 +104,10 @@
bus_space_read_2((sc)->tco_bst, (sc)->tco_bsh, (off))
#define ichwd_read_tco_4(sc, off) \
bus_space_read_4((sc)->tco_bst, (sc)->tco_bsh, (off))
+#define ichwd_read_smi_4(sc, off) \
+ bus_space_read_4((sc)->smi_bst, (sc)->smi_bsh, (off))
+#define ichwd_read_gcs_4(sc, off) \
+ bus_space_read_4((sc)->gcs_bst, (sc)->gcs_bsh, (off))
#define ichwd_write_tco_1(sc, off, val) \
bus_space_write_1((sc)->tco_bst, (sc)->tco_bsh, (off), (val))
@@ -102,12 +115,17 @@
bus_space_write_2((sc)->tco_bst, (sc)->tco_bsh, (off), (val))
#define ichwd_write_tco_4(sc, off, val) \
bus_space_write_4((sc)->tco_bst, (sc)->tco_bsh, (off), (val))
-
-#define ichwd_read_smi_4(sc, off) \
- bus_space_read_4((sc)->smi_bst, (sc)->smi_bsh, (off))
#define ichwd_write_smi_4(sc, off, val) \
bus_space_write_4((sc)->smi_bst, (sc)->smi_bsh, (off), (val))
+#define ichwd_write_gcs_4(sc, off, val) \
+ bus_space_write_4((sc)->gcs_bst, (sc)->gcs_bsh, (off), (val))
+#define ichwd_verbose_printf(dev, ...) \
+ do { \
+ if (bootverbose) \
+ device_printf(dev, __VA_ARGS__);\
+ } while (0)
+
static __inline void
ichwd_intr_enable(struct ichwd_softc *sc)
{
@@ -136,8 +154,7 @@
cnt = ichwd_read_tco_2(sc, TCO1_CNT) & TCO_CNT_PRESERVE;
ichwd_write_tco_2(sc, TCO1_CNT, cnt & ~TCO_TMR_HALT);
sc->active = 1;
- if (bootverbose)
- device_printf(sc->device, "timer enabled\n");
+ ichwd_verbose_printf(sc->device, "timer enabled\n");
}
static __inline void
@@ -148,25 +165,85 @@
cnt = ichwd_read_tco_2(sc, TCO1_CNT) & TCO_CNT_PRESERVE;
ichwd_write_tco_2(sc, TCO1_CNT, cnt | TCO_TMR_HALT);
sc->active = 0;
- if (bootverbose)
- device_printf(sc->device, "timer disabled\n");
+ ichwd_verbose_printf(sc->device, "timer disabled\n");
}
static __inline void
ichwd_tmr_reload(struct ichwd_softc *sc)
{
- ichwd_write_tco_1(sc, TCO_RLD, 1);
- if (bootverbose)
- device_printf(sc->device, "timer reloaded\n");
+ if (sc->ich_version <= 5)
+ ichwd_write_tco_1(sc, TCO_RLD, 1);
+ else
+ ichwd_write_tco_2(sc, TCO_RLD, 1);
+
+ ichwd_verbose_printf(sc->device, "timer reloaded\n");
}
static __inline void
-ichwd_tmr_set(struct ichwd_softc *sc, uint8_t timeout)
+ichwd_tmr_set(struct ichwd_softc *sc, unsigned int timeout)
{
- ichwd_write_tco_1(sc, TCO_TMR, timeout);
+
+ /*
+ * If the datasheets are to be believed, the minimum value
+ * actually varies from chipset to chipset - 4 for ICH5 and 2 for
+ * all other chipsets. I suspect this is a bug in the ICH5
+ * datasheet and that the minimum is uniformly 2, but I'd rather
+ * err on the side of caution.
+ */
+ if (timeout < 4)
+ timeout = 4;
+
+ if (sc->ich_version <= 5) {
+ uint8_t tmr_val8 = ichwd_read_tco_1(sc, TCO_TMR1);
+
+ tmr_val8 &= 0xc0;
+ if (timeout > 0xbf)
+ timeout = 0xbf;
+ tmr_val8 |= timeout;
+ ichwd_write_tco_1(sc, TCO_TMR1, tmr_val8);
+ } else {
+ uint16_t tmr_val16 = ichwd_read_tco_2(sc, TCO_TMR2);
+
+ tmr_val16 &= 0xfc00;
+ if (timeout > 0x0bff)
+ timeout = 0x0bff;
+ tmr_val16 |= timeout;
+ ichwd_write_tco_2(sc, TCO_TMR2, tmr_val16);
+ }
+
sc->timeout = timeout;
- if (bootverbose)
- device_printf(sc->device, "timeout set to %u ticks\n", timeout);
+
+ ichwd_verbose_printf(sc->device, "timeout set to %u ticks\n", timeout);
+}
+
+static __inline int
+ichwd_clear_noreboot(struct ichwd_softc *sc)
+{
+ uint32_t status;
+ int rc = 0;
+
+ /* try to clear the NO_REBOOT bit */
+ if (sc->ich_version <= 5) {
+ status = pci_read_config(sc->ich, ICH_GEN_STA, 1);
+ status &= ~ICH_GEN_STA_NO_REBOOT;
+ pci_write_config(sc->ich, ICH_GEN_STA, status, 1);
+ status = pci_read_config(sc->ich, ICH_GEN_STA, 1);
+ if (status & ICH_GEN_STA_NO_REBOOT)
+ rc = EIO;
+ } else {
+ status = ichwd_read_gcs_4(sc, 0);
+ status &= ~ICH_GCS_NO_REBOOT;
+ ichwd_write_gcs_4(sc, 0, status);
+ status = ichwd_read_gcs_4(sc, 0);
+ if (status & ICH_GCS_NO_REBOOT)
+ rc = EIO;
+ }
+
+ if (rc)
+ device_printf(sc->device,
+ "ICH WDT present but disabled in BIOS or hardware\n");
+
+ return (rc);
}
/*
@@ -181,14 +258,12 @@
/* convert from power-of-two-ns to WDT ticks */
cmd &= WD_INTERVAL;
timeout = ((uint64_t)1 << cmd) / ICHWD_TICK;
- if (cmd > 0 && cmd <= 63
- && timeout >= ICHWD_MIN_TIMEOUT && timeout <= ICHWD_MAX_TIMEOUT) {
+ if (cmd) {
if (timeout != sc->timeout) {
if (!sc->active)
ichwd_tmr_enable(sc);
ichwd_tmr_set(sc, timeout);
}
-
ichwd_tmr_reload(sc);
*error = 0;
} else {
@@ -197,7 +272,28 @@
}
}
-static unsigned int pmbase = 0;
+static device_t
+ichwd_find_ich_lpc_bridge(struct ichwd_device **id_p)
+{
+ struct ichwd_device *id;
+ device_t ich = NULL;
+
+ /* look for an ICH LPC interface bridge */
+ for (id = ichwd_devices; id->desc != NULL; ++id)
+ if ((ich = pci_find_device(VENDORID_INTEL, id->device)) != NULL)
+ break;
+
+ if (ich == NULL)
+ return (NULL);
+
+ ichwd_verbose_printf(ich, "found ICH%d or equivalent chipset: %s\n",
+ id->version, id->desc);
+
+ if (id_p)
+ *id_p = id;
+
+ return (ich);
+}
/*
* Look for an ICH LPC interface bridge. If one is found, register an
@@ -206,49 +302,40 @@
static void
ichwd_identify(driver_t *driver, device_t parent)
{
- struct ichwd_device *id;
+ struct ichwd_device *id_p;
device_t ich = NULL;
device_t dev;
+ uint32_t rcba;
+ int rc;
- /* look for an ICH LPC interface bridge */
- for (id = ichwd_devices; id->desc != NULL; ++id)
- if ((ich = pci_find_device(id->vendor, id->device)) != NULL)
- break;
+ ich = ichwd_find_ich_lpc_bridge(&id_p);
if (ich == NULL)
return;
- if (bootverbose)
- printf("%s(): found ICH chipset: %s\n", __func__, id->desc);
+ /* good, add child to bus */
+ if ((dev = device_find_child(parent, driver->name, 0)) == NULL)
+ dev = BUS_ADD_CHILD(parent, 0, driver->name, 0);
- /* get for ACPI base address */
- pmbase = pci_read_config(ich, ICH_PMBASE, 2) & ICH_PMBASE_MASK;
- if (pmbase == 0) {
- if (bootverbose)
- printf("%s(): ICH PMBASE register is empty\n",
- __func__);
+ if (dev == NULL)
return;
- }
+
+ device_set_desc_copy(dev, id_p->desc);
- /* try to clear the NO_REBOOT bit */
- pci_write_config(ich, ICH_GEN_STA, 0x00, 1);
- if (pci_read_config(ich, ICH_GEN_STA, 1) & ICH_GEN_STA_NO_REBOOT) {
- if (bootverbose)
- printf("%s(): ICH WDT present but disabled\n",
- __func__);
- return;
+ if (id_p->version >= 6) {
+ /* get RCBA (root complex base address) */
+ rcba = pci_read_config(ich, ICH_RCBA, 4);
+ rc = bus_set_resource(ich, SYS_RES_MEMORY, 0,
+ (rcba & 0xffffc000) + ICH_GCS_OFFSET, ICH_GCS_SIZE);
+ if (rc)
>>> TRUNCATED FOR MAIL (1000 lines) <<<
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