PERFORCE change 128689 for review
Oleksandr Tymoshenko
gonzo at FreeBSD.org
Mon Nov 5 10:55:53 PST 2007
http://perforce.freebsd.org/chv.cgi?CH=128689
Change 128689 by gonzo at gonzo_jeeves on 2007/11/05 18:55:07
o Add IRQ dispatching routine.
Affected files ...
.. //depot/projects/mips2/src/sys/mips/mips32/idt/idtreg.h#5 edit
.. //depot/projects/mips2/src/sys/mips/mips32/idt/obio.c#4 edit
Differences ...
==== //depot/projects/mips2/src/sys/mips/mips32/idt/idtreg.h#5 (text+ko) ====
@@ -134,10 +134,15 @@
#define ICU_IP_BIT(irq) (1 << ICU_IP(irq))
#define ICU_GROUP(irq) (((irq) - IRQ_BASE) >> 5)
-#define ICU_GROUP_MASK_REG(irq) \
- (ICU_IMASK2 + ((((irq) - IRQ_BASE) >> 5) * ICU_GROUP_REG_OFFSET))
-#define ICU_GROUP_PEND_REG(irq) \
- (ICU_IPEND2 + ((((irq) - IRQ_BASE) >> 5) * ICU_GROUP_REG_OFFSET))
+#define ICU_GROUP_MASK_REG(group) \
+ (ICU_IMASK2 + ((((group) - 2) * ICU_GROUP_REG_OFFSET)))
+#define ICU_GROUP_IPEND_REG(group) \
+ (ICU_IPEND2 + ((((group) - 2) * ICU_GROUP_REG_OFFSET)))
+
+#define ICU_IRQ_MASK_REG(irq) \
+ (ICU_IMASK2 + ((ICU_GROUP(irq) * ICU_GROUP_REG_OFFSET)))
+#define ICU_IRQ_IPEND_REG(irq) \
+ (ICU_IPEND2 + ((ICU_GROUP(irq) * ICU_GROUP_REG_OFFSET)))
#define PCI_IRQ_BASE IP_IRQ(6, 4)
#define PCI_IRQ_END IP_IRQ(6, 7)
==== //depot/projects/mips2/src/sys/mips/mips32/idt/obio.c#4 (text+ko) ====
@@ -270,7 +270,7 @@
handler, arg, intr_priority(flags), flags, cookiep);
/* unmask IRQ */
- mask_register = ICU_GROUP_MASK_REG(irq);
+ mask_register = ICU_IRQ_MASK_REG(irq);
ip_bit = ICU_IP_BIT(irq);
mask = ICU_REG_READ(mask_register);
@@ -295,7 +295,7 @@
panic("Trying to teardown unoccupied IRQ");
/* mask IRQ */
- mask_register = ICU_GROUP_MASK_REG(irq);
+ mask_register = ICU_IRQ_MASK_REG(irq);
ip_bit = ICU_IP_BIT(irq);
mask = ICU_REG_READ(mask_register);
@@ -315,14 +315,43 @@
struct obio_softc *sc = arg;
struct intr_event *event;
struct intr_handler *ih;
- uint32_t irqstat, ipend;
- int irq, thread = 0;
+ uint32_t irqstat, ipend, imask, xpend;
+ int irq, thread = 0, group, i;
/* TODO: handle all IRQs */
irqstat = 0;
+ irq = 0;
+ for (group = 2; group <= 6; group++) {
+ ipend = ICU_REG_READ(ICU_GROUP_IPEND_REG(group));
+ imask = ICU_REG_READ(ICU_GROUP_MASK_REG(group));
+ xpend = ipend;
+ ipend &= ~imask;
+ while ((i = fls(xpend)) != 0) {
+ xpend &= ~(1 << (i - 1));
+ irq = IP_IRQ(group, i - 1);
+ }
+
+ while ((i = fls(ipend)) != 0) {
+ ipend &= ~(1 << (i - 1));
+ irq = IP_IRQ(group, i - 1);
+ event = sc->sc_eventstab[irq];
+ if (event && !TAILQ_EMPTY(&event->ie_handlers)) {
+ /* Execute fast handlers. */
+ TAILQ_FOREACH(ih, &event->ie_handlers,
+ ih_next) {
+ if (ih->ih_filter == NULL)
+ thread = 1;
+ else
+ ih->ih_filter(ih->ih_argument);
+ }
+ }
- irq = 0;
+ /* Schedule thread if needed. */
+ if (thread)
+ intr_event_schedule_thread(event);
+ }
+ }
#if 0
ipend = ICU_REG_READ(ICU_IPEND2);
printf("ipend2 = %08x!\n", ipend);
@@ -340,21 +369,6 @@
#endif
while (irqstat != 0) {
if ((irqstat & 1) == 1) {
- event = sc->sc_eventstab[irq];
- if (event && !TAILQ_EMPTY(&event->ie_handlers)) {
- /* Execute fast handlers. */
- TAILQ_FOREACH(ih, &event->ie_handlers,
- ih_next) {
- if (ih->ih_filter == NULL)
- thread = 1;
- else
- ih->ih_filter(ih->ih_argument);
- }
- }
-
- /* Schedule thread if needed. */
- if (thread)
- intr_event_schedule_thread(event);
}
irq++;
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