PERFORCE change 119789 for review

Bruce M Simpson bms at FreeBSD.org
Sun May 13 20:06:51 UTC 2007


http://perforce.freebsd.org/chv.cgi?CH=119789

Change 119789 by bms at bms_anglepoise on 2007/05/13 20:06:23

	rototile paths and sentinels;
	de-linuxify defines

Affected files ...

.. //depot/projects/mips2/src/sys/dev/siba/siba.c#2 edit
.. //depot/projects/mips2/src/sys/dev/siba/siba_cc.c#2 edit
.. //depot/projects/mips2/src/sys/dev/siba/siba_pcib.c#2 edit
.. //depot/projects/mips2/src/sys/dev/siba/siba_pcibvar.h#2 edit
.. //depot/projects/mips2/src/sys/dev/siba/siba_sdram.c#2 edit
.. //depot/projects/mips2/src/sys/dev/siba/sibareg.h#2 edit
.. //depot/projects/mips2/src/sys/dev/siba/sibavar.h#2 edit

Differences ...

==== //depot/projects/mips2/src/sys/dev/siba/siba.c#2 (text+ko) ====

@@ -37,14 +37,13 @@
 
 #include <machine/bus.h>
 
-#include <mips/mips32/sentry5/sibavar.h>
-#include <mips/mips32/sentry5/sibareg.h>
-#include <mips/mips32/sentry5/siba_ids.h>
+#include <dev/siba/sibavar.h>
+#include <dev/siba/sibareg.h>
+#include <dev/siba/siba_ids.h>
 
 /*
+ * TODO: De-mipsify this code.
  * TODO: cpu clock calculation. -> move to siba_cc instance
- * TODO: De-mipsify this code.
- * TODO: Move siba to a machine independent location.
  * TODO: Hardwire IRQs for attached cores on siba at probe time.
  * TODO: Support detach.
  * TODO: Power management.

==== //depot/projects/mips2/src/sys/dev/siba/siba_cc.c#2 (text+ko) ====

@@ -54,9 +54,9 @@
 
 #include <machine/bus.h>
 
-#include <mips/mips32/sentry5/sibavar.h>
-#include <mips/mips32/sentry5/sibareg.h>
-#include <mips/mips32/sentry5/siba_ids.h>
+#include <dev/siba/sibavar.h>
+#include <dev/siba/sibareg.h>
+#include <dev/siba/siba_ids.h>
 
 static int	siba_cc_attach(device_t);
 static int	siba_cc_probe(device_t);

==== //depot/projects/mips2/src/sys/dev/siba/siba_pcib.c#2 (text+ko) ====

@@ -54,10 +54,10 @@
 
 #include "pcib_if.h"
 
-#include <mips/mips32/sentry5/sibavar.h>
-#include <mips/mips32/sentry5/sibareg.h>
-#include <mips/mips32/sentry5/siba_ids.h>
-#include <mips/mips32/sentry5/siba_pcibvar.h>
+#include <dev/siba/sibavar.h>
+#include <dev/siba/sibareg.h>
+#include <dev/siba/siba_ids.h>
+#include <dev/siba/siba_pcibvar.h>
 
 #ifndef MIPS_MEM_RID
 #define MIPS_MEM_RID 0x20

==== //depot/projects/mips2/src/sys/dev/siba/siba_pcibvar.h#2 (text+ko) ====


==== //depot/projects/mips2/src/sys/dev/siba/siba_sdram.c#2 (text+ko) ====

@@ -43,9 +43,9 @@
 
 #include <machine/bus.h>
 
-#include <mips/mips32/sentry5/sibavar.h>
-#include <mips/mips32/sentry5/sibareg.h>
-#include <mips/mips32/sentry5/siba_ids.h>
+#include <dev/siba/sibavar.h>
+#include <dev/siba/sibareg.h>
+#include <dev/siba/siba_ids.h>
 
 static int	siba_sdram_attach(device_t);
 static int	siba_sdram_probe(device_t);

==== //depot/projects/mips2/src/sys/dev/siba/sibareg.h#2 (text+ko) ====

@@ -25,15 +25,12 @@
  */
 
 /*
- * TODO: clockspeed routines
+ * TODO: sprom
  * TODO: implement dma translation bits (if needed for system bus)
- * TODO: de-linuxify
- * TODO: update paths
- * TODO: sprom
  */
 
-#ifndef _SIBAREG_H_
-#define _SIBAREG_H_
+#ifndef _SIBA_SIBAREG_H_
+#define _SIBA_SIBAREG_H_
 
 #define SIBA_CORE_LEN		0x00001000	/* Size of cfg per core */
 #define SIBA_CFG_END		0x00010000	/* Upper bound of cfg space */
@@ -45,6 +42,7 @@
 
 /*
  * Offsets of ChipCommon core registers.
+ * XXX: move to siba_cc
  */
 #define SIBA_CC_UART0	0x00000300	/* offset of UART0 */
 #define SIBA_CC_UART1	0x00000400	/* offset of UART1 */
@@ -58,34 +56,16 @@
 #define  SIBA_CC_NRCORESMASK 0x0F000000
 #define  SIBA_CC_NRCORESSHIFT 24
 
-#define  SSB_IDHIGH_RCLO	0x0000000F /* Revision Code (low part) */
-#define  SSB_IDHIGH_CC		0x00008FF0 /* Core Code */
-#define  SSB_IDHIGH_CC_SHIFT	4
-#define  SSB_IDHIGH_RCHI	0x00007000 /* Revision Code (high part) */
-#define  SSB_IDHIGH_RCHI_SHIFT	8
-#define  SSB_IDHIGH_VC		0xFFFF0000 /* Vendor Code */
-#define  SSB_IDHIGH_VC_SHIFT	16
+#define  SIBA_IDHIGH_RCLO	0x0000000F /* Revision Code (low part) */
+#define  SIBA_IDHIGH_CC		0x00008FF0 /* Core Code */
+#define  SIBA_IDHIGH_CC_SHIFT	4
+#define  SIBA_IDHIGH_RCHI	0x00007000 /* Revision Code (high part) */
+#define  SIBA_IDHIGH_RCHI_SHIFT	8
+#define  SIBA_IDHIGH_VC		0xFFFF0000 /* Vendor Code */
+#define  SIBA_IDHIGH_VC_SHIFT	16
 
 #define SIBA_CCID_BCM4710	0x4710
 #define SIBA_CCID_BCM4704	0x4704
 #define SIBA_CCID_SENTRY5	0x5365
 
-
-#if 0
-/* XXX very important to port this */
-extern u32 ssb_clockspeed(struct ssb_bus *bus);
-int ssb_device_is_enabled(struct ssb_device *dev);
-void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags);
-void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags);
-#endif
-
-#if 0
-/* Translation (routing) bits that need to be ORed to DMA
- * addresses before they are given to a device. */
-extern u32 ssb_dma_translation(struct ssb_device *dev);
-#define SSB_DMA_TRANSLATION_MASK	0xC0000000
-#define SSB_DMA_TRANSLATION_SHIFT	30
-extern int ssb_dma_set_mask(struct ssb_device *ssb_dev, u64 mask);
-#endif
-
-#endif /* _SIBAREG_H_ */
+#endif /* _SIBA_SIBAREG_H_ */

==== //depot/projects/mips2/src/sys/dev/siba/sibavar.h#2 (text+ko) ====

@@ -24,8 +24,8 @@
  * SUCH DAMAGE.
  */
 
-#ifndef _SIBAVAR_H_
-#define _SIBAVAR_H_
+#ifndef _SIBA_SIBAVAR_H_
+#define _SIBA_SIBAVAR_H_
 
 #include <sys/rman.h>
 
@@ -41,7 +41,6 @@
 	uint8_t			 sc_ncores;
 };
 
-
 struct siba_devinfo {
 	struct resource_list	 sdi_rl;
 	/*devhandle_t		 sdi_devhandle; XXX*/
@@ -86,4 +85,4 @@
 
 #undef SIBA_ACCESSOR
 
-#endif /* _SIBAVAR_H_ */
+#endif /* _SIBA_SIBAVAR_H_ */


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