PERFORCE change 119155 for review

[Bruce M Simpson]

http://perforce.freebsd.org/chv.cgi?CH=119155

Change 119155 by bms at bms_anglepoise on 2007/05/02 14:07:06

	Merge Sentry5 changes with MALTA changes.
	
	Make YAMON optional.
	Don't try to detect an FPU if CPU_NOFPU is defined; the Sentry5
	throws an exception even though the Cop1 enabled bit stays
	set in the status register after locore tries to enable it.
	
	Add custom ld script for CFE firmware targets; it needs to see
	the first PT_LOAD at an offset > 0.

Affected files ...

.. //depot/projects/mips2/src/sys/conf/ldscript.mips.cfe#1 add
.. //depot/projects/mips2/src/sys/conf/options.mips#5 edit
.. //depot/projects/mips2/src/sys/mips/conf/MALTA#13 edit
.. //depot/projects/mips2/src/sys/mips/mips/locore.S#16 edit
.. //depot/projects/mips2/src/sys/mips/mips/machdep.c#30 edit
.. //depot/projects/mips2/src/sys/mips/mips/tick.c#12 edit

Differences ...

==== //depot/projects/mips2/src/sys/conf/options.mips#5 (text+ko) ====

@@ -3,8 +3,15 @@
 CPU_MIPS4KC	opt_global.h
 CPU_MIPS32	opt_global.h
 CPU_MIPS64	opt_global.h
+CPU_NOFPU	opt_global.h
+CPU_SENTRY5	opt_global.h
+
+YAMON		opt_global.h
+CFE		opt_global.h
+
 KERNPHYSADDR	opt_global.h
 KERNVIRTADDR	opt_global.h
 PHYSADDR	opt_global.h
+
 TICK_USE_YAMON_FREQ	opt_global.h
 TICK_USE_MALTA_RTC	opt_global.h

==== //depot/projects/mips2/src/sys/mips/conf/MALTA#13 (text+ko) ====

@@ -24,11 +24,15 @@
 #makeoptions	ARCH_FLAGS=-march=mips32
 makeoptions	MIPS_LITTLE_ENDIAN=defined
 
+options		YAMON
+
 # Don't build any modules yet.
 makeoptions	MODULES_OVERRIDE=""
 
 options		KERNVIRTADDR=0x80100000
-options		TICK_USE_YAMON_FREQ=defined
+#options		TICK_USE_YAMON_FREQ=defined
+options		TICK_USE_MALTA_RTC=defined
+
 include		"../mips4k/malta/std.malta"
 
 hints		"MALTA.hints"		#Default places to look for devices.

==== //depot/projects/mips2/src/sys/mips/mips/locore.S#16 (text+ko) ====

@@ -80,7 +80,15 @@
 
 	/* Read and store the PrID FPU ID for CPU identification. */
 	mfc0	t0, MIPS_COP_0_PRID
+#ifndef CPU_NOFPU
 	cfc1	t1, MIPS_FPU_ID
+#else
+	/*
+	 * This platform has no FPU, and attempting to detect one
+	 * using the official method causes an exception.
+	 */
+	li	t1, 0x0
+#endif
 	sw	t0, cpu_id
 	sw	t1, fpu_id
 
@@ -94,9 +102,9 @@
 	 */
 	la	sp, topstack
 
-#if 1
+#ifdef YAMON
 	/*
-	 * XXX: Save the YAMON environment pointer.
+	 * Save the YAMON environment pointer.
 	 */
 	sw	a2, fenvp
 #endif

==== //depot/projects/mips2/src/sys/mips/mips/machdep.c#30 (text+ko) ====

@@ -70,6 +70,10 @@
 #include <machine/trap.h>
 #include <machine/vmparam.h>
 
+#ifdef CPU_SENTRY5
+/* XXX */
+void sentry5_reset(void);
+#endif
 
 #ifdef DDB
 #include <ddb/ddb.h>
@@ -455,6 +459,10 @@
 platform_reset(void)
 {
 
+#ifdef CPU_SENTRY5
+	/* Yes yes I know this is a mess. */
+	sentry5_reset();
+#endif
 }
 
 void

==== //depot/projects/mips2/src/sys/mips/mips/tick.c#12 (text+ko) ====

@@ -114,7 +114,8 @@
 tick_init_params(void)
 {
 
-	printf("Calibrating MIPS32 clock ... ");
+	if (bootverbose)
+		printf("Calibrating MIPS32 clock ... ");
 
 	do {
 #if defined(TICK_USE_YAMON_FREQ)
@@ -156,7 +157,14 @@
 
 		counter_freq = counterval[1] - counterval[0];
 #else
+		/*
+		 * Don't cause a call to DELAY() to happen when we haven't
+		 * initialized the very things which DELAY() depends upon;
+		 * it will cause a divide-by-zero trap.
+		 */
+		#if 0
 		printf("using hard-coded default clock of 10MHz\n");
+		#endif
 		counter_freq = 10000000;
 #endif
 	} while (0);
@@ -211,6 +219,7 @@
 void
 DELAY(int n)
 {
+#ifndef CPU_SENTRY5		/* TODO: Fix clock calibration for this board */
 	uint32_t cur, last, delta, usecs;
 	/*
 	 * This works by polling the timer and counting the
@@ -235,6 +244,7 @@
 			delta %= counts_per_usec;
 		}
 	}
+#endif
 }
 
 /*