PERFORCE change 132118 for review

Warner Losh imp at FreeBSD.org
Sun Dec 30 12:00:43 PST 2007


http://perforce.freebsd.org/chv.cgi?CH=132118

Change 132118 by imp at imp_paco-paco on 2007/12/30 20:00:19

	Integrate from juniper-mips.  Also, make it get past make depend on
	malta

Affected files ...

.. //depot/projects/mips2-jnpr/src/sys/mips/include/_bus.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/_inttypes.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/_limits.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/_stdint.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/_types.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/am29lv081b.h#1 branch
.. //depot/projects/mips2-jnpr/src/sys/mips/include/archtype.h#1 branch
.. //depot/projects/mips2-jnpr/src/sys/mips/include/asm.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/atomic.h#2 edit
.. //depot/projects/mips2-jnpr/src/sys/mips/include/bootinfo.h#1 branch
.. //depot/projects/mips2-jnpr/src/sys/mips/include/bswap.h#1 branch
.. //depot/projects/mips2-jnpr/src/sys/mips/include/bus.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/clock.h#2 edit
.. //depot/projects/mips2-jnpr/src/sys/mips/include/clockvar.h#1 branch
.. //depot/projects/mips2-jnpr/src/sys/mips/include/cp0.h#1 branch
.. //depot/projects/mips2-jnpr/src/sys/mips/include/cpu.h#2 edit
.. //depot/projects/mips2-jnpr/src/sys/mips/include/cpuconf.h#1 branch
.. //depot/projects/mips2-jnpr/src/sys/mips/include/cpufunc.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/db_machdep.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/defs.h#1 branch
.. //depot/projects/mips2-jnpr/src/sys/mips/include/defs_mips.h#1 branch
.. //depot/projects/mips2-jnpr/src/sys/mips/include/elf.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/endian.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/exec.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/float.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/frame.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/gdb_machdep.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/ieeefp.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/in_cksum.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/intr.h#1 branch
.. //depot/projects/mips2-jnpr/src/sys/mips/include/kdb.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/limits.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/md_var.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/memdev.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/mips_opcode.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/mutex.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/ns16550.h#1 branch
.. //depot/projects/mips2-jnpr/src/sys/mips/include/param.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/pcb.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/pcpu.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/pltfm.h#1 branch
.. //depot/projects/mips2-jnpr/src/sys/mips/include/pmap.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/pmc_mdep.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/proc.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/profile.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/psl.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/pte.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/ptrace.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/queue.h#1 branch
.. //depot/projects/mips2-jnpr/src/sys/mips/include/reg.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/regdef.h#1 branch
.. //depot/projects/mips2-jnpr/src/sys/mips/include/regnum.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/reloc.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/resource.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/rm7000.h#1 branch
.. //depot/projects/mips2-jnpr/src/sys/mips/include/runq.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/setjmp.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/sf_buf.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/sigframe.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/signal.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/smp.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/stdarg.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/trap.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/ucontext.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/varargs.h#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/include/vmparam.h#2 edit
.. //depot/projects/mips2-jnpr/src/sys/mips/mips/cache.S#1 branch
.. //depot/projects/mips2-jnpr/src/sys/mips/mips/clock.c#1 branch
.. //depot/projects/mips2-jnpr/src/sys/mips/mips/cpu.c#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/mips/db_disasm.c#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/mips/db_interface.c#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/mips/db_trace.c#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/mips/elf_machdep.c#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/mips/exception.S#2 edit
.. //depot/projects/mips2-jnpr/src/sys/mips/mips/fp.S#1 branch
.. //depot/projects/mips2-jnpr/src/sys/mips/mips/gdb_machdep.c#1 branch
.. //depot/projects/mips2-jnpr/src/sys/mips/mips/genassym.c#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/mips/interrupt.c#1 branch
.. //depot/projects/mips2-jnpr/src/sys/mips/mips/locore.S#2 edit
.. //depot/projects/mips2-jnpr/src/sys/mips/mips/machdep.c#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/mips/mainbus.c#1 branch
.. //depot/projects/mips2-jnpr/src/sys/mips/mips/mem.c#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/mips/mips_subr.c#1 branch
.. //depot/projects/mips2-jnpr/src/sys/mips/mips/mp_machdep.c#1 branch
.. //depot/projects/mips2-jnpr/src/sys/mips/mips/pm_machdep.c#1 branch
.. //depot/projects/mips2-jnpr/src/sys/mips/mips/pmap.c#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/mips/psraccess.S#1 branch
.. //depot/projects/mips2-jnpr/src/sys/mips/mips/support.S#2 edit
.. //depot/projects/mips2-jnpr/src/sys/mips/mips/swtch.S#2 edit
.. //depot/projects/mips2-jnpr/src/sys/mips/mips/tlb.S#1 branch
.. //depot/projects/mips2-jnpr/src/sys/mips/mips/trap.c#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/mips/uio_machdep.c#2 integrate
.. //depot/projects/mips2-jnpr/src/sys/mips/mips/vm_machdep.c#2 integrate

Differences ...

==== //depot/projects/mips2-jnpr/src/sys/mips/include/_bus.h#2 (text+ko) ====

@@ -25,11 +25,11 @@
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  *
- * $FreeBSD: src/sys/amd64/include/_bus.h,v 1.1 2005/04/18 21:45:33 imp Exp $
+ * $FreeBSD: src/sys/i386/include/_bus.h,v 1.1 2005/04/18 21:45:33 imp Exp $
  */
 
-#ifndef AMD64_INCLUDE__BUS_H
-#define AMD64_INCLUDE__BUS_H
+#ifndef MIPS_INCLUDE__BUS_H
+#define MIPS_INCLUDE__BUS_H
 
 /*
  * Bus address and size types
@@ -40,7 +40,7 @@
 /*
  * Access methods for bus resources and address space.
  */
-typedef	uint32_t bus_space_tag_t;
-typedef	uint32_t bus_space_handle_t;
+typedef	int bus_space_tag_t;
+typedef	u_int bus_space_handle_t;
 
-#endif /* AMD64_INCLUDE__BUS_H */
+#endif /* MIPS_INCLUDE__BUS_H */

==== //depot/projects/mips2-jnpr/src/sys/mips/include/_inttypes.h#2 (text+ko) ====

@@ -34,7 +34,7 @@
  * POSSIBILITY OF SUCH DAMAGE.
  *
  *	From: $NetBSD: int_fmtio.h,v 1.2 2001/04/26 16:25:21 kleink Exp $
- * $FreeBSD: src/sys/amd64/include/_inttypes.h,v 1.3 2003/05/01 01:05:23 peter Exp $
+ * $FreeBSD: src/sys/i386/include/_inttypes.h,v 1.2 2002/06/30 05:48:02 mike Exp $
  */
 
 #ifndef _MACHINE_INTTYPES_H_

==== //depot/projects/mips2-jnpr/src/sys/mips/include/_limits.h#2 (text+ko) ====

@@ -27,10 +27,10 @@
  * SUCH DAMAGE.
  *
  *	@(#)limits.h	8.3 (Berkeley) 1/4/94
- * $FreeBSD: src/sys/amd64/include/_limits.h,v 1.11 2005/08/20 16:44:40 stefanf Exp $
+ * $FreeBSD: src/sys/i386/include/_limits.h,v 1.27 2005/01/06 22:18:15 imp Exp $
  */
 
-#ifndef	_MACHINE__LIMITS_H_
+#ifndef _MACHINE__LIMITS_H_
 #define	_MACHINE__LIMITS_H_
 
 /*
@@ -59,18 +59,25 @@
 #define	__INT_MAX	0x7fffffff	/* max value for an int */
 #define	__INT_MIN	(-0x7fffffff - 1)	/* min value for an int */
 
-#define	__ULONG_MAX	0xffffffffUL	/* max for an unsigned long */
-#define	__LONG_MAX	0x7fffffffL	/* max for a long */
-#define	__LONG_MIN	(-0x7fffffffL - 1) /* min for a long */
+/* Bad hack for gcc configured to give 64-bit longs. */
+#ifdef _LARGE_LONG
+#define	__ULONG_MAX	0xffffffffffffffffUL
+#define	__LONG_MAX	0x7fffffffffffffffL
+#define	__LONG_MIN	(-0x7fffffffffffffffL - 1)
+#else
+#define	__ULONG_MAX	0xffffffffUL	/* max value for an unsigned long */
+#define	__LONG_MAX	0x7fffffffL	/* max value for a long */
+#define	__LONG_MIN	(-0x7fffffffL - 1)	/* min value for a long */
+#endif
 
 			/* max value for an unsigned long long */
 #define	__ULLONG_MAX	0xffffffffffffffffULL
 #define	__LLONG_MAX	0x7fffffffffffffffLL	/* max value for a long long */
 #define	__LLONG_MIN	(-0x7fffffffffffffffLL - 1)  /* min for a long long */
 
-#define	__SSIZE_MAX	__LONG_MAX	/* max value for a ssize_t */
+#define	__SSIZE_MAX	__INT_MAX	/* max value for a ssize_t */
 
-#define	__SIZE_T_MAX	__ULONG_MAX	/* max value for a size_t */
+#define	__SIZE_T_MAX	__UINT_MAX	/* max value for a size_t */
 
 #define	__OFF_MAX	__LLONG_MAX	/* max value for an off_t */
 #define	__OFF_MIN	__LLONG_MIN	/* min value for an off_t */
@@ -80,13 +87,11 @@
 #define	__QUAD_MAX	__LLONG_MAX	/* max value for a quad_t */
 #define	__QUAD_MIN	__LLONG_MIN	/* min value for a quad_t */
 
+#ifdef _LARGE_LONG
+#define	__LONG_BIT	64
+#else
 #define	__LONG_BIT	32
+#endif
 #define	__WORD_BIT	32
 
-/*
- * Minimum signal stack size.
- * XXXMIPS: need a value
- */
-#define	__MINSIGSTKSZ	(512 * 4)
-
 #endif /* !_MACHINE__LIMITS_H_ */

==== //depot/projects/mips2-jnpr/src/sys/mips/include/_stdint.h#2 (text+ko) ====

@@ -34,7 +34,7 @@
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- * $FreeBSD: src/sys/amd64/include/_stdint.h,v 1.3 2004/05/18 16:04:56 stefanf Exp $
+ * $FreeBSD: src/sys/i386/include/_stdint.h,v 1.2 2004/05/18 16:04:57 stefanf Exp $
  */
 
 #ifndef _MACHINE__STDINT_H_

==== //depot/projects/mips2-jnpr/src/sys/mips/include/_types.h#2 (text+ko) ====

@@ -33,7 +33,7 @@
  *
  *	From: @(#)ansi.h	8.2 (Berkeley) 1/4/94
  *	From: @(#)types.h	8.3 (Berkeley) 1/5/94
- * $FreeBSD: src/sys/amd64/include/_types.h,v 1.11 2006/01/09 06:05:56 imp Exp $
+ * $FreeBSD: src/sys/i386/include/_types.h,v 1.12 2005/07/02 23:13:31 thompsa Exp $
  */
 
 #ifndef _MACHINE__TYPES_H_
@@ -43,6 +43,8 @@
 #error this file needs sys/cdefs.h as a prerequisite
 #endif
 
+#define __NO_STRICT_ALIGNMENT
+
 /*
  * Basic types upon which most other types are built.
  */
@@ -52,23 +54,33 @@
 typedef	unsigned short		__uint16_t;
 typedef	int			__int32_t;
 typedef	unsigned int		__uint32_t;
+
+#if defined(lint)
+/* LONGLONG */
+typedef	long long		__int64_t;
+/* LONGLONG */
+typedef	unsigned long long	__uint64_t;
+#elif defined(__GNUCLIKE_ATTRIBUTE_MODE_DI)
+typedef	int __attribute__((__mode__(__DI__)))		__int64_t;
+typedef	unsigned int __attribute__((__mode__(__DI__)))	__uint64_t;
+#else
+/* LONGLONG */
 typedef	long long		__int64_t;
+/* LONGLONG */
 typedef	unsigned long long	__uint64_t;
+#endif
 
 /*
  * Standard type definitions.
  */
-typedef	__int32_t	__clock_t;		/* clock()... */
+typedef	unsigned long	__clock_t;		/* clock()... */
 typedef	unsigned int	__cpumask_t;
 typedef	__int32_t	__critical_t;
 typedef	double		__double_t;
-/*
- * XXXMIPS: should we use double here, or float?
- */
 typedef	double		__float_t;
-typedef	__int32_t	__intfptr_t;
+typedef	long    	__intfptr_t;
 typedef	__int64_t	__intmax_t;
-typedef	__int32_t	__intptr_t;
+typedef	long            __intptr_t;
 typedef	__int32_t	__int_fast8_t;
 typedef	__int32_t	__int_fast16_t;
 typedef	__int32_t	__int_fast32_t;
@@ -79,11 +91,12 @@
 typedef	__int64_t	__int_least64_t;
 typedef	__int32_t	__ptrdiff_t;		/* ptr1 - ptr2 */
 typedef	__int32_t	__register_t;
+typedef	__int32_t	f_register_t;
 typedef	__int32_t	__segsz_t;		/* segment size (in pages) */
 typedef	__uint32_t	__size_t;		/* sizeof() */
 typedef	__int32_t	__ssize_t;		/* byte count or error */
 typedef	__int32_t	__time_t;		/* time()... */
-typedef	__uint32_t	__uintfptr_t;
+typedef	unsigned long	__uintfptr_t;
 typedef	__uint64_t	__uintmax_t;
 typedef	__uint32_t	__uintptr_t;
 typedef	__uint32_t	__uint_fast8_t;
@@ -99,20 +112,24 @@
 typedef	__int64_t	__vm_ooffset_t;
 typedef	__uint32_t	__vm_paddr_t;
 typedef	__uint64_t	__vm_pindex_t;
-typedef	__uint32_t	__vm_size_t;
+typedef	unsigned long	__vm_size_t;
 
 /*
  * Unusual type definitions.
  */
 #ifdef __GNUCLIKE_BUILTIN_VARARGS
-typedef	__builtin_va_list	__va_list;	/* internally known to gcc */
-#elif defined(lint)
-typedef	char *			__va_list;	/* pretend */
-#endif
+typedef __builtin_va_list	__va_list;	/* internally known to gcc */
+#else
+typedef	char *			__va_list;
+#endif /* __GNUCLIKE_BUILTIN_VARARGS */
 #if defined(__GNUC_VA_LIST_COMPATIBILITY) && !defined(__GNUC_VA_LIST) \
     && !defined(__NO_GNUC_VA_LIST)
 #define __GNUC_VA_LIST
 typedef __va_list		__gnuc_va_list;	/* compatibility w/GNU headers*/
 #endif
 
+typedef struct label_t {
+            __register_t val[13];
+} label_t;
+
 #endif /* !_MACHINE__TYPES_H_ */

==== //depot/projects/mips2-jnpr/src/sys/mips/include/asm.h#2 (text+ko) ====

@@ -1,6 +1,7 @@
-/*	$NetBSD: asm.h,v 1.37 2006/01/20 22:02:40 christos Exp $	*/
+/*	$NetBSD: asm.h,v 1.29 2000/12/14 21:29:51 jeffs Exp $	*/
 
 /*
+ * $Id: asm.h,v 1.10 2007/08/09 11:23:32 katta Exp $
  * Copyright (c) 1992, 1993
  *	The Regents of the University of California.  All rights reserved.
  *
@@ -15,7 +16,11 @@
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the University of
+ *	California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
  *    may be used to endorse or promote products derived from this software
  *    without specific prior written permission.
  *
@@ -52,131 +57,86 @@
  */
 
 #ifndef _MACHINE_ASM_H_
-#define	_MACHINE_ASM_H_
+#define _MACHINE_ASM_H_
 
-#include <sys/cdefs.h>
+#ifndef NO_REG_DEFS
+#include <machine/regdef.h>
+#endif
+#include <machine/endian.h>
 
 /*
- *	Assembly coding style
- *
- *	This file contains macros and register defines to
- *	aid in writing more readable assembly code.
- *	Some rules to make assembly code understandable by
- *	a debugger are also noted.
+ * Define -pg profile entry code.
+ * Must always be noreorder, must never use a macro instruction
+ * Final addiu to t9 must always equal the size of this _KERN_MCOUNT
  */
+#define _KERN_MCOUNT						\
+	.set	push;						\
+	.set	noreorder;					\
+	.set	noat;						\
+	subu	sp,sp,16;					\
+	sw	t9,12(sp);					\
+	move	AT,ra;						\
+	lui	t9,%hi(_mcount); 				\
+	addiu	t9,t9,%lo(_mcount);				\
+	jalr	t9;						\
+	nop;							\
+	lw	t9,4(sp);					\
+	addiu	sp,sp,8;					\
+	addiu	t9,t9,40;					\
+	.set	pop;					
 
-/*
- *	Symbolic register names and register saving rules
- *
- *	Legend:
- *		T	Saved by caller (Temporaries)
- *		S	Saved by callee (call-Safe registers)
- */
+#ifdef GPROF
+#define MCOUNT _KERN_MCOUNT
+#else
+#define	MCOUNT
+#endif
+
+#define _C_LABEL(x)	x
 
-#define	zero	$0	/* 		wired zero		*/
-#define AT	$1	/* (T)		assembler scratch	*/
-#define v0	$2
-#define v1	$3
-#define a0	$4	/* (T)		argument registers	*/
-#define a1	$5
-#define a2	$6
-#define a3	$7
 /* 
- * There is neither n32 nor n64 ABI support on the moment, but we'll 
- * leave these defines to our descendants.
+ *  Endian-independent assembly-code aliases for unaligned memory accesses.
  */
-#if defined(__mips_n32) || defined(__mips_n64)
-#define	a4	$8
-#define	a5	$9
-#define	a6	$10
-#define	a7	$11
-#define	t0	$12	/* temp registers (not saved across subroutine calls) */
-#define	t1	$13
-#define	t2	$14
-#define	t3	$15
-#else
-#define t0	$8	/* temp registers (not saved across subroutine calls) */
-#define t1	$9
-#define t2	$10
-#define t3	$11
-#define t4	$12
-#define t5	$13
-#define t6	$14
-#define t7	$15
-#endif /* __mips_n32 || __mips_n64 */
-#define s0	$16	/* (S)		call-safe registers	*/
-#define s1	$17
-#define s2	$18
-#define s3	$19
-#define s4	$20
-#define s5	$21
-#define s6	$22
-#define s7	$23
-#define t8	$24	/* (T)		temporary registers	*/
-#define t9	$25	/* Address of callee in PIC code	*/
-#define k0	$26	/* Kernel registers?			*/
-#define k1	$27
-#define	gp	$28	/* (T)		(local) data pointer	*/
-#define sp	$29	/* (S)		stack pointer		*/
-#define s8	$30	/* (S)		call-safe register	*/
-#define ra	$31	/* (T)		return address		*/
+#if BYTE_ORDER == LITTLE_ENDIAN
+#define LWLO    lwl 
+#define LWHI    lwr
+#define SWLO    swl
+#define SWHI    swr
+#endif   
 
-/*
- * These are temp registers whose names can be used in either the old
- * or new ABI, although they map to different physical registers.  In
- * the old ABI, they map to t4-t7, and in the new ABI, they map to a4-a7.
- *
- * Because they overlap with the last 4 arg regs in the new ABI, ta0-ta3
- * should be used only when we need more than t0-t3.
- */
-#if defined(__mips_n32) || defined(__mips_n64)
-#define ta0     $8
-#define ta1     $9
-#define ta2     $10
-#define ta3     $11
-#else
-#define ta0     $12
-#define ta1     $13
-#define ta2     $14
-#define ta3     $15
-#endif /* __mips_n32 || __mips_n64 */
+#if BYTE_ORDER == BIG_ENDIAN
+#define LWLO    lwr
+#define LWHI    lwl
+#define SWLO    swr
+#define SWHI    swl 
+#endif 
 
-#ifdef __ELF__
-# define _C_LABEL(x)    x
+#ifdef USE_AENT
+#define AENT(x)				\
+	.aent	x, 0
 #else
-# ifdef __STDC__
-#  define _C_LABEL(x)   _ ## x
-# else
-#  define _C_LABEL(x)   _/**/x
-# endif
+#define AENT(x)
 #endif
 
-#define AENT(x)								\
-	.aent   x, 0
-
-/*
- * WEAK_ALIAS: create a weak alias.
- */
+#ifdef __ELF__
 #define	WEAK_ALIAS(alias,sym)						\
 	.weak alias;							\
 	alias = sym
+#endif
 
 /*
- * STRONG_ALIAS: create a strong alias.
+ * WARN_REFERENCES: create a warning if the specified symbol is referenced
+ * (ELF only, and thus, no leading underscores).
  */
-#define STRONG_ALIAS(alias,sym)						\
-	.globl alias;							\
-	alias = sym
-
-#define	GLOBAL(sym)						\
-	.globl sym; sym:
-
-#define	ENTRY(sym)						\
-	.text; .globl sym; .ent sym; sym:
+#ifdef __ELF__
+#ifdef __STDC__
+#define	WARN_REFERENCES(_sym,_msg)				\
+	.section .gnu.warning. ## _sym ; .ascii _msg ; .text
+#else
+#define	WARN_REFERENCES(_sym,_msg)				\
+	.section .gnu.warning./**/_sym ; .ascii _msg ; .text
+#endif /* __STDC__ */
+#endif /* __ELF__ */
 
-#define	ASM_ENTRY(sym)						\
-	.text; .globl sym; .type sym, at function; sym:
-
 /*
  * LEAF
  *	A leaf routine does
@@ -188,16 +148,18 @@
 	.globl	_C_LABEL(x);		\
 	.ent	_C_LABEL(x), 0;		\
 _C_LABEL(x): ;				\
-	.frame sp, 0, ra;
+	.frame sp, 0, ra;		\
+	MCOUNT
 
 /*
- * STATIC_LEAF
- *	Declare a local leaf function.
+ * LEAF_NOPROFILE
+ *	No profilable leaf routine.
  */
-#define STATIC_LEAF(x)			\
+#define LEAF_NOPROFILE(x)		\
+	.globl	_C_LABEL(x);		\
 	.ent	_C_LABEL(x), 0;		\
 _C_LABEL(x): ;				\
-	.frame sp, 0, ra;
+	.frame	sp, 0, ra
 
 /*
  * XLEAF
@@ -209,14 +171,6 @@
 _C_LABEL(x):
 
 /*
- * STATIC_XLEAF
- *	declare alternate entry to a static leaf routine
- */
-#define STATIC_XLEAF(x)			\
-	AENT (_C_LABEL(x));		\
-_C_LABEL(x):
-
-/*
  * NESTED
  *	A function calls other functions and needs
  *	therefore stack space to save/restore registers.
@@ -225,7 +179,18 @@
 	.globl	_C_LABEL(x);		\
 	.ent	_C_LABEL(x), 0; 	\
 _C_LABEL(x): ;				\
-	.frame	sp, fsize, retpc;
+	.frame	sp, fsize, retpc;	\
+	MCOUNT
+
+/*
+ * NESTED_NOPROFILE(x)
+ *	No profilable nested routine.
+ */
+#define NESTED_NOPROFILE(x, fsize, retpc)	\
+	.globl	_C_LABEL(x);		\
+	.ent	_C_LABEL(x), 0;		\
+_C_LABEL(x): ;				\
+	.frame	sp, fsize, retpc
 
 /*
  * XNESTED
@@ -244,35 +209,86 @@
 	.end _C_LABEL(x)
 
 /*
- * Call ast if required
+ * IMPORT -- import external symbol
+ */
+#define IMPORT(sym, size)		\
+	.extern _C_LABEL(sym),size
+
+/*
+ * EXPORT -- export definition of symbol
+ */
+#define EXPORT(x)			\
+	.globl	_C_LABEL(x);		\
+_C_LABEL(x):
+
+/*
+ * VECTOR
+ *	exception vector entrypoint
+ *	XXX: regmask should be used to generate .mask
+ */
+#define VECTOR(x, regmask)		\
+	.ent	_C_LABEL(x),0;		\
+	EXPORT(x);			\
+
+#ifdef __STDC__
+#define VECTOR_END(x)			\
+	EXPORT(x ## End);		\
+	END(x)
+#else
+#define VECTOR_END(x)			\
+	EXPORT(x/**/End);		\
+	END(x)
+#endif
+
+#define KSEG0TEXT_START
+#define KSEG0TEXT_END
+#define KSEG0TEXT		.text
+
+/*
+ * Macros to panic and printf from assembly language.
+ */
+#define PANIC(msg)			\
+	la	a0, 9f;			\
+	jal	_C_LABEL(panic);	\
+	nop;				\
+	MSG(msg)
+
+#define PANIC_KSEG0(msg, reg)	PANIC(msg)
+
+#define	PRINTF(msg)			\
+	la	a0, 9f;			\
+	jal	_C_LABEL(printf);	\
+	nop;				\
+	MSG(msg)
+
+#define	MSG(msg)			\
+	.rdata;				\
+9:	.asciiz	msg;			\
+	.text
+
+#define ASMSTR(str)			\
+	.asciiz str;			\
+	.align	3
+
+/*
+ * XXX retain dialects XXX
  */
-#define DO_AST							\
-	lw	k1, pcpup;					\
-	lw	k1, PC_CURTHREAD(k1);				\
-	lw	t0, TD_FLAGS(k1);				\
-	and	t0, t0, (TDF_ASTPENDING|TDF_NEEDRESCHED);	\
-	beq	t0, zero, 27f;					\
-	nop;							\
-	lw	k1, TD_FRAME(k1);				\
-	lw	t0, TF_REG_SR(k1);				\
-	and	t0, t0, MIPS_SR_KSU_USER;			\
-	beq	t0, zero, 27f;					\
-	nop;							\
-	move	a0, k1;						\
-	jal	ast;						\
-	nop;							\
-27:					
+#define ALEAF(x)			XLEAF(x)
+#define NLEAF(x)			LEAF_NOPROFILE(x)
+#define NON_LEAF(x, fsize, retpc)	NESTED(x, fsize, retpc)
+#define NNON_LEAF(x, fsize, retpc)	NESTED_NOPROFILE(x, fsize, retpc)
 
 /*
  *  standard callframe {
- *      register_t cf_args[4];          arg0 - arg3
- *      register_t cf_sp;               frame pointer
- *      register_t cf_ra;               return address
+ *  	register_t cf_args[4];		arg0 - arg3
+ *  	register_t cf_sp;		frame pointer
+ *  	register_t cf_ra;		return address
  *  };
  */
-#define CALLFRAME_SIZ   (4 * (4 + 2))
-#define CALLFRAME_SP    (4 * 4)
-#define CALLFRAME_RA    (4 * 5)
+#define	CALLFRAME_SIZ	(4 * (4 + 2))
+#define	CALLFRAME_SP	(4 * 4)
+#define	CALLFRAME_RA	(4 * 5)
+#define START_FRAME	CALLFRAME_SIZ
 
 /*
  * While it would be nice to be compatible with the SGI
@@ -285,105 +301,147 @@
  */
 
 #if !defined(_MIPS_BSD_API) || _MIPS_BSD_API == _MIPS_BSD_API_LP32
-#define REG_L	lw
+#define	REG_L	lw
 #define REG_S	sw
-#define REG_LI	li
-#define REG_PROLOGUE	.set push
-#define REG_EPILOGUE	.set pop
+#define	REG_LI	li
+#define	REG_PROLOGUE	.set push
+#define	REG_EPILOGUE	.set pop
 #define SZREG	4
 #else
-#define REG_L	ld
+#define	REG_L	ld
 #define REG_S	sd
-#define REG_LI	dli
-#define REG_PROLOGUE	.set push ; .set mips3
-#define REG_EPILOGUE	.set pop
+#define	REG_LI	dli
+#define	REG_PROLOGUE	.set push ; .set mips3
+#define	REG_EPILOGUE	.set pop
 #define SZREG	8
-#endif  /* _MIPS_BSD_API */
+#endif	/* _MIPS_BSD_API */
+
+#define mfc0_macro(data, spr)                                           \
+    asm volatile ("mfc0 %0, $%1"                                        \
+                  : "=r" (data)                 /* outputs */           \
+                  : "i" (spr));                 /* inputs */
+
+#define mtc0_macro(data, spr)                                           \
+    asm volatile ("mtc0 %0, $%1"                                        \
+                  :                             /* outputs */           \
+                  : "r" (data), "i" (spr));     /* inputs */
+
+#define cfc0_macro(data, spr)                                           \
+    asm volatile ("cfc0 %0, $%1"                                        \
+                  : "=r" (data)                 /* outputs */           \
+                  : "i" (spr));                 /* inputs */
+
+
+#define ctc0_macro(data, spr)                                           \
+    asm volatile ("ctc0 %0, $%1"                                        \
+                  :                             /* outputs */           \
+                  : "r" (data), "i" (spr));     /* inputs */
+
+
+#define lbu_macro(data, addr)                                           \
+    asm volatile ("lbu		%0, 0x0(%1)"                            \
+                  : "=r" (data)                 /* outputs */           \
+                  : "r" (addr));                /* inputs */
+
+#define lb_macro(data, addr)                                            \
+    asm volatile ("lb		%0, 0x0(%1)"                            \
+                  : "=r" (data)                 /* outputs */           \
+                  : "r" (addr));                /* inputs */
+
+#define lwl_macro(data, addr)                                           \
+    asm volatile ("lwl		%0, 0x0(%1)"                            \
+                  : "=r" (data)                 /* outputs */           \
+                  : "r" (addr));                /* inputs */
+
+#define lwr_macro(data, addr)                                           \
+    asm volatile ("lwr		%0, 0x0(%1)"                            \
+                  : "=r" (data)                 /* outputs */           \
+                  : "r" (addr));                /* inputs */
+
+#define ldl_macro(data, addr)                                           \
+    asm volatile ("ldl		%0, 0x0(%1)"                            \
+                  : "=r" (data)                 /* outputs */           \
+                  : "r" (addr));                /* inputs */
+
+#define ldr_macro(data, addr)                                           \
+    asm volatile ("ldr		%0, 0x0(%1)"                            \
+                  : "=r" (data)                 /* outputs */           \
+                  : "r" (addr));                /* inputs */
+
+#define sb_macro(data, addr)                                            \
+    asm volatile ("sb		%0, 0x0(%1)"                            \
+                  : 				/* outputs */		\
+                  : "r" (data), "r" (addr));	/* inputs */
+
+#define swl_macro(data, addr)                                           \
+    asm volatile ("swl		%0, 0x0(%1)"                            \
+                  : 				/* outputs */		\
+                  : "r" (data), "r" (addr));	/* inputs */
+
+#define swr_macro(data, addr)                                           \
+    asm volatile ("swr		%0, 0x0(%1)"                            \
+                  : 				/* outputs */		\
+                  : "r" (data), "r" (addr));	/* inputs */
 
-/* 
- * XXX: Values which depends on register size. Used for sigcontext/mcontext_t 
- * handling. Should to be checked and replaced in _setjmp/_longjmp functions.
- */
+#define sdl_macro(data, addr)                                           \
+    asm volatile ("sdl		%0, 0x0(%1)"                            \
+                  : 				/* outputs */		\
+                  : "r" (data), "r" (addr));	/* inputs */
 
-#if !defined(_MIPS_BSD_API) || _MIPS_BSD_API == _MIPS_BSD_API_LP32
-#define _OFFSETOF_SC_REGS       12
-#define _OFFSETOF_SC_FPREGS     152
-#define _OFFSETOF_SC_MASK       320
-#else
-#define _OFFSETOF_SC_REGS       16
-#define _OFFSETOF_SC_FPREGS     292
-#define _OFFSETOF_SC_MASK       460
-#endif
+#define sdr_macro(data, addr)                                           \
+    asm volatile ("sdr		%0, 0x0(%1)"                            \
+                  : 				/* outputs */		\
+                  : "r" (data), "r" (addr));	/* inputs */
 
-#define RCSID(x)	.text; .asciz x
+#define mfgr_macro(data, gr)						\
+    asm volatile ("move %0, $%1"					\
+		  : "=r" (data)	/* outputs */				\
+		  : "i" (gr));	/* inputs */
 
-#undef __FBSDID
-#if !defined(lint) && !defined(STRIP_FBSDID)
-#define __FBSDID(s)	.ident s
-#else
-#define __FBSDID(s)	/* nothing */
-#endif /* not lint and not STRIP_FBSDID */
+#define dmfc0_macro(data, spr)                                          \
+    asm volatile ("dmfc0	%0, $%1"                                \
+                  : "=r" (data)                 /* outputs */           \
+                  : "i" (spr));                 /* inputs */
 
-#ifdef __STDC__
-#define	WARN_REFERENCES(sym,msg)					\
-	.stabs msg ## ,30,0,0,0 ;					\
-	.stabs __STRING(_C_LABEL(sym)) ## ,1,0,0,0
-#elif defined(__ELF__)
-#define	WARN_REFERENCES(sym,msg)					\
-	.stabs msg,30,0,0,0 ;						\
-	.stabs __STRING(sym),1,0,0,0
-#else
-#define	WARN_REFERENCES(sym,msg)					\
-	.stabs msg,30,0,0,0 ;						\
-	.stabs __STRING(_/**/sym),1,0,0,0
-#endif /* __STDC__ */
+#define dmtc0_macro(data, spr, sel)						    \
+    asm volatile ("dmtc0	%0, $%1, %2"				            \
+                  :					    /* no  outputs */       \
+                  : "r" (data), "i" (spr), "i" (sel));      /* inputs      */
 
 /*
- * Description of the setjmp buffer
+ * The DYNAMIC_STATUS_MASK option adds an additional masking operation
+ * when updating the hardware interrupt mask in the status register.
  *
- * word  0	magic number	(dependant on creator)
- *       1	RA
- *       2	S0
- *       3	S1
- *       4	S2
- *       5	S3
- *       6	S4
- *       7	S5
- *       8	S6
- *       9	S7
- *       10	SP
- *       11	S8
- *       12	signal mask	(dependant on magic)
- *       13	(con't)
- *       14	(con't)
- *       15	(con't)
+ * This is useful for platforms that need to at run-time mask
+ * interrupts based on motherboard configuration or to handle
+ * slowly clearing interrupts.
  *
- * The magic number number identifies the jmp_buf and
- * how the buffer was created as well as providing
- * a sanity check
- *
+ * XXX this is only currently implemented for mips3.
  */
+#ifdef MIPS_DYNAMIC_STATUS_MASK
+#define DYNAMIC_STATUS_MASK(sr,scratch)	\
+	lw	scratch, mips_dynamic_status_mask; \
+	and	sr, sr, scratch
 
-#define _JB_MAGIC__SETJMP	0xBADFACED
-#define _JB_MAGIC_SETJMP	0xFACEDBAD
+#define DYNAMIC_STATUS_MASK_TOUSER(sr,scratch1)		\
+	ori	sr, (MIPS_INT_MASK | MIPS_SR_INT_IE);	\
+	DYNAMIC_STATUS_MASK(sr,scratch1)
+#else
+#define DYNAMIC_STATUS_MASK(sr,scratch)
+#define DYNAMIC_STATUS_MASK_TOUSER(sr,scratch1)
+#endif
 
-/* Valid for all jmp_buf's */
+#ifdef SMP
+    /*
+     * FREEBSD_DEVELOPERS_FIXME
+     * In multiprocessor case, store/retrieve the pcpu structure
+     * address for current CPU in scratch register for fast access.
+     */
 
-#define _JB_MAGIC		0
-#define _JB_REG_RA		1
-#define _JB_REG_S0		2
-#define _JB_REG_S1		3
-#define _JB_REG_S2		4
-#define _JB_REG_S3		5
-#define _JB_REG_S4		6
-#define _JB_REG_S5		7
-#define _JB_REG_S6		8
-#define _JB_REG_S7		9
-#define _JB_REG_SP		10
-#define _JB_REG_S8		11
 
-/* Only valid with the _JB_MAGIC_SETJMP magic */
-
-#define _JB_SIGMASK		12
+#else
+#define GET_CPU_PCPU(reg)		\
+	lw	reg, _C_LABEL(pcpup);
+#endif
 
 #endif /* !_MACHINE_ASM_H_ */

==== //depot/projects/mips2-jnpr/src/sys/mips/include/atomic.h#2 (text+ko) ====

@@ -1,6 +1,5 @@
 /*-
- * Copyright (c) 2002-2004 Juli Mallett.  All rights reserved.
- * Copyright (c) 2006 John Baldwin <jhb at FreeBSD.org>
+ * Copyright (c) 1998 Doug Rabson
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -24,8 +23,9 @@
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  *
- * $FreeBSD: src/sys/amd64/include/atomic.h,v 1.39 2005/09/27 17:39:10 jhb Exp $
+ * $FreeBSD: src/sys/alpha/include/atomic.h,v 1.21.2.3 2005/10/06 18:12:05 jhb Exp $
  */
+
 #ifndef _MACHINE_ATOMIC_H_
 #define	_MACHINE_ATOMIC_H_
 
@@ -33,235 +33,349 @@
 #error this file needs sys/cdefs.h as a prerequisite
 #endif
 
-#include <machine/cpufunc.h>
+static __inline  void
+mips_sync(void)
+{
+        __asm __volatile (".set noreorder\n\t"
+			"sync\n\t"
+			"nop\n\t"
+			"nop\n\t"
+			"nop\n\t"
+			"nop\n\t"
+			"nop\n\t"
+			"nop\n\t"
+			"nop\n\t"
+			"nop\n\t"
+			".set reorder\n"
+			: : : "memory");
+}
 
 /*
  * Various simple arithmetic on memory which is atomic in the presence
- * of interrupts and multiple processors.
- *
- * atomic_set_int(P, V)		(*(u_int*)(P) |= (V))
- * atomic_clear_int(P, V)	(*(u_int*)(P) &= ~(V))
- * atomic_add_int(P, V)		(*(u_int*)(P) += (V))
- * atomic_subtract_int(P, V)	(*(u_int*)(P) -= (V))
- * atomic_readandclear_int(P)	(return  *(u_int*)P; *(u_int*)P = 0;)
- *
- * atomic_set_long(P, V)	(*(u_long*)(P) |= (V))
- * atomic_clear_long(P, V)	(*(u_long*)(P) &= ~(V))
- * atomic_add_long(P, V)	(*(u_long*)(P) += (V))
- * atomic_subtract_long(P, V)	(*(u_long*)(P) -= (V))
- * atomic_readandclear_long(P)	(return  *(u_long*)P; *(u_long*)P = 0;)
+ * of interrupts and SMP safe.

>>> TRUNCATED FOR MAIL (1000 lines) <<<


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