PERFORCE change 117140 for review

[Marcel Moolenaar]

On Apr 2, 2007, at 6:15 AM, John Baldwin wrote:

> On Sunday 01 April 2007 05:52:17 pm Marcel Moolenaar wrote:
>> http://perforce.freebsd.org/chv.cgi?CH=117140
>>
>> Change 117140 by marcel at marcel_xcllnt on 2007/04/01 21:52:12
>>
>> 	Create PCPU structures for all CPUs. Reduce dependency
>> 	on MAXCPU by allocating PCPU structures on demand.
>>
>> Affected files ...
>>
>> .. //depot/projects/powerpc/sys/powerpc/include/pcpu.h#6 edit
>> .. //depot/projects/powerpc/sys/powerpc/powerpc/machdep.c#8 edit
>> .. //depot/projects/powerpc/sys/powerpc/powerpc/mp_machdep.c#9 edit
>> .. //depot/projects/powerpc/sys/powerpc/powerpc/ofw_machdep.c#7 edit
>>
>> Differences ...
>>
>> ==== //depot/projects/powerpc/sys/powerpc/include/pcpu.h#6 (text 
>> +ko) ====
>>
>> @@ -40,6 +40,7 @@
>>  	int		pc_inside_intr;					\
>>  	struct pmap	*pc_curpmap;		/* current pmap */	\
>>  	struct thread   *pc_fputhread;          /* current fpu user */  \
>> +	int		pc_bsp:1;					\
>
> FYI, other places in MI code assume that CPU 0 (pc_cpuid) is the BSP.

Not a problem so far, but it's probably better to eliminate that
assumption. If firmware is to select the BSP and there's no
requirement for it to select CPU0, then there will be situations
where it will not select CPU0. One such situation is when CPU0
is disabled.

For example, to analyze machine checks on on pluto1, I disabled CPU0
and CPU1 in succession to see if one of the CPUs was the cause of the
MC. As such, CPU1 had to be the BSP when CPU0 was disabled. Luckily
pluto1 is only a dual-CPU machine, so that disabling a CPU also stops
SMP operation :-)

-- 
Marcel Moolenaar
xcllnt at mac.com