PERFORCE change 110050 for review

[Sam Leffler]

http://perforce.freebsd.org/chv.cgi?CH=110050

Change 110050 by sam at sam_ebb on 2006/11/15 19:26:39

	o change to using bit set/clr-style macros; this is more
	  clear to me and closer to what's used on other platforms
	  (which simplifies comparison)
	o correct initialization
	
	The bit operations now match linux but our bb'ing transfer
	method appears to be wrong.

Affected files ...

.. //depot/projects/arm/src/sys/arm/xscale/ixp425/ixp425_iic.c#3 edit

Differences ...

==== //depot/projects/arm/src/sys/arm/xscale/ixp425/ixp425_iic.c#3 (text+ko) ====

@@ -51,6 +51,12 @@
 
 #define I2C_DELAY	10
 
+/* bit clr/set shorthands */
+#define	GPIO_CONF_CLR(sc, reg, mask)	\
+	GPIO_CONF_WRITE_4(sc, reg, GPIO_CONF_READ_4(sc, reg) &~ (mask))
+#define	GPIO_CONF_SET(sc, reg, mask)	\
+	GPIO_CONF_WRITE_4(sc, reg, GPIO_CONF_READ_4(sc, reg) | (mask))
+
 struct ixpiic_softc {
 	device_t		sc_dev;
 	bus_space_tag_t		sc_iot;
@@ -71,8 +77,6 @@
 static int
 ixpiic_attach(device_t dev)
 {
-	uint32_t reg;
-
 	struct ixpiic_softc *sc = device_get_softc(dev);
 	struct ixp425_softc *sa = device_get_softc(device_get_parent(dev));
 
@@ -82,15 +86,11 @@
 	sc->sc_iot = sa->sc_iot;
 	sc->sc_gpio_ioh = sa->sc_gpio_ioh;
 
-	reg = GPIO_CONF_READ_4(sc, IXP425_GPIO_GPOUTR);
-	reg |= GPIO_I2C_SDA_BIT | GPIO_I2C_SCL_BIT;
-	GPIO_CONF_WRITE_4(sc, IXP425_GPIO_GPOUTR, reg);
+	GPIO_CONF_SET(sc, IXP425_GPIO_GPOER,
+		GPIO_I2C_SCL_BIT | GPIO_I2C_SDA_BIT);
+	GPIO_CONF_CLR(sc, IXP425_GPIO_GPOUTR,
+		GPIO_I2C_SCL_BIT | GPIO_I2C_SDA_BIT);
 
-	reg = GPIO_CONF_READ_4(sc, IXP425_GPIO_GPOER);
-	reg &= ~GPIO_I2C_SCL_BIT;
-	reg |= GPIO_I2C_SDA_BIT;
-	GPIO_CONF_WRITE_4(sc, IXP425_GPIO_GPOER, reg);
-
 	/* add generic bit-banging code */	
 	if ((sc->iicbb = device_add_child(dev, "iicbb", -1)) == NULL)
 		device_printf(dev, "could not add iicbb\n");
@@ -99,7 +99,6 @@
 	device_probe_and_attach(sc->iicbb);
 
 	return (0);
-
 }
 
 static int
@@ -114,9 +113,7 @@
 	struct ixpiic_softc *sc = ixpiic_sc;
 	uint32_t reg;
 
-	reg = GPIO_CONF_READ_4(sc, IXP425_GPIO_GPOER);
-	reg |= GPIO_I2C_SCL_BIT;
-	GPIO_CONF_WRITE_4(sc, IXP425_GPIO_GPOER, reg);
+	GPIO_CONF_SET(sc, IXP425_GPIO_GPOER, GPIO_I2C_SCL_BIT);
 
 	reg = GPIO_CONF_READ_4(sc, IXP425_GPIO_GPINR);
 	return (reg & GPIO_I2C_SCL_BIT);
@@ -128,9 +125,7 @@
 	struct ixpiic_softc *sc = ixpiic_sc;
 	uint32_t reg;
 
-	reg = GPIO_CONF_READ_4(sc, IXP425_GPIO_GPOER);
-	reg |= GPIO_I2C_SDA_BIT;
-	GPIO_CONF_WRITE_4(sc, IXP425_GPIO_GPOER, reg);
+	GPIO_CONF_SET(sc, IXP425_GPIO_GPOER, GPIO_I2C_SDA_BIT);
 
 	reg = GPIO_CONF_READ_4(sc, IXP425_GPIO_GPINR);
 	return (reg & GPIO_I2C_SDA_BIT);
@@ -140,20 +135,12 @@
 ixpiic_setsda(device_t dev, char val)
 {
 	struct ixpiic_softc *sc = ixpiic_sc;
-	uint32_t reg;
 
-	reg = GPIO_CONF_READ_4(sc, IXP425_GPIO_GPOUTR);
-        reg &= ~GPIO_I2C_SDA_BIT;
-        GPIO_CONF_WRITE_4(sc, IXP425_GPIO_GPOUTR, reg);
-
-	reg = GPIO_CONF_READ_4(sc, IXP425_GPIO_GPOER);
-
+	GPIO_CONF_CLR(sc, IXP425_GPIO_GPOUTR, GPIO_I2C_SDA_BIT);
 	if (val)
-		reg |= GPIO_I2C_SDA_BIT;
+		GPIO_CONF_SET(sc, IXP425_GPIO_GPOER, GPIO_I2C_SDA_BIT);
 	else
-		reg &= ~GPIO_I2C_SDA_BIT;
-
-	GPIO_CONF_WRITE_4(sc, IXP425_GPIO_GPOER, reg);
+		GPIO_CONF_CLR(sc, IXP425_GPIO_GPOER, GPIO_I2C_SDA_BIT);
 	DELAY(I2C_DELAY);
 }
 
@@ -161,20 +148,12 @@
 ixpiic_setscl(device_t dev, char val)
 {
 	struct ixpiic_softc *sc = ixpiic_sc;
-	uint32_t reg;
 
-	reg = GPIO_CONF_READ_4(sc, IXP425_GPIO_GPOUTR);
-        reg &= ~GPIO_I2C_SCL_BIT;
-        GPIO_CONF_WRITE_4(sc, IXP425_GPIO_GPOUTR, reg);
-
-	reg = GPIO_CONF_READ_4(sc, IXP425_GPIO_GPOER);
-
+	GPIO_CONF_CLR(sc, IXP425_GPIO_GPOUTR, GPIO_I2C_SCL_BIT);
 	if (val)
-		reg |= GPIO_I2C_SCL_BIT;
+		GPIO_CONF_SET(sc, IXP425_GPIO_GPOER, GPIO_I2C_SCL_BIT);
 	else
-		reg &= ~GPIO_I2C_SCL_BIT;
-
-	GPIO_CONF_WRITE_4(sc, IXP425_GPIO_GPOER, reg);
+		GPIO_CONF_CLR(sc, IXP425_GPIO_GPOER, GPIO_I2C_SCL_BIT);
 	DELAY(I2C_DELAY);
 }