PERFORCE change 108932 for review

[John Baldwin]

http://perforce.freebsd.org/chv.cgi?CH=108932

Change 108932 by jhb at jhb_mutex on 2006/11/01 18:43:12

	Update.

Affected files ...

.. //depot/projects/smpng/sys/notes#94 edit
.. //depot/user/jhb/intr/notes#44 edit
.. //depot/user/jhb/msi/notes#2 edit

Differences ...

==== //depot/projects/smpng/sys/notes#94 (text+ko) ====

@@ -80,10 +80,11 @@
     - untested
 
 Active child branches:
-- jhb_intr - MSI?
+- jhb_intr - misc interrupt stuff
 - jhb_intr_fast - jeff's fast ithread patches
 - jhb_ktrace - kernel debugging stuff, asm constraints
 - jhb_lock - synchronization primitives
+- jhb_msi - PCI MSI/MSI-X interrupts
 - jhb_needresched - scheduler fun
 - jhb_preemption - preemption
 - jhb_proc - proc locking

==== //depot/user/jhb/intr/notes#44 (text+ko) ====

@@ -107,32 +107,6 @@
 - atpic code is now only used for UP, so it can use spinlock sections
   explicitly rather than icu lock
 
-MSI Support:
-- i386
-  - MSI interrupt source class
-    - eoi just does lapic_eoi()
-    - enable/disable source do little
-    - need a function for allocating N vectors which creates the interrupt
-      sources, allocs apic vectors for them, and then adds them
-    - need a way to teardown as well, maybe nexus' bus_release_resource()
-      would do that via a new release_resource intsrc method?
-  - determine new-bus interface for MSI IRQs
-    - need a way to request MSIs
-      - pci bridge drivers (or bus) should have opportunity to blacklist
-	known-bad bridges
-      - need to support alloc'ing certain amounts (1, 4, 8, etc.) from the
-        driver
-      - i386 MSI class will add new interrupt sources after the I/O APIC IRQs
-      - nexus (or somebody) will then create IRQ resources at rid 1 .. N and
-        set them up for the child device
-      - alternative is to fix MSI at rid 1 and let that resource have multiple
-        IRQs.  driver has to call bus_alloc_resourc() for each supported
-        count, and bus_setup_intr() will have to grow an index.  this
-	interface requires the IRQs to be contiguously numbered though, and
-	I think that is a bad assumption to enforce
-    - child device can then do bus_alloc_resource() / bus_setup_intr()
-- amd64, just copy over from i386 for now
-
 Remaining Interrupt Event issues:
 + Port to powerpc
   - has a few XXX, doesn't handle multiple fast

==== //depot/user/jhb/msi/notes#2 (text+ko) ====

@@ -90,3 +90,27 @@
 - jhb_proc_slock - per-process spin lock
 
 Space reserved for child branches:
+- i386
+  - MSI interrupt source class
+    - eoi just does lapic_eoi()
+    - enable/disable source do little
+    - need a function for allocating N vectors which creates the interrupt
+      sources, allocs apic vectors for them, and then adds them
+    - need a way to teardown as well, maybe nexus' bus_release_resource()
+      would do that via a new release_resource intsrc method?
+  - determine new-bus interface for MSI IRQs
+    - need a way to request MSIs
+      - pci bridge drivers (or bus) should have opportunity to blacklist
+	known-bad bridges
+      - need to support alloc'ing certain amounts (1, 4, 8, etc.) from the
+        driver
+      - i386 MSI class will add new interrupt sources after the I/O APIC IRQs
+      - nexus (or somebody) will then create IRQ resources at rid 1 .. N and
+        set them up for the child device
+      - alternative is to fix MSI at rid 1 and let that resource have multiple
+        IRQs.  driver has to call bus_alloc_resourc() for each supported
+        count, and bus_setup_intr() will have to grow an index.  this
+	interface requires the IRQs to be contiguously numbered though, and
+	I think that is a bad assumption to enforce
+    - child device can then do bus_alloc_resource() / bus_setup_intr()
+- amd64, just copy over from i386 for now