PERFORCE change 93472 for review
Kip Macy
kmacy at FreeBSD.org
Fri Mar 17 22:12:48 UTC 2006
http://perforce.freebsd.org/chv.cgi?CH=93472
Change 93472 by kmacy at kmacy_storage:sun4v_work on 2006/03/17 22:12:38
convert tl1 register window fault handlers over to use physical addresses
don't step on %g7 in trap handling routines that can trigger nested traps
Affected files ...
.. //depot/projects/kmacy_sun4v/src/sys/sparc64/sparc64/genassym.c#11 edit
.. //depot/projects/kmacy_sun4v/src/sys/sun4v/include/asmacros.h#9 edit
.. //depot/projects/kmacy_sun4v/src/sys/sun4v/include/pcb.h#6 edit
.. //depot/projects/kmacy_sun4v/src/sys/sun4v/include/pcpu.h#6 edit
.. //depot/projects/kmacy_sun4v/src/sys/sun4v/sun4v/exception.S#34 edit
.. //depot/projects/kmacy_sun4v/src/sys/sun4v/sun4v/machdep.c#13 edit
.. //depot/projects/kmacy_sun4v/src/sys/sun4v/sun4v/swtch.S#12 edit
.. //depot/projects/kmacy_sun4v/src/sys/sun4v/sun4v/wbuf.S#6 edit
Differences ...
==== //depot/projects/kmacy_sun4v/src/sys/sparc64/sparc64/genassym.c#11 (text+ko) ====
@@ -201,9 +201,6 @@
ASSYM(PC_IRTAIL, offsetof(struct pcpu, pc_irtail));
ASSYM(PC_IRFREE, offsetof(struct pcpu, pc_irfree));
ASSYM(PC_MID, offsetof(struct pcpu, pc_mid));
-ASSYM(PC_TLB_CTX, offsetof(struct pcpu, pc_tlb_ctx));
-ASSYM(PC_TLB_CTX_MAX, offsetof(struct pcpu, pc_tlb_ctx_max));
-ASSYM(PC_TLB_CTX_MIN, offsetof(struct pcpu, pc_tlb_ctx_min));
ASSYM(PC_CNT, offsetof(struct pcpu, pc_cnt));
ASSYM(PC_SIZEOF, sizeof(struct pcpu));
@@ -222,8 +219,12 @@
ASSYM(PC_KWBUF_SP, offsetof(struct pcpu, pc_kwbuf_sp));
ASSYM(PC_KWBUF, offsetof(struct pcpu, pc_kwbuf));
ASSYM(PC_PMAP, offsetof(struct pcpu, pc_curpmap));
+ASSYM(PC_CURPCB_RA, offsetof(struct pcpu, pc_curpcb_ra));
#else
ASSYM(PC_PMAP, offsetof(struct pcpu, pc_pmap));
+ASSYM(PC_TLB_CTX, offsetof(struct pcpu, pc_tlb_ctx));
+ASSYM(PC_TLB_CTX_MAX, offsetof(struct pcpu, pc_tlb_ctx_max));
+ASSYM(PC_TLB_CTX_MIN, offsetof(struct pcpu, pc_tlb_ctx_min));
#endif
@@ -284,6 +285,9 @@
ASSYM(PCB_PC, offsetof(struct pcb, pcb_pc));
ASSYM(PCB_SP, offsetof(struct pcb, pcb_sp));
ASSYM(PCB_FEF, PCB_FEF);
+#ifdef SUN4V
+ASSYM(PCB_RA, offsetof(struct pcb, pcb_ra));
+#endif
ASSYM(VM_PMAP, offsetof(struct vmspace, vm_pmap));
ASSYM(PM_ACTIVE, offsetof(struct pmap, pm_active));
==== //depot/projects/kmacy_sun4v/src/sys/sun4v/include/asmacros.h#9 (text+ko) ====
@@ -131,10 +131,18 @@
#define GET_MMFSA_SCRATCH(reg) \
ldxa [%g0 + %g0]ASI_SCRATCHPAD, reg;
-#define GET_PCPU_SCRATCH \
+#define GET_PCPU_PHYS_SCRATCH(tmp) \
+ sethi %uhi(VM_MIN_DIRECT_ADDRESS), tmp; \
+ mov SCRATCH_REG_PCPU, PCPU_REG; \
+ sllx tmp, 32, tmp; \
+ ldxa [%g0 + PCPU_REG]ASI_SCRATCHPAD, PCPU_REG; \
+ andn PCPU_REG, tmp, PCPU_REG
+
+#define GET_PCPU_SCRATCH \
mov SCRATCH_REG_PCPU, PCPU_REG; \
ldxa [%g0 + PCPU_REG]ASI_SCRATCHPAD, PCPU_REG;
+
#define GET_HASH_SCRATCH_USER(reg) \
mov SCRATCH_REG_HASH_USER, reg; \
ldxa [%g0 + reg]ASI_SCRATCHPAD, reg;
@@ -170,10 +178,15 @@
ldxa [%g0 + reg]ASI_SCRATCHPAD, reg;
#define SET_SCRATCH(offsetreg, reg) stxa reg, [%g0 + offsetreg]ASI_SCRATCHPAD
+#define GET_PCB(reg) \
+ GET_PCPU_SCRATCH; \
+ ldx [PCPU_REG + PC_CURPCB], reg;
+
+#define GET_PCB_PHYS(tmp, reg) \
+ mov PC_CURPCB_RA, reg; \
+ GET_PCPU_PHYS_SCRATCH(tmp); \
+ ldxa [PCPU_REG + reg]ASI_REAL, reg;
-#define GET_PCB(reg) \
- GET_PCPU_SCRATCH; \
- ldx [PCPU_REG + PC_CURPCB], reg;
#define SET_MMU_CONTEXT(typereg, reg) stxa reg, [typereg]ASI_MMU_CONTEXTID
#define GET_MMU_CONTEXT(typereg, reg) ldxa [typereg]ASI_MMU_CONTEXTID, reg
==== //depot/projects/kmacy_sun4v/src/sys/sun4v/include/pcb.h#6 (text+ko) ====
@@ -45,7 +45,7 @@
uint64_t pcb_nsaved; /* number of windows saved in pcb_rw */
uint64_t pcb_pc;
uint64_t pcb_sp;
- uint64_t pcb_pa; /* physical address of pcb */
+ uint64_t pcb_ra; /* real address of pcb */
uint64_t pcb_pad[4];
} __aligned(64);
==== //depot/projects/kmacy_sun4v/src/sys/sun4v/include/pcpu.h#6 (text+ko) ====
@@ -75,9 +75,7 @@
u_long pc_kwbuf_sp; \
u_int pc_kwbuf_full; \
u_int pc_node; \
- u_int pc_tlb_ctx; \
- u_int pc_tlb_ctx_max; \
- u_int pc_tlb_ctx_min
+ u_long pc_curpcb_ra;
/* XXX SUN4V_FIXME - as we access the *_ra and *_size fields in quick
* succession we _really_ want them to be L1 cache line size aligned
==== //depot/projects/kmacy_sun4v/src/sys/sun4v/sun4v/exception.S#34 (text+ko) ====
@@ -1005,7 +1005,7 @@
ldx [%l7 + TF_TPC], %g1
ldx [%l7 + TF_TNPC], %g2
ldx [%l7 + TF_TSTATE], %l0
- andn %l0, TSTATE_CWP_MASK, %g7
+ andn %l0, TSTATE_CWP_MASK, %g6
wrpr %g1, %tpc
wrpr %g2, %tnpc
@@ -1059,7 +1059,7 @@
brnz %g1, 3f
nop ! no trap, use restore directly
rdpr %cwp, %g1
- wrpr %g1, %g7, %tstate ! needed by wbuf recovery code
+ wrpr %g1, %g6, %tstate ! needed by wbuf recovery code
! hand craft the restore to avoid getting to TL > 2
rdpr %wstate, %g1
btst 1, %g1
@@ -1087,7 +1087,7 @@
rdpr %canrestore, %g1
wrpr %g0, %g1, %cleanwin
rdpr %cwp, %g1
- wrpr %g1, %g7, %tstate
+ wrpr %g1, %g6, %tstate
! MAGIC_TRAP_ON
retry
END(user_rtt)
@@ -1143,14 +1143,14 @@
ldx [%l7 + TF_TPC], %g1
ldx [%l7 + TF_TNPC], %g2
ldx [%l7 + TF_TSTATE], %l0
- andn %l0, TSTATE_CWP_MASK, %g7
+ andn %l0, TSTATE_CWP_MASK, %g6
wrpr %g1, %tpc
wrpr %g2, %tnpc
rdpr %canrestore, %g1
brnz %g1, 3f
nop ! can use restore directly
rdpr %cwp, %g1
- wrpr %g1, %g7, %tstate ! needed by wbuf recovery code
+ wrpr %g1, %g6, %tstate ! needed by wbuf recovery code
! avoid going above TL2
fill_64bit_rtt(ASI_N)
@@ -1161,7 +1161,7 @@
! set %tstate to the correct %cwp
!
rdpr %cwp, %g1
- wrpr %g1, %g7, %tstate
+ wrpr %g1, %g6, %tstate
retry
END(krtt)
END(ktl0)
==== //depot/projects/kmacy_sun4v/src/sys/sun4v/sun4v/machdep.c#13 (text+ko) ====
@@ -384,9 +384,6 @@
#endif
pc->pc_addr = (vm_offset_t)pcpu0;
pc->pc_node = child;
- pc->pc_tlb_ctx = TLB_CTX_USER_MIN;
- pc->pc_tlb_ctx_min = TLB_CTX_USER_MIN;
- pc->pc_tlb_ctx_max = TLB_CTX_USER_MAX;
/*
* Initialize global registers.
@@ -399,15 +396,16 @@
*/
pmap_bootstrap(end);
+ /*
+ * Update PCPU_REG and PCB to point to direct address
+ * to support easy phys <-> virt translation in trap handler
+ */
+
thread0.td_kstack = kstack0;
- thread0.td_pcb = (struct pcb *)
- (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1;
+ thread0.td_pcb = (struct pcb *)(thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1;
+ thread0.td_pcb->pcb_ra = vtophys(thread0.td_pcb);
pc->pc_curpcb = thread0.td_pcb;
- /*
- * Update PCPU_REG to point to direct address
- * to support easy phys <-> virt translation in trap handler
- */
pc = (struct pcpu *)TLB_PHYS_TO_DIRECT(vtophys(pc));
cpu_setregs(pc);
==== //depot/projects/kmacy_sun4v/src/sys/sun4v/sun4v/swtch.S#12 (text+ko) ====
@@ -49,6 +49,22 @@
mov %i1, %i0
END(cpu_throw)
+
+
+ENTRY(pcb_ra_miss)
+ call pmap_kextract
+ mov PCB_REG, %o0
+ mov %o0, %l0
+ ! sanity check lookup
+ brnz %o0, 1f
+ nop
+ MAGIC_TRAP_ON
+ MAGIC_EXIT
+1:
+ !
+ ba,pt %xcc, pcb_ra_uptodate
+ stx %l0, [PCB_REG + PCB_RA]
+END(pcb_ra_miss)
/*
* void cpu_switch(struct thread *old, struct thread *new)
*/
@@ -128,13 +144,18 @@
*/
ldx [PCB_REG + PCB_SP], %fp
ldx [PCB_REG + PCB_PC], %i7
+ ldx [PCB_REG + PCB_RA], %l0
sub %fp, CCFSZ, %sp
+ brz %l0, pcb_ra_miss
+ nop
+pcb_ra_uptodate:
/*
* Point to the pmaps of the new process, and of the last non-kernel
* process to run.
*/
+ stx %l0, [PCPU(CURPCB_RA)]
ldx [%i0 + TD_PROC], %i2
ldx [PCPU(PMAP)], %l2
ldx [%i2 + P_VMSPACE], %i5
==== //depot/projects/kmacy_sun4v/src/sys/sun4v/sun4v/wbuf.S#6 (text+ko) ====
@@ -34,12 +34,13 @@
END(fault_64bit_sn0)
ENTRY(fault_64bit_sn1)
- /* XXX need to use physical addresses here */
- GET_PCB(%g6)
- stx %sp, [%g6 + PCB_RWSP]
- SPILL(stx, %g6 + PCB_RW, 8)
+ GET_PCB_PHYS(%g5, %g6)
+ wr %g0, ASI_REAL, %asi
+ stxa %sp, [%g6 + PCB_RWSP]%asi
+ add %g6, PCB_RW, %g5
+ SAVE_WINDOW_ASI(%g5)
mov 1, %g5
- stx %g5, [%g6 + PCB_NSAVED]
+ stxa %g5, [%g6 + PCB_NSAVED]%asi
saved
set tl0_trap, %g5
wrpr %g5, %tnpc
@@ -81,19 +82,20 @@
END(fault_64bit_so0)
ENTRY(fault_64bit_so1)
- /* XXX need to use physical addresses */
- GET_PCB(%g6)
- ld [%g6 + PCB_NSAVED], %g2
+ GET_PCB_PHYS(%g5, %g6)
+ wr %g0, ASI_REAL, %asi
+ ldxa [%g6 + PCB_NSAVED]%asi, %g2
add %g2, 1, %g3
- stx %g3, [%g6 + PCB_NSAVED]
+ stxa %g3, [%g6 + PCB_NSAVED]%asi
sll %g2, PTR_SHIFT, %g4
add %g6, PCB_RWSP, %g3
- stx %sp, [%g3 + %g4]
+ add %g3, %g4, %g4
+ stxa %sp, [%g4]%asi
sll %g2, RW_SHIFT, %g4
add %g4, %g6, %g4
add %g4, PCB_RW, %g3
- SAVE_WINDOW(%g3)
+ SAVE_WINDOW_ASI(%g3)
saved
set tl0_trap, %g5
wrpr %g5, %tnpc
@@ -121,7 +123,6 @@
!
wrpr %g0, 1, %tl
set TSTATE_KERNEL | TSTATE_IE, %g1
- GET_PCPU_SCRATCH
wrpr %g0, %g1, %tstate
set user_rtt, %g1
wrpr %g0, %g1, %tpc
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