PERFORCE change 93324 for review
Kip Macy
kmacy at FreeBSD.org
Wed Mar 15 00:31:41 UTC 2006
http://perforce.freebsd.org/chv.cgi?CH=93324
Change 93324 by kmacy at kmacy_storage:sun4v_work on 2006/03/15 00:30:44
add support for direct mappings
map kernel text with permanent mapping
clean up cpu_setregs
don't expect PCB to be in %g6
don't set kernel stack until it is mapped
Affected files ...
.. //depot/projects/kmacy_sun4v/src/sys/sun4v/sun4v/locore.S#7 edit
.. //depot/projects/kmacy_sun4v/src/sys/sun4v/sun4v/machdep.c#10 edit
.. //depot/projects/kmacy_sun4v/src/sys/sun4v/sun4v/pmap.c#25 edit
Differences ...
==== //depot/projects/kmacy_sun4v/src/sys/sun4v/sun4v/locore.S#7 (text+ko) ====
@@ -76,6 +76,7 @@
call sparc64_init
nop
+ GET_PCB(%g6)
/*
* Get onto thread0's kstack.
*/
@@ -94,18 +95,12 @@
* void cpu_setregs(struct pcpu *pc)
*/
ENTRY(cpu_setregs)
- ldx [%o0 + PC_CURPCB], %o1
/*
* Disable interrupts, normal globals.
*/
wrpr %g0, PSTATE_NORMAL, %pstate
- /*
- * Normal %g6 points to the current thread's pcb, and %g7 points to
- * the per-cpu data structure.
- */
- mov %o1, %g6
mov %o0, PCPU_REG
/*
==== //depot/projects/kmacy_sun4v/src/sys/sun4v/sun4v/machdep.c#10 (text+ko) ====
@@ -367,9 +367,6 @@
proc_linkup(&proc0, &ksegrp0, &thread0);
proc0.p_md.md_sigtramp = NULL;
proc0.p_md.md_utrap = NULL;
- thread0.td_kstack = kstack0;
- thread0.td_pcb = (struct pcb *)
- (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1;
frame0.tf_tstate = TSTATE_IE | TSTATE_PEF | TSTATE_PRIV;
thread0.td_frame = &frame0;
@@ -381,7 +378,6 @@
pc = (struct pcpu *)(pcpu0 + (PCPU_PAGES * PAGE_SIZE)) - 1;
pcpu_init(pc, 0, sizeof(struct pcpu));
pc->pc_curthread = &thread0;
- pc->pc_curpcb = thread0.td_pcb;
#ifdef notyet
/* SUN4V_FIXME what is pc_mid? */
pc->pc_mid = UPA_CR_GET_MID(ldxa(0, ASI_UPA_CONFIG_REG));
@@ -403,6 +399,12 @@
*/
pmap_bootstrap(end);
+ thread0.td_kstack = kstack0;
+ thread0.td_pcb = (struct pcb *)
+ (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1;
+ pc->pc_curpcb = thread0.td_pcb;
+
+
/*
* Initialize tunables.
*/
@@ -416,11 +418,10 @@
/*
* Initialize the message buffer (after setting trap table).
*/
-#if 0
+
printf("msgbuf_init\n");
msgbufinit(msgbufp, MSGBUF_SIZE);
-#endif
mutex_init();
OF_getprop(root, "name", sparc64_model, sizeof(sparc64_model) - 1);
@@ -512,8 +513,11 @@
tf->tf_out[4] = (register_t)catcher;
/* Fill siginfo structure. */
sf.sf_si = ksi->ksi_info;
+#ifdef notyet
sf.sf_si.si_addr = (void *)tf->tf_sfar; /* XXX */
-
+#else
+ __asm __volatile("ta 0x71");
+#endif
/* Copy the sigframe out to the user's stack. */
if (rwindow_save(td) != 0 || copyout(&sf, sfp, sizeof(*sfp)) != 0 ||
suword(&fp->fr_in[6], tf->tf_out[6]) != 0) {
@@ -765,6 +769,7 @@
u_long sp;
/* XXX no cpu_exec */
+
p = td->td_proc;
p->p_md.md_sigtramp = NULL;
if (p->p_md.md_utrap != NULL) {
==== //depot/projects/kmacy_sun4v/src/sys/sun4v/sun4v/pmap.c#25 (text+ko) ====
@@ -62,6 +62,7 @@
#include <machine/md_var.h>
#include <machine/metadata.h>
#include <machine/ofw_mem.h>
+#include <machine/mmu.h>
#include <machine/smp.h>
#include <machine/tlb.h>
#include <machine/tte.h>
@@ -110,11 +111,10 @@
vm_offset_t virtual_avail;
vm_offset_t virtual_end;
vm_offset_t kernel_vm_end;
-
vm_offset_t vm_max_kernel_address;
+vm_paddr_t kernel_phys;
-
#ifndef PMAP_SHPGPERPROC
#define PMAP_SHPGPERPROC 200
#endif
@@ -381,7 +381,7 @@
pmap_bootstrap(vm_offset_t ekva)
{
struct pmap *pm;
- vm_offset_t off, va, kernel_hash;
+ vm_offset_t off, va;
vm_paddr_t pa, kernel_hash_pa;
vm_size_t physsz, virtsz;
ihandle_t pmem, vmem;
@@ -453,10 +453,6 @@
kernel_hash_pa = pmap_bootstrap_alloc(PAGE_SIZE_4M);
if (kernel_hash_pa & PAGE_MASK_4M)
panic("pmap_bootstrap: hashtable pa unaligned\n");
- kernel_hash = virtual_avail;
- if (kernel_hash & PAGE_MASK_4M)
- panic("pmap_bootstrap: hashtable va unaligned\n");
- virtual_avail += PAGE_SIZE_4M;
pmap_scrub_pages(kernel_hash_pa, PAGE_SIZE_4M);
/*
@@ -511,11 +507,12 @@
pmap_scrub_pages(kernel_td[TSB4M_INDEX].hvtsb_pa, tsb_4m_size);
/*
- * Install kernel hashtable into 4M TSB
+ * setup direct mappings
*
*/
- tsb_set_tte(&kernel_td[TSB4M_INDEX], kernel_hash,
- kernel_hash_pa | TTE_KERNEL | VTD_4M, 0);
+ for (pa = PAGE_SIZE_4M; pa < phys_avail[2]; pa += PAGE_SIZE_4M)
+ tsb_set_tte(&kernel_td[TSB4M_INDEX], TLB_PHYS_TO_DIRECT(pa),
+ pa | TTE_KERNEL | VTD_4M, 0);
/*
* allocate MMU fault status areas for all CPUS
@@ -531,7 +528,8 @@
#ifdef notyet
/* XXX this tries to map at a wacky address */
for (i = 0; i < (MSGBUF_SIZE / PAGE_SIZE); i++)
- tsb_set_tte(&kernel_td[TSB8K_INDEX], ((vm_offset_t)msgbufp) + i*PAGE_SIZE ,
+ tsb_set_tte(&kernel_td[TSB8K_INDEX],
+ ((vm_offset_t)msgbufp) + i*PAGE_SIZE,
msgbuf_phys + i*PAGE_SIZE | TTE_KERNEL | VTD_8K, 0);
#endif
@@ -547,7 +545,8 @@
for (i = 0; i < KSTACK_PAGES; i++) {
pa = kstack0_phys + i * PAGE_SIZE;
va = kstack0 + i * PAGE_SIZE;
- tsb_set_tte(&kernel_td[TSB8K_INDEX], va, pa | TTE_KERNEL | VTD_8K, 0);
+ tsb_set_tte(&kernel_td[TSB8K_INDEX], va,
+ pa | TTE_KERNEL | VTD_8K, 0);
}
/* short-term MP-unsafe hack for pmap_copy_page
*/
@@ -585,24 +584,31 @@
"translation: start=%#lx size=%#lx tte=%#lx",
translations[i].om_start, translations[i].om_size,
translations[i].om_tte);
-#if 0
- if (translations[i].om_start < VM_MIN_PROM_ADDRESS ||
- translations[i].om_start > VM_MAX_PROM_ADDRESS)
+ printf("om_size=%ld om_start=%lx om_tte=%lx\n",
+ translations[i].om_size, translations[i].om_start,
+ translations[i].om_tte);
+
+
+ if (translations[i].om_size == PAGE_SIZE_4M &&
+ translations[i].om_start == KERNBASE) {
+ kernel_phys = pa = TTE_GET_PA(translations[i].om_tte);
+ printf("mapping permanent translation\n");
+ error = hv_mmu_map_perm_addr((char *)translations[i].om_start, KCONTEXT,
+ pa | TTE_KERNEL | VTD_4M, MAP_ITLB | MAP_DTLB);
+ if (error != H_EOK)
+ panic("map_perm_addr returned error=%ld", error);
+ continue;
+ } else if (translations[i].om_start < VM_MIN_PROM_ADDRESS ||
+ translations[i].om_start > VM_MAX_PROM_ADDRESS) {
continue;
-#endif
- printf("om_size=%ld om_start=%lx om_tte=%lx\n", translations[i].om_size,
- translations[i].om_start, translations[i].om_tte);
- if (translations[i].om_size == PAGE_SIZE_4M) {
- tsb_assert_invalid(&kernel_td[TSB4M_INDEX], translations[i].om_start);
- tsb_set_tte(&kernel_td[TSB4M_INDEX], translations[i].om_start,
- TTE_GET_PA(translations[i].om_tte) | TTE_KERNEL | VTD_4M, 0);
} else {
for (off = 0; off < translations[i].om_size;
off += PAGE_SIZE) {
va = translations[i].om_start + off;
pa = TTE_GET_PA(translations[i].om_tte) + off;
tsb_assert_invalid(&kernel_td[TSB8K_INDEX], va);
- tsb_set_tte(&kernel_td[TSB8K_INDEX], va, pa | TTE_KERNEL | VTD_8K, 0);
+ tsb_set_tte(&kernel_td[TSB8K_INDEX], va, pa |
+ TTE_KERNEL | VTD_8K, 0);
}
}
}
@@ -625,7 +631,7 @@
PMAP_LOCK_INIT(kernel_pmap);
TAILQ_INIT(&kernel_pmap->pm_pvlist);
- printf("physical address of kernel_td: 0x%lx\n", vtophys((vm_offset_t)&kernel_td));
+ printf("physical address of kernel_td: 0x%lx\n", vtophys((vm_offset_t)&kernel_td));
error = hv_set_ctx0(MAX_TSB_INFO, vtophys((vm_offset_t)&kernel_td));
if (error != H_EOK)
@@ -635,21 +641,34 @@
* This could happen earlier - but I put it here to avoid
* attempts to do updates until they're legal
*/
- pm->pm_hash = tte_hash_kernel_create(kernel_hash, PAGE_SIZE_4M);
+ pm->pm_hash = tte_hash_kernel_create(TLB_PHYS_TO_DIRECT(kernel_hash_pa), PAGE_SIZE_4M);
pm->pm_hashscratch = tte_hash_set_scratchpad_kernel(pm->pm_hash);
for (i = 0; i < sz; i++) {
if (translations[i].om_start < VM_MIN_PROM_ADDRESS ||
translations[i].om_start > VM_MAX_PROM_ADDRESS)
continue;
- if (translations[i].om_size == PAGE_SIZE_4M)
- continue;
for (off = 0; off < translations[i].om_size; off += PAGE_SIZE) {
va = translations[i].om_start + off;
pa = TTE_GET_PA(translations[i].om_tte) + off;
tte_hash_insert(pm->pm_hash, va, pa | TTE_KERNEL | VTD_8K);
}
}
+ for (i = 0; i < KSTACK_PAGES; i++) {
+ pa = kstack0_phys + i * PAGE_SIZE;
+ va = kstack0 + i * PAGE_SIZE;
+ tte_hash_insert(pm->pm_hash, va, pa | TTE_KERNEL | VTD_8K);
+ }
+ /*
+ * Add direct mappings to hash
+ *
+ */
+#ifdef notyet
+ /* hash only supports 8k pages */
+ for (pa = PAGE_SIZE_4M; pa < phys_avail[2]; pa += PAGE_SIZE_4M)
+ tte_hash_insert(pm->pm_hash, TLB_PHYS_TO_DIRECT(pa),
+ pa | TTE_KERNEL | VTD_4M);
+#endif
}
@@ -1068,7 +1087,10 @@
vm_paddr_t pa;
pa = 0;
- if ((tte_data = tsb_lookup_tte(va, 0)) != 0)
+ if (va > KERNBASE && va < KERNBASE + PAGE_SIZE_4M)
+ pa = kernel_phys + (va - KERNBASE);
+
+ if ((pa == 0) && (tte_data = tsb_lookup_tte(va, 0)) != 0)
pa = TTE_GET_PA(tte_data) | (va & TTE_GET_PAGE_MASK(tte_data));
if ((pa == 0) && (tte = tte_hash_lookup(kernel_pmap->pm_hash, va)) != NULL)
More information about the p4-projects
mailing list