PERFORCE change 100217 for review

Warner Losh imp at FreeBSD.org
Wed Jun 28 17:19:40 UTC 2006


http://perforce.freebsd.org/chv.cgi?CH=100217

Change 100217 by imp at imp_lighthouse on 2006/06/28 17:18:56

	Camelot is a silly place.  Let's not go there.
	
	After looking at the code, I've convinced myself that these macros
	obfuscate things too much.  punt!

Affected files ...

.. //depot/projects/arm/src/sys/arm/at91/uart_dev_at91usart.c#30 edit

Differences ...

==== //depot/projects/arm/src/sys/arm/at91/uart_dev_at91usart.c#30 (text+ko) ====

@@ -45,11 +45,6 @@
 
 #include "uart_if.h"
 
-/* Macros to clear/set/test flags. */
-#define	SET(t, f)	(t) |= (f)
-#define	CLR(t, f)	(t) &= ~(f)
-#define	ISSET(t, f)	((t) & (f))
-
 #define DEFAULT_RCLK		AT91C_MASTER_CLOCK
 #define	USART_BUFFER_SIZE	128
 
@@ -246,7 +241,7 @@
 at91_usart_putc(struct uart_bas *bas, int c)
 {
 
-	while (!(ISSET(RD4(bas, USART_CSR), USART_CSR_TXRDY)))
+    while (!(RD4(bas, USART_CSR) & USART_CSR_TXRDY))
 		continue;
 	WR4(bas, USART_THR, c);
 }
@@ -258,7 +253,7 @@
 at91_usart_poll(struct uart_bas *bas)
 {
 
-	if (!ISSET(RD4(bas, USART_CSR), USART_CSR_RXRDY))
+	if (!(RD4(bas, USART_CSR) & USART_CSR_RXRDY))
 		return (-1);
 	return (RD4(bas, USART_RHR) & 0xff);
 }
@@ -271,7 +266,7 @@
 {
 	int c;
 
-	while (!ISSET(RD4(bas, USART_CSR), USART_CSR_RXRDY))
+	while (!(RD4(bas, USART_CSR) & USART_CSR_RXRDY))
 		continue;
 	c = RD4(bas, USART_RHR);
 	c &= 0xff;
@@ -335,8 +330,8 @@
 	 */
 	WR4(&sc->sc_bas, USART_IDR, 0xffffffff);
 	WR4(&sc->sc_bas, USART_IER, USART_CSR_TIMEOUT);
-	if (ISSET(RD4(&sc->sc_bas, USART_IMR), USART_CSR_TIMEOUT))
-		SET(atsc->flags, HAS_TIMEOUT);
+	if (RD4(&sc->sc_bas, USART_IMR) & USART_CSR_TIMEOUT)
+		atsc->flags |= HAS_TIMEOUT;
 	WR4(&sc->sc_bas, USART_IDR, 0xffffffff);
 
 	sc->sc_txfifosz = USART_BUFFER_SIZE;
@@ -354,7 +349,7 @@
 	err = bus_dmamap_create(atsc->dmatag, 0, &atsc->tx_map);
 	if (err != 0)
 	    goto errout;
-	if (ISSET(atsc->flags, HAS_TIMEOUT)) {
+	if (atsc->flags & HAS_TIMEOUT) {
 		for (i = 0; i < 2; i++) {
 			err = bus_dmamap_create(atsc->dmatag, 0,
 			    &atsc->ping_pong[i].map);
@@ -389,7 +384,7 @@
 	 * we get an interrupt 1/2 way through the software 'fifo' we have
 	 * to avoid overruns.
 	 */
-	if (ISSET(atsc->flags, HAS_TIMEOUT)) {
+	if (atsc->flags & HAS_TIMEOUT) {
 		WR4(&sc->sc_bas, PDC_RPR, atsc->ping->pa);
 		WR4(&sc->sc_bas, PDC_RCR, sc->sc_rxfifosz);
 		WR4(&sc->sc_bas, PDC_RNPR, atsc->pong->pa);
@@ -458,22 +453,22 @@
 	do {
 		old = sc->sc_hwsig;
 		new = old;
-		if (ISSET(sig, SER_DDTR))
+		if (sig & SER_DDTR)
 			SIGCHG(sig & SER_DTR, new, SER_DTR, SER_DDTR);
-		if (ISSET(sig, SER_DRTS))
+		if (sig & SER_DRTS)
 			SIGCHG(sig & SER_RTS, new, SER_RTS, SER_DRTS);
 	} while (!atomic_cmpset_32(&sc->sc_hwsig, old, new));
 	bas = &sc->sc_bas;
 	uart_lock(sc->sc_hwmtx);
 	cr = 0;
-	if (ISSET(new, SER_DTR))
-		SET(cr, USART_CR_DTREN);
+	if (new & SER_DTR)
+		cr |= USART_CR_DTREN;
 	else
-		SET(cr, USART_CR_DTRDIS);
-	if (ISSET(new, SER_RTS))
-		SET(cr, USART_CR_RTSEN);
+		cr |= USART_CR_DTRDIS;
+	if (new & SER_RTS)
+		cr |= USART_CR_RTSEN;
 	else
-		SET(cr, USART_CR_RTSDIS);
+		cr |= USART_CR_RTSDIS;
 	WR4(bas, USART_CR, cr);
 	uart_unlock(sc->sc_hwmtx);
 	return (0);
@@ -501,17 +496,17 @@
 	struct at91_usart_rx *p;
 
 	atsc = (struct at91_usart_softc *)sc;	   
-	if (ISSET(csr, USART_CSR_ENDTX)) {
+	if (csr & USART_CSR_ENDTX) {
 		bus_dmamap_sync(atsc->dmatag, atsc->tx_map,
 		    BUS_DMASYNC_POSTWRITE);
 		bus_dmamap_unload(atsc->dmatag, atsc->tx_map);
 	}
 	uart_lock(sc->sc_hwmtx);
-	if (ISSET(csr, USART_CSR_TXRDY) && sc->sc_txbusy) {
+	if ((csr & USART_CSR_TXRDY) && sc->sc_txbusy) {
 		ipend |= SER_INT_TXIDLE;
 		WR4(&sc->sc_bas, USART_IDR, USART_CSR_TXRDY);
 	}
-	if (ISSET(csr, USART_CSR_ENDTX) && sc->sc_txbusy)
+	if ((csr & USART_CSR_ENDTX) && sc->sc_txbusy)
 		ipend |= SER_INT_TXIDLE;
 	/*
 	 * Due to the contraints of the DMA engine present in the
@@ -519,7 +514,7 @@
 	 * and do all the work elsewhere.  I need to look at the CSR
 	 * bits right now and do things based on them to avoid races.
 	 */
-	if (ISSET(atsc->flags, HAS_TIMEOUT) && ISSET(csr, USART_CSR_RXBUFF)) {
+	if ((atsc->flags & HAS_TIMEOUT) && (csr & USART_CSR_RXBUFF)) {
 		// Have a buffer overflow.  Copy all data from both
 		// ping and pong.  Insert overflow character.  Reset
 		// ping and pong and re-enable the PDC to receive
@@ -533,7 +528,7 @@
 		for (i = 0; i < sc->sc_rxfifosz; i++)
 			uart_rx_put(sc, atsc->pong->buffer[i]);
 		uart_rx_put(sc, UART_STAT_OVERRUN);
-		CLR(csr, USART_CSR_ENDRX | USART_CSR_TIMEOUT);
+		csr &= ~(USART_CSR_ENDRX | USART_CSR_TIMEOUT);
 		WR4(&sc->sc_bas, PDC_RPR, atsc->ping->pa);
 		WR4(&sc->sc_bas, PDC_RCR, sc->sc_rxfifosz);
 		WR4(&sc->sc_bas, PDC_RNPR, atsc->pong->pa);
@@ -541,7 +536,7 @@
 		WR4(&sc->sc_bas, PDC_PTCR, PDC_PTCR_RXTEN);
 		ipend |= SER_INT_RXREADY;
 	}
-	if (ISSET(atsc->flags, HAS_TIMEOUT) && ISSET(csr, USART_CSR_ENDRX)) {
+	if ((atsc->flags & HAS_TIMEOUT) && (csr & USART_CSR_ENDRX)) {
 		// Shuffle data from 'ping' of ping pong buffer, but
 		// leave current 'pong' in place, as it has become the
 		// new 'ping'.  We need to copy data and setup the old
@@ -557,7 +552,7 @@
 		WR4(&sc->sc_bas, PDC_RNCR, sc->sc_rxfifosz);
 		ipend |= SER_INT_RXREADY;
 	}
-	if (ISSET(atsc->flags, HAS_TIMEOUT) && ISSET(csr, USART_CSR_TIMEOUT)) {
+	if ((atsc->flags & HAS_TIMEOUT) && (csr & USART_CSR_TIMEOUT)) {
 		// We have one partial buffer.  We need to stop the
 		// PDC, get the number of characters left and from
 		// that compute number of valid characters.  We then
@@ -573,14 +568,14 @@
 		WR4(&sc->sc_bas, PDC_PTCR, PDC_PTCR_RXTEN);
 		ipend |= SER_INT_RXREADY;
 	}
-	if (!ISSET(atsc->flags, HAS_TIMEOUT) && ISSET(csr, USART_CSR_RXRDY)) {
+	if (!(atsc->flags & HAS_TIMEOUT) && (csr & USART_CSR_RXRDY)) {
 		// We have another charater in a device that doesn't support
 		// timeouts, so we do it one character at a time.
 		uart_rx_put(sc, RD4(&sc->sc_bas, USART_RHR) & 0xff);
 		ipend |= SER_INT_RXREADY;
 	}
 
-	if (ISSET(csr, USART_CSR_RXBRK)) {
+	if (csr & USART_CSR_RXBRK) {
 		unsigned int cr = USART_CR_RSTSTA;
 
 		ipend |= SER_INT_BREAK;
@@ -604,14 +599,14 @@
 	uart_lock(sc->sc_hwmtx);
 	csr = RD4(&sc->sc_bas, USART_CSR);
 	sig = 0;
-	if (ISSET(csr, USART_CSR_CTS))
-		SET(sig, SER_CTS);
-	if (ISSET(csr, USART_CSR_DCD))
-		SET(sig, SER_DCD);
-	if (ISSET(csr, USART_CSR_DSR))
-		SET(sig, SER_DSR);
-	if (ISSET(csr, USART_CSR_RI))
-		SET(sig, SER_RI);
+	if (csr & USART_CSR_CTS)
+		sig |= SER_CTS;
+	if (csr & USART_CSR_DCD)
+		sig |= SER_DCD;
+	if (csr & USART_CSR_DSR)
+		sig |= SER_DSR;
+	if (csr & USART_CSR_RI)
+		sig |= SER_RI;
 	new = sig & ~SER_MASK_DELTA;
 	sc->sc_hwsig = new;
 	uart_unlock(sc->sc_hwmtx);


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