PERFORCE change 111572 for review
John Baldwin
jhb at FreeBSD.org
Tue Dec 12 12:12:13 PST 2006
http://perforce.freebsd.org/chv.cgi?CH=111572
Change 111572 by jhb at jhb_mutex on 2006/12/12 19:41:57
IFC @111571.
Affected files ...
.. //depot/projects/smpng/sys/amd64/amd64/intr_machdep.c#22 integrate
.. //depot/projects/smpng/sys/amd64/amd64/mptable_pci.c#6 integrate
.. //depot/projects/smpng/sys/amd64/include/intr_machdep.h#11 integrate
.. //depot/projects/smpng/sys/amd64/pci/pci_bus.c#18 integrate
.. //depot/projects/smpng/sys/dev/acpica/acpi_pcib_acpi.c#23 integrate
.. //depot/projects/smpng/sys/dev/awi/awivar.h#8 integrate
.. //depot/projects/smpng/sys/dev/bge/if_bge.c#82 integrate
.. //depot/projects/smpng/sys/dev/bge/if_bgereg.h#47 integrate
.. //depot/projects/smpng/sys/dev/pci/pci.c#79 integrate
.. //depot/projects/smpng/sys/dev/pci/pcireg.h#17 integrate
.. //depot/projects/smpng/sys/dev/twa/tw_osl_freebsd.c#5 integrate
.. //depot/projects/smpng/sys/i386/i386/intr_machdep.c#22 integrate
.. //depot/projects/smpng/sys/i386/i386/mptable_pci.c#6 integrate
.. //depot/projects/smpng/sys/i386/include/intr_machdep.h#13 integrate
.. //depot/projects/smpng/sys/i386/pci/pci_bus.c#31 integrate
.. //depot/projects/smpng/sys/i386/pci/pci_cfgreg.c#33 integrate
.. //depot/projects/smpng/sys/kern/kern_intr.c#81 integrate
.. //depot/projects/smpng/sys/kern/kern_kse.c#34 integrate
.. //depot/projects/smpng/sys/net/bridgestp.c#17 integrate
.. //depot/projects/smpng/sys/net/bridgestp.h#7 integrate
.. //depot/projects/smpng/sys/net/if_bridge.c#42 integrate
.. //depot/projects/smpng/sys/net/if_bridgevar.h#16 integrate
.. //depot/projects/smpng/sys/net/if_spppsubr.c#32 integrate
.. //depot/projects/smpng/sys/netgraph/ng_nat.c#5 integrate
.. //depot/projects/smpng/sys/netinet/ip_fw2.c#81 integrate
.. //depot/projects/smpng/sys/netinet/sctputil.c#3 integrate
.. //depot/projects/smpng/sys/netinet/tcp_hostcache.c#9 integrate
.. //depot/projects/smpng/sys/netinet/tcp_input.c#92 integrate
.. //depot/projects/smpng/sys/netinet6/frag6.c#13 integrate
.. //depot/projects/smpng/sys/netinet6/icmp6.c#36 integrate
.. //depot/projects/smpng/sys/netinet6/in6.c#37 integrate
.. //depot/projects/smpng/sys/netinet6/in6_gif.c#15 integrate
.. //depot/projects/smpng/sys/netinet6/in6_src.c#28 integrate
.. //depot/projects/smpng/sys/netinet6/in6_var.h#17 integrate
.. //depot/projects/smpng/sys/netinet6/ip6_forward.c#20 integrate
.. //depot/projects/smpng/sys/netinet6/ip6_input.c#46 integrate
.. //depot/projects/smpng/sys/netinet6/ip6_mroute.c#27 integrate
.. //depot/projects/smpng/sys/netinet6/ipsec.c#27 integrate
.. //depot/projects/smpng/sys/netinet6/mld6.c#19 integrate
.. //depot/projects/smpng/sys/netinet6/nd6.c#38 integrate
.. //depot/projects/smpng/sys/netinet6/nd6_nbr.c#23 integrate
.. //depot/projects/smpng/sys/netinet6/nd6_rtr.c#18 integrate
.. //depot/projects/smpng/sys/netinet6/scope6.c#8 integrate
.. //depot/projects/smpng/sys/netinet6/udp6_usrreq.c#42 integrate
.. //depot/projects/smpng/sys/netipsec/ipsec.c#17 integrate
.. //depot/projects/smpng/sys/netipsec/ipsec_input.c#12 integrate
.. //depot/projects/smpng/sys/nfsserver/nfs_syscalls.c#31 integrate
.. //depot/projects/smpng/sys/sun4v/mdesc/mdesc_init.c#3 integrate
.. //depot/projects/smpng/sys/sun4v/sun4v/pmap.c#7 integrate
.. //depot/projects/smpng/sys/sys/interrupt.h#19 integrate
Differences ...
==== //depot/projects/smpng/sys/amd64/amd64/intr_machdep.c#22 (text+ko) ====
@@ -26,7 +26,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $FreeBSD: src/sys/amd64/amd64/intr_machdep.c,v 1.26 2006/11/17 16:41:03 jhb Exp $
+ * $FreeBSD: src/sys/amd64/amd64/intr_machdep.c,v 1.27 2006/12/12 19:20:18 jhb Exp $
*/
/*
@@ -190,13 +190,13 @@
int
intr_remove_handler(void *cookie)
{
+ struct intsrc *isrc;
int error;
+ isrc = intr_handler_source(cookie);
error = intr_event_remove_handler(cookie);
-#ifdef XXX
if (error == 0)
- intrcnt_updatename(/* XXX */);
-#endif
+ intrcnt_updatename(isrc);
return (error);
}
==== //depot/projects/smpng/sys/amd64/amd64/mptable_pci.c#6 (text+ko) ====
@@ -33,7 +33,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/amd64/amd64/mptable_pci.c,v 1.5 2006/11/13 22:23:32 jhb Exp $");
+__FBSDID("$FreeBSD: src/sys/amd64/amd64/mptable_pci.c,v 1.6 2006/12/12 19:27:00 jhb Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -72,6 +72,27 @@
return (bus_generic_attach(dev));
}
+/* Pass MSI alloc requests up to the nexus. */
+static int
+mptable_hostb_alloc_msi(device_t pcib, device_t dev, int count, int maxcount,
+ int *irqs)
+{
+ device_t bus;
+
+ bus = device_get_parent(pcib);
+ return (PCIB_ALLOC_MSI(device_get_parent(bus), dev, count, maxcount,
+ irqs));
+}
+
+static int
+mptable_hostb_alloc_msix(device_t pcib, device_t dev, int index, int *irq)
+{
+ device_t bus;
+
+ bus = device_get_parent(pcib);
+ return (PCIB_ALLOC_MSIX(device_get_parent(bus), dev, index, irq));
+}
+
static device_method_t mptable_hostb_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, mptable_hostb_probe),
@@ -96,9 +117,9 @@
DEVMETHOD(pcib_read_config, legacy_pcib_read_config),
DEVMETHOD(pcib_write_config, legacy_pcib_write_config),
DEVMETHOD(pcib_route_interrupt, mptable_pci_route_interrupt),
- DEVMETHOD(pcib_alloc_msi, pcib_alloc_msi),
+ DEVMETHOD(pcib_alloc_msi, mptable_hostb_alloc_msi),
DEVMETHOD(pcib_release_msi, pcib_release_msi),
- DEVMETHOD(pcib_alloc_msix, pcib_alloc_msix),
+ DEVMETHOD(pcib_alloc_msix, mptable_hostb_alloc_msix),
DEVMETHOD(pcib_release_msix, pcib_release_msix),
{ 0, 0 }
@@ -165,4 +186,3 @@
DEFINE_CLASS_0(pcib, mptable_pcib_driver, mptable_pcib_pci_methods,
sizeof(struct pcib_softc));
DRIVER_MODULE(mptable_pcib, pci, mptable_pcib_driver, pcib_devclass, 0, 0);
-
==== //depot/projects/smpng/sys/amd64/include/intr_machdep.h#11 (text+ko) ====
@@ -23,7 +23,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $FreeBSD: src/sys/amd64/include/intr_machdep.h,v 1.12 2006/11/13 22:23:33 jhb Exp $
+ * $FreeBSD: src/sys/amd64/include/intr_machdep.h,v 1.13 2006/12/12 19:24:45 jhb Exp $
*/
#ifndef __MACHINE_INTR_MACHDEP_H__
@@ -147,9 +147,9 @@
void intr_resume(void);
void intr_suspend(void);
void intrcnt_add(const char *name, u_long **countp);
-void msi_init(void);
int msi_alloc(device_t dev, int count, int maxcount, int *irqs, int *newirq,
int *newcount);
+void msi_init(void);
int msi_release(int *irqs, int count);
int msix_alloc(device_t dev, int index, int *irq, int *new);
int msix_release(int irq);
==== //depot/projects/smpng/sys/amd64/pci/pci_bus.c#18 (text+ko) ====
@@ -25,7 +25,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/amd64/pci/pci_bus.c,v 1.118 2006/11/13 22:23:33 jhb Exp $");
+__FBSDID("$FreeBSD: src/sys/amd64/pci/pci_bus.c,v 1.119 2006/12/12 19:27:00 jhb Exp $");
#include "opt_cpu.h"
@@ -81,6 +81,28 @@
return (PCI_INVALID_IRQ);
}
+/* Pass MSI alloc requests up to the nexus. */
+
+static int
+legacy_pcib_alloc_msi(device_t pcib, device_t dev, int count, int maxcount,
+ int *irqs)
+{
+ device_t bus;
+
+ bus = device_get_parent(pcib);
+ return (PCIB_ALLOC_MSI(device_get_parent(bus), dev, count, maxcount,
+ irqs));
+}
+
+static int
+legacy_pcib_alloc_msix(device_t pcib, device_t dev, int index, int *irq)
+{
+ device_t bus;
+
+ bus = device_get_parent(pcib);
+ return (PCIB_ALLOC_MSIX(device_get_parent(bus), dev, index, irq));
+}
+
static const char *
legacy_pcib_is_host_bridge(int bus, int slot, int func,
uint32_t id, uint8_t class, uint8_t subclass,
@@ -322,9 +344,9 @@
DEVMETHOD(pcib_read_config, legacy_pcib_read_config),
DEVMETHOD(pcib_write_config, legacy_pcib_write_config),
DEVMETHOD(pcib_route_interrupt, legacy_pcib_route_interrupt),
- DEVMETHOD(pcib_alloc_msi, pcib_alloc_msi),
+ DEVMETHOD(pcib_alloc_msi, legacy_pcib_alloc_msi),
DEVMETHOD(pcib_release_msi, pcib_release_msi),
- DEVMETHOD(pcib_alloc_msix, pcib_alloc_msix),
+ DEVMETHOD(pcib_alloc_msix, legacy_pcib_alloc_msix),
DEVMETHOD(pcib_release_msix, pcib_release_msix),
{ 0, 0 }
==== //depot/projects/smpng/sys/dev/acpica/acpi_pcib_acpi.c#23 (text+ko) ====
@@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/dev/acpica/acpi_pcib_acpi.c,v 1.51 2006/11/13 21:47:30 jhb Exp $");
+__FBSDID("$FreeBSD: src/sys/dev/acpica/acpi_pcib_acpi.c,v 1.52 2006/12/12 19:27:00 jhb Exp $");
#include "opt_acpi.h"
#include <sys/param.h>
@@ -74,6 +74,10 @@
int func, int reg, uint32_t data, int bytes);
static int acpi_pcib_acpi_route_interrupt(device_t pcib,
device_t dev, int pin);
+static int acpi_pcib_alloc_msi(device_t pcib, device_t dev,
+ int count, int maxcount, int *irqs);
+static int acpi_pcib_alloc_msix(device_t pcib, device_t dev,
+ int index, int *irq);
static struct resource *acpi_pcib_acpi_alloc_resource(device_t dev,
device_t child, int type, int *rid,
u_long start, u_long end, u_long count,
@@ -103,9 +107,9 @@
DEVMETHOD(pcib_read_config, acpi_pcib_read_config),
DEVMETHOD(pcib_write_config, acpi_pcib_write_config),
DEVMETHOD(pcib_route_interrupt, acpi_pcib_acpi_route_interrupt),
- DEVMETHOD(pcib_alloc_msi, pcib_alloc_msi),
+ DEVMETHOD(pcib_alloc_msi, acpi_pcib_alloc_msi),
DEVMETHOD(pcib_release_msi, pcib_release_msi),
- DEVMETHOD(pcib_alloc_msix, pcib_alloc_msix),
+ DEVMETHOD(pcib_alloc_msix, acpi_pcib_alloc_msix),
DEVMETHOD(pcib_release_msix, pcib_release_msix),
{0, 0}
@@ -306,6 +310,26 @@
return (acpi_pcib_route_interrupt(pcib, dev, pin, &sc->ap_prt));
}
+static int
+acpi_pcib_alloc_msi(device_t pcib, device_t dev, int count, int maxcount,
+ int *irqs)
+{
+ device_t bus;
+
+ bus = device_get_parent(pcib);
+ return (PCIB_ALLOC_MSI(device_get_parent(bus), dev, count, maxcount,
+ irqs));
+}
+
+static int
+acpi_pcib_alloc_msix(device_t pcib, device_t dev, int index, int *irq)
+{
+ device_t bus;
+
+ bus = device_get_parent(pcib);
+ return (PCIB_ALLOC_MSIX(device_get_parent(bus), dev, index, irq));
+}
+
static u_long acpi_host_mem_start = 0x80000000;
TUNABLE_ULONG("hw.acpi.host_mem_start", &acpi_host_mem_start);
==== //depot/projects/smpng/sys/dev/awi/awivar.h#8 (text+ko) ====
@@ -1,5 +1,5 @@
/* $NetBSD: awivar.h,v 1.20 2004/01/15 09:39:15 onoe Exp $ */
-/* $FreeBSD: src/sys/dev/awi/awivar.h,v 1.12 2005/06/10 16:49:05 brooks Exp $ */
+/* $FreeBSD: src/sys/dev/awi/awivar.h,v 1.13 2006/12/12 03:05:04 kevlo Exp $ */
/*-
* Copyright (c) 1999,2000,2001 The NetBSD Foundation, Inc.
@@ -76,6 +76,7 @@
struct awi_softc {
#ifdef __NetBSD__
struct device sc_dev;
+ void (*sc_power)(struct awi_softc *, int);
#endif
#ifdef __FreeBSD__
struct arpcom sc_arp;
@@ -86,7 +87,6 @@
u_char sc_banner[AWI_BANNER_LEN];
int (*sc_enable)(struct awi_softc *);
void (*sc_disable)(struct awi_softc *);
- void (*sc_power)(struct awi_softc *, int);
int (*sc_newstate)(struct ieee80211com *,
enum ieee80211_state, int);
==== //depot/projects/smpng/sys/dev/bge/if_bge.c#82 (text+ko) ====
@@ -32,7 +32,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/dev/bge/if_bge.c,v 1.158 2006/12/11 18:00:34 jkim Exp $");
+__FBSDID("$FreeBSD: src/sys/dev/bge/if_bge.c,v 1.159 2006/12/12 05:11:12 scottl Exp $");
/*
* Broadcom BCM570x family gigabit ethernet driver for FreeBSD.
@@ -256,6 +256,10 @@
{ BGE_CHIPID_BCM5714_B3, "BCM5714 B3" },
{ BGE_CHIPID_BCM5715_A0, "BCM5715 A0" },
{ BGE_CHIPID_BCM5715_A1, "BCM5715 A1" },
+ /* 5784 and 5787 share the same ASIC ID */
+ { BGE_CHIPID_BCM5787_A0, "BCM5754/5787 A0" },
+ { BGE_CHIPID_BCM5787_A1, "BCM5754/5787 A1" },
+ { BGE_CHIPID_BCM5787_A2, "BCM5754/5787 A2" },
{ 0, NULL }
};
@@ -276,7 +280,8 @@
{ BGE_ASICREV_BCM5780, "unknown BCM5780" },
{ BGE_ASICREV_BCM5714, "unknown BCM5714" },
{ BGE_ASICREV_BCM5755, "unknown BCM5755" },
- { BGE_ASICREV_BCM5787, "unknown BCM5787" },
+ /* 5784 and 5787 share the same ASIC ID */
+ { BGE_ASICREV_BCM5787, "unknown BCM5754/5787" },
{ 0, NULL }
};
@@ -345,6 +350,7 @@
static uint32_t bge_readreg_ind(struct bge_softc *, int);
#endif
static void bge_writereg_ind(struct bge_softc *, int, int);
+static void bge_writemem_direct(struct bge_softc *, int, int) __unused;
static int bge_miibus_readreg(device_t, int, int);
static int bge_miibus_writereg(device_t, int, int, int);
@@ -361,6 +367,18 @@
static int bge_reset(struct bge_softc *);
static void bge_link_upd(struct bge_softc *);
+/*
+ * The BGE_REGISTER_DEBUG option is only for low-level debugging. It may
+ * leak information to untrusted users. It is also known to cause alignment
+ * traps on certain architectures.
+ */
+#ifdef BGE_REGISTER_DEBUG
+static int bge_sysctl_debug_info(SYSCTL_HANDLER_ARGS);
+static int bge_sysctl_reg_read(SYSCTL_HANDLER_ARGS);
+static int bge_sysctl_mem_read(SYSCTL_HANDLER_ARGS);
+#endif
+static void bge_add_sysctls(struct bge_softc *);
+
static device_method_t bge_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, bge_probe),
@@ -409,11 +427,14 @@
bge_readmem_ind(struct bge_softc *sc, int off)
{
device_t dev;
+ uint32_t val;
dev = sc->bge_dev;
pci_write_config(dev, BGE_PCI_MEMWIN_BASEADDR, off, 4);
- return (pci_read_config(dev, BGE_PCI_MEMWIN_DATA, 4));
+ val = pci_read_config(dev, BGE_PCI_MEMWIN_DATA, 4);
+ pci_write_config(dev, BGE_PCI_MEMWIN_BASEADDR, 0, 4);
+ return (val);
}
static void
@@ -425,6 +446,7 @@
pci_write_config(dev, BGE_PCI_MEMWIN_BASEADDR, off, 4);
pci_write_config(dev, BGE_PCI_MEMWIN_DATA, val, 4);
+ pci_write_config(dev, BGE_PCI_MEMWIN_BASEADDR, 0, 4);
}
#ifdef notdef
@@ -451,6 +473,12 @@
pci_write_config(dev, BGE_PCI_REG_DATA, val, 4);
}
+static void
+bge_writemem_direct(struct bge_softc *sc, int off, int val)
+{
+ CSR_WRITE_4(sc, off, val);
+}
+
/*
* Map a single buffer address.
*/
@@ -1193,6 +1221,7 @@
struct bge_rcb *rcb;
bus_size_t vrcb;
bge_hostaddr taddr;
+ uint32_t val;
int i;
/*
@@ -1330,7 +1359,12 @@
* values are 1/8th the number of descriptors allocated to
* each ring.
*/
- CSR_WRITE_4(sc, BGE_RBDI_STD_REPL_THRESH, BGE_STD_RX_RING_CNT/8);
+ if (sc->bge_flags & BGE_FLAG_5705_PLUS)
+ val = 8;
+ else
+ val = BGE_STD_RX_RING_CNT / 8;
+
+ CSR_WRITE_4(sc, BGE_RBDI_STD_REPL_THRESH, val);
CSR_WRITE_4(sc, BGE_RBDI_JUMBO_REPL_THRESH, BGE_JUMBO_RX_RING_CNT/8);
/*
@@ -1500,9 +1534,16 @@
if (!(BGE_IS_5705_PLUS(sc)))
CSR_WRITE_4(sc, BGE_DMAC_MODE, BGE_DMACMODE_ENABLE);
+
+ val = BGE_WDMAMODE_ENABLE|BGE_WDMAMODE_ALL_ATTNS;
+
+ /* Enable host coalescing bug fix. */
+ if (sc->bge_asicrev == BGE_ASICREV_BCM5755 ||
+ sc->bge_asicrev == BGE_ASICREV_BCM5787)
+ val |= (1 << 29);
+
/* Turn on write DMA state machine */
- CSR_WRITE_4(sc, BGE_WDMA_MODE,
- BGE_WDMAMODE_ENABLE|BGE_WDMAMODE_ALL_ATTNS);
+ CSR_WRITE_4(sc, BGE_WDMA_MODE, val);
/* Turn on read DMA state machine */
CSR_WRITE_4(sc, BGE_RDMA_MODE,
@@ -2071,7 +2112,7 @@
uint32_t mac_tmp = 0;
u_char eaddr[6];
int error = 0, rid;
- int trys;
+ int trys, reg;
sc = device_get_softc(dev);
sc->bge_dev = dev;
@@ -2143,28 +2184,38 @@
break;
}
- /*
- * XXX: Broadcom Linux driver. Not in specs or eratta.
- * PCI-Express?
- */
- if (BGE_IS_5705_PLUS(sc)) {
- uint32_t v;
-
- v = pci_read_config(dev, BGE_PCI_MSI_CAPID, 4);
- if (((v >> 8) & 0xff) == BGE_PCIE_CAPID_REG) {
- v = pci_read_config(dev, BGE_PCIE_CAPID_REG, 4);
- if ((v & 0xff) == BGE_PCIE_CAPID)
- sc->bge_flags |= BGE_FLAG_PCIE;
- }
+ /*
+ * Check if this is a PCI-X or PCI Express device.
+ */
+#if __FreeBSD_version > 700010
+ if (pci_find_extcap(dev, PCIY_EXPRESS, ®) == 0) {
+ /*
+ * Found a PCI Express capabilities register, this
+ * must be a PCI Express device.
+ */
+ if (reg != 0)
+ sc->bge_flags |= BGE_FLAG_PCIE;
+ } else if (pci_find_extcap(dev, PCIY_PCIX, ®) == 0) {
+ if (reg != 0)
+ sc->bge_flags |= BGE_FLAG_PCIX;
+ }
+
+#else
+ if (sc->bge_flags & BGE_FLAG_5705_PLUS) {
+ reg = pci_read_config(dev, BGE_PCIE_CAPID_REG, 4);
+ if ((reg & 0xff) == BGE_PCIE_CAPID)
+ sc->bge_flags |= BGE_FLAG_PCIE;
+ } else {
+ /*
+ * Check if the device is in PCI-X Mode.
+ * (This bit is not valid on PCI Express controllers.)
+ */
+ if ((pci_read_config(sc->bge_dev, BGE_PCI_PCISTATE, 4) &
+ BGE_PCISTATE_PCI_BUSMODE) == 0)
+ sc->bge_flags |= BGE_FLAG_PCIX;
}
+#endif
- /*
- * PCI-X ?
- */
- if ((pci_read_config(sc->bge_dev, BGE_PCI_PCISTATE, 4) &
- BGE_PCISTATE_PCI_BUSMODE) == 0)
- sc->bge_flags |= BGE_FLAG_PCIX;
-
/* Try to reset the chip. */
if (bge_reset(sc)) {
device_printf(sc->bge_dev, "chip reset failed\n");
@@ -2244,8 +2295,8 @@
sc->bge_stat_ticks = BGE_TICKS_PER_SEC;
sc->bge_rx_coal_ticks = 150;
sc->bge_tx_coal_ticks = 150;
- sc->bge_rx_max_coal_bds = 64;
- sc->bge_tx_max_coal_bds = 128;
+ sc->bge_rx_max_coal_bds = 10;
+ sc->bge_tx_max_coal_bds = 10;
/* Set up ifnet structure */
ifp = sc->bge_ifp = if_alloc(IFT_ETHER);
@@ -2384,6 +2435,8 @@
device_printf(sc->bge_dev, "couldn't set up irq\n");
}
+ bge_add_sysctls(sc);
+
fail:
return (error);
}
@@ -2458,10 +2511,19 @@
{
device_t dev;
uint32_t cachesize, command, pcistate, reset;
+ void (*write_op)(struct bge_softc *, int, int);
int i, val = 0;
dev = sc->bge_dev;
+ if (BGE_IS_5705_PLUS(sc) && !BGE_IS_5714_FAMILY(sc))
+ if (sc->bge_flags & BGE_FLAG_PCIE)
+ write_op = bge_writemem_direct;
+ else
+ write_op = bge_writemem_ind;
+ else
+ write_op = bge_writereg_ind;
+
/* Save some important PCI state. */
cachesize = pci_read_config(dev, BGE_PCI_CACHESZ, 4);
command = pci_read_config(dev, BGE_PCI_CMD, 4);
@@ -2471,6 +2533,23 @@
BGE_PCIMISCCTL_INDIRECT_ACCESS|BGE_PCIMISCCTL_MASK_PCI_INTR|
BGE_HIF_SWAP_OPTIONS|BGE_PCIMISCCTL_PCISTATE_RW, 4);
+ /* Disable fastboot on controllers that support it. */
+ if (sc->bge_asicrev == BGE_ASICREV_BCM5752 ||
+ sc->bge_asicrev == BGE_ASICREV_BCM5755 ||
+ sc->bge_asicrev == BGE_ASICREV_BCM5787) {
+ if (bootverbose)
+ device_printf(sc->bge_dev, "%s: Disabling fastboot\n",
+ __FUNCTION__);
+ CSR_WRITE_4(sc, BGE_FASTBOOT_PC, 0x0);
+ }
+
+ /*
+ * Write the magic number to SRAM at offset 0xB50.
+ * When firmware finishes its initialization it will
+ * write ~BGE_MAGIC_NUMBER to the same location.
+ */
+ bge_writemem_ind(sc, BGE_SOFTWARE_GENCOMM, BGE_MAGIC_NUMBER);
+
reset = BGE_MISCCFG_RESET_CORE_CLOCKS|(65<<1);
/* XXX: Broadcom Linux driver. */
@@ -2490,8 +2569,15 @@
*/
bge_writemem_ind(sc, BGE_SOFTWARE_GENCOMM, BGE_MAGIC_NUMBER);
+ /*
+ * Set GPHY Power Down Override to leave GPHY
+ * powered up in D0 uninitialized.
+ */
+ if (sc->bge_flags & BGE_FLAG_5705_PLUS)
+ reset |= 0x04000000;
+
/* Issue global reset */
- bge_writereg_ind(sc, BGE_MISC_CFG, reset);
+ write_op(sc, BGE_MISC_CFG, reset);
DELAY(1000);
@@ -2504,7 +2590,7 @@
v = pci_read_config(dev, 0xc4, 4);
pci_write_config(dev, 0xc4, v | (1<<15), 4);
}
- /* Set PCIE max payload size and clear error status. */
+ /* Set PCIE max payload size to 128 bytes and clear error status. */
pci_write_config(dev, 0xd8, 0xf5000, 4);
}
@@ -2514,7 +2600,7 @@
BGE_HIF_SWAP_OPTIONS|BGE_PCIMISCCTL_PCISTATE_RW, 4);
pci_write_config(dev, BGE_PCI_CACHESZ, cachesize, 4);
pci_write_config(dev, BGE_PCI_CMD, command, 4);
- bge_writereg_ind(sc, BGE_MISC_CFG, (65 << 1));
+ write_op(sc, BGE_MISC_CFG, (65 << 1));
/* Enable memory arbiter. */
if (BGE_IS_5714_FAMILY(sc)) {
@@ -2526,8 +2612,7 @@
CSR_WRITE_4(sc, BGE_MARB_MODE, BGE_MARBMODE_ENABLE);
/*
- * Poll the value location we just wrote until
- * we see the 1's complement of the magic number.
+ * Poll until we see the 1's complement of the magic number.
* This indicates that the firmware initialization
* is complete.
*/
@@ -2539,8 +2624,8 @@
}
if (i == BGE_TIMEOUT) {
- device_printf(sc->bge_dev, "firmware handshake timed out\n");
- return(0);
+ device_printf(sc->bge_dev, "firmware handshake timed out! "
+ "found 0x%08X\n", val);
}
/*
@@ -2557,6 +2642,11 @@
DELAY(10);
}
+ if (sc->bge_flags & BGE_FLAG_PCIE) {
+ reset = bge_readmem_ind(sc, 0x7c00);
+ bge_writemem_ind(sc, 0x7c00, reset | (1 << 25));
+ }
+
/* Fix up byte swapping. */
CSR_WRITE_4(sc, BGE_MODE_CTL, BGE_DMA_SWAP_OPTIONS|
BGE_MODECTL_BYTESWAP_DATA);
@@ -3947,3 +4037,141 @@
BGE_MACSTAT_CFG_CHANGED|BGE_MACSTAT_MI_COMPLETE|
BGE_MACSTAT_LINK_CHANGED);
}
+
+static void
+bge_add_sysctls(struct bge_softc *sc)
+{
+ struct sysctl_ctx_list *ctx;
+ struct sysctl_oid_list *children;
+
+ ctx = device_get_sysctl_ctx(sc->bge_dev);
+ children = SYSCTL_CHILDREN(device_get_sysctl_tree(sc->bge_dev));
+
+#ifdef BGE_REGISTER_DEBUG
+ SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "debug_info",
+ CTLTYPE_INT | CTLFLAG_RW, sc, 0, bge_sysctl_debug_info, "I",
+ "Debug Information");
+
+ SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "reg_read",
+ CTLTYPE_INT | CTLFLAG_RW, sc, 0, bge_sysctl_reg_read, "I",
+ "Register Read");
+
+ SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "mem_read",
+ CTLTYPE_INT | CTLFLAG_RW, sc, 0, bge_sysctl_mem_read, "I",
+ "Memory Read");
+
+ SYSCTL_ADD_ULONG(ctx, children, OID_AUTO, "stat_IfHcInOctets",
+ CTLFLAG_RD,
+ &sc->bge_ldata.bge_stats->rxstats.ifHCInOctets.bge_addr_lo,
+ "Bytes received");
+
+ SYSCTL_ADD_ULONG(ctx, children, OID_AUTO, "stat_IfHcOutOctets",
+ CTLFLAG_RD,
+ &sc->bge_ldata.bge_stats->txstats.ifHCOutOctets.bge_addr_lo,
+ "Bytes received");
+#endif
+}
+
+#ifdef BGE_REGISTER_DEBUG
+static int
+bge_sysctl_debug_info(SYSCTL_HANDLER_ARGS)
+{
+ struct bge_softc *sc;
+ uint16_t *sbdata;
+ int error;
+ int result;
+ int i, j;
+
+ result = -1;
+ error = sysctl_handle_int(oidp, &result, 0, req);
+ if (error || (req->newptr == NULL))
+ return (error);
+
+ if (result == 1) {
+ sc = (struct bge_softc *)arg1;
+
+ sbdata = (uint16_t *)sc->bge_ldata.bge_status_block;
+ printf("Status Block:\n");
+ for (i = 0x0; i < (BGE_STATUS_BLK_SZ / 4); ) {
+ printf("%06x:", i);
+ for (j = 0; j < 8; j++) {
+ printf(" %04x", sbdata[i]);
+ i += 4;
+ }
+ printf("\n");
+ }
+
+ printf("Registers:\n");
+ for (i = 0x800; i < 0xa00; ) {
+ printf("%06x:", i);
+ for (j = 0; j < 8; j++) {
+ printf(" %08x", CSR_READ_4(sc, i));
+ i += 4;
+ }
+ printf("\n");
+ }
+
+ printf("Hardware Flags:\n");
+ if (sc->bge_flags & BGE_FLAG_575X_PLUS)
+ printf(" - 575X Plus\n");
+ if (sc->bge_flags & BGE_FLAG_5705_PLUS)
+ printf(" - 5705 Plus\n");
+ if (sc->bge_flags & BGE_FLAG_JUMBO)
+ printf(" - Supports Jumbo Frames\n");
+ if (sc->bge_flags & BGE_FLAG_PCIX)
+ printf(" - PCI-X Bus\n");
+ if (sc->bge_flags & BGE_FLAG_PCIE)
+ printf(" - PCI Express Bus\n");
+ if (sc->bge_flags & BGE_FLAG_NO3LED)
+ printf(" - No 3 LEDs\n");
+ if (sc->bge_flags & BGE_FLAG_RX_ALIGNBUG)
+ printf(" - RX Alignment Bug\n");
+ }
+
+ return (error);
+}
+
+static int
+bge_sysctl_reg_read(SYSCTL_HANDLER_ARGS)
+{
+ struct bge_softc *sc;
+ int error;
+ uint16_t result;
+ uint32_t val;
+
+ result = -1;
+ error = sysctl_handle_int(oidp, &result, 0, req);
+ if (error || (req->newptr == NULL))
+ return (error);
+
+ if (result < 0x8000) {
+ sc = (struct bge_softc *)arg1;
+ val = CSR_READ_4(sc, result);
+ printf("reg 0x%06X = 0x%08X\n", result, val);
+ }
+
+ return (error);
+}
+
+static int
+bge_sysctl_mem_read(SYSCTL_HANDLER_ARGS)
+{
+ struct bge_softc *sc;
+ int error;
+ uint16_t result;
+ uint32_t val;
+
+ result = -1;
+ error = sysctl_handle_int(oidp, &result, 0, req);
+ if (error || (req->newptr == NULL))
+ return (error);
+
+ if (result < 0x8000) {
+ sc = (struct bge_softc *)arg1;
+ val = bge_readmem_ind(sc, result);
+ printf("mem 0x%06X = 0x%08X\n", result, val);
+ }
+
+ return (error);
+}
+#endif
==== //depot/projects/smpng/sys/dev/bge/if_bgereg.h#47 (text+ko) ====
@@ -30,7 +30,7 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*
- * $FreeBSD: src/sys/dev/bge/if_bgereg.h,v 1.60 2006/12/04 22:12:21 jkim Exp $
+ * $FreeBSD: src/sys/dev/bge/if_bgereg.h,v 1.61 2006/12/12 05:11:12 scottl Exp $
*/
/*
@@ -271,6 +271,15 @@
#define BGE_CHIPID_BCM5714_B3 0x80030000
#define BGE_CHIPID_BCM5715_A0 0x90000000
#define BGE_CHIPID_BCM5715_A1 0x90010000
+#define BGE_CHIPID_BCM5755_A0 0xa0000000
+#define BGE_CHIPID_BCM5755_A1 0xa0010000
+#define BGE_CHIPID_BCM5755_A2 0xa0020000
+#define BGE_CHIPID_BCM5754_A0 0xb0000000
+#define BGE_CHIPID_BCM5754_A1 0xb0010000
+#define BGE_CHIPID_BCM5754_A2 0xb0020000
+#define BGE_CHIPID_BCM5787_A0 0xb0000000
+#define BGE_CHIPID_BCM5787_A1 0xb0010000
+#define BGE_CHIPID_BCM5787_A2 0xb0020000
/* shorthand one */
#define BGE_ASICREV(x) ((x) >> 28)
@@ -285,6 +294,7 @@
#define BGE_ASICREV_BCM5780 0x08
#define BGE_ASICREV_BCM5714 0x09
#define BGE_ASICREV_BCM5755 0x0a
+#define BGE_ASICREV_BCM5754 0x0b
#define BGE_ASICREV_BCM5787 0x0b
/* chip revisions */
@@ -1661,6 +1671,7 @@
#define BGE_EE_CTL 0x6840
#define BGE_MDI_CTL 0x6844
#define BGE_EE_DELAY 0x6848
+#define BGE_FASTBOOT_PC 0x6894
/* Mode control register */
#define BGE_MODECTL_INT_SNDCOAL_ONLY 0x00000001
==== //depot/projects/smpng/sys/dev/pci/pci.c#79 (text+ko) ====
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/dev/pci/pci.c,v 1.324 2006/11/21 05:46:09 jmg Exp $");
+__FBSDID("$FreeBSD: src/sys/dev/pci/pci.c,v 1.327 2006/12/12 19:33:25 jhb Exp $");
#include "opt_bus.h"
@@ -52,6 +52,10 @@
#include <sys/rman.h>
#include <machine/resource.h>
+#if defined(__i386__) || defined(__amd64__)
+#include <machine/intr_machdep.h>
+#endif
+
#include <sys/pciio.h>
#include <dev/pci/pcireg.h>
#include <dev/pci/pcivar.h>
@@ -442,6 +446,10 @@
pci_read_extcap(device_t pcib, pcicfgregs *cfg)
{
#define REG(n, w) PCIB_READ_CONFIG(pcib, cfg->bus, cfg->slot, cfg->func, n, w)
+#define WREG(n, v, w) PCIB_WRITE_CONFIG(pcib, cfg->bus, cfg->slot, cfg->func, n, v, w)
+#if defined(__i386__) || defined(__amd64__)
+ uint64_t addr;
+#endif
uint32_t val;
int ptr, nextptr, ptrptr;
@@ -483,6 +491,29 @@
cfg->pp.pp_data = ptr + PCIR_POWER_DATA;
}
break;
+#if defined(__i386__) || defined(__amd64__)
+ case PCIY_HT: /* HyperTransport */
+ /* Determine HT-specific capability type. */
+ val = REG(ptr + PCIR_HT_COMMAND, 2);
+ switch (val & PCIM_HTCMD_CAP_MASK) {
+ case PCIM_HTCAP_MSI_MAPPING:
+ /* Sanity check the mapping window. */
+ addr = REG(ptr + PCIR_HTMSI_ADDRESS_HI, 4);
+ addr <<= 32;
+ addr = REG(ptr + PCIR_HTMSI_ADDRESS_LO, 4);
+ if (addr != MSI_INTEL_ADDR_BASE)
+ device_printf(pcib,
+ "HT Bridge at %d:%d:%d has non-default MSI window 0x%llx\n",
+ cfg->bus, cfg->slot, cfg->func,
+ (long long)addr);
+
+ /* Enable MSI -> HT mapping. */
+ val |= PCIM_HTCMD_MSI_ENABLE;
+ WREG(ptr + PCIR_HT_COMMAND, val, 2);
+ break;
+ }
+ break;
+#endif
case PCIY_MSI: /* PCI MSI */
cfg->msi.msi_location = ptr;
cfg->msi.msi_ctrl = REG(ptr + PCIR_MSI_CTRL, 2);
@@ -511,7 +542,7 @@
break;
}
}
-/* REG use carry through to next functions */
+/* REG and WREG use carry through to next functions */
}
/*
@@ -520,7 +551,6 @@
static uint32_t
pci_read_vpd_reg(device_t pcib, pcicfgregs *cfg, int reg)
{
-#define WREG(n, v, w) PCIB_WRITE_CONFIG(pcib, cfg->bus, cfg->slot, cfg->func, n, v, w)
KASSERT((reg & 3) == 0, ("VPD register must by 4 byte aligned"));
@@ -545,7 +575,6 @@
return;
}
#endif
-#undef WREG
struct vpd_readstate {
device_t pcib;
@@ -807,6 +836,7 @@
cfg->vpd.vpd_ros = NULL;
}
#undef REG
+#undef WREG
}
int
@@ -990,6 +1020,10 @@
if (cfg->msix.msix_alloc != 0)
return (ENXIO);
+ if (bootverbose)
+ device_printf(child,
+ "attempting to allocate %d MSI-X vectors (%d supported)\n",
+ *count, cfg->msix.msix_msgnum);
max = min(*count, cfg->msix.msix_msgnum);
for (i = 0; i < max; i++) {
/* Allocate a message. */
@@ -1002,6 +1036,51 @@
}
actual = i;
+ if (bootverbose) {
+ rle = resource_list_find(&dinfo->resources, SYS_RES_IRQ, 1);
+ if (actual == 1)
+ device_printf(child, "using IRQ %lu for MSI-X\n",
+ rle->start);
+ else {
+ int run;
+
+ /*
+ * Be fancy and try to print contiguous runs of
+ * IRQ values as ranges. 'irq' is the previous IRQ.
+ * 'run' is true if we are in a range.
+ */
+ device_printf(child, "using IRQs %lu", rle->start);
+ irq = rle->start;
+ run = 0;
+ for (i = 1; i < actual; i++) {
+ rle = resource_list_find(&dinfo->resources,
+ SYS_RES_IRQ, i + 1);
+
+ /* Still in a run? */
+ if (rle->start == irq + 1) {
+ run = 1;
+ irq++;
+ continue;
+ }
+
+ /* Finish previous range. */
+ if (run) {
+ printf("-%d", irq);
+ run = 0;
+ }
+
+ /* Start new range. */
+ printf(",%lu", rle->start);
+ irq = rle->start;
+ }
+
+ /* Unfinished range? */
+ if (run)
+ printf("%d", irq);
+ printf(" for MSI-X\n");
+ }
+ }
+
/* Mask all vectors. */
for (i = 0; i < cfg->msix.msix_msgnum; i++)
pci_mask_msix(child, i);
@@ -1151,6 +1230,11 @@
if (cfg->msi.msi_alloc != 0)
return (ENXIO);
+ if (bootverbose)
+ device_printf(child,
+ "attempting to allocate %d MSI vectors (%d supported)\n",
+ *count, cfg->msi.msi_msgnum);
>>> TRUNCATED FOR MAIL (1000 lines) <<<
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