PERFORCE change 111129 for review

[Oleksandr Tymoshenko]

http://perforce.freebsd.org/chv.cgi?CH=111129

Change 111129 by gonzo at gonzo_hq on 2006/12/05 09:31:25

	o We should preserve S0..S7 registers in trap as well.
	    These resgisters should not be changed during function
	    call. It's OK to leave them alone in all kinds of exceptions
	    but syscall. fork(2) call modifies them and child process
	    gets wrong values after return.

Affected files ...

.. //depot/projects/mips2/src/sys/mips/include/frame.h#4 edit
.. //depot/projects/mips2/src/sys/mips/mips/exception.S#17 edit
.. //depot/projects/mips2/src/sys/mips/mips/genassym.c#5 edit

Differences ...

==== //depot/projects/mips2/src/sys/mips/include/frame.h#4 (text+ko) ====

@@ -59,15 +59,24 @@
 #define	TF_T8		15
 #define	TF_T9		16
 
-#define	TF_RA		17
-#define	TF_SR		18
-#define	TF_MULLO	19
-#define	TF_MULHI	20
-#define	TF_EPC		21		/* may be changed by trap() call */
+#define	TF_S0		17
+#define	TF_S1		18
+#define	TF_S2		19
+#define	TF_S3		20
+#define	TF_S4		21
+#define	TF_S5		22
+#define	TF_S6		23
+#define	TF_S7		24
+
+#define	TF_RA		25
+#define	TF_SR		26
+#define	TF_MULLO	27
+#define	TF_MULHI	28
+#define	TF_EPC		29		/* may be changed by trap() call */
 
-#define	TF_SP		22
+#define	TF_SP		30
 
-#define	TF_NREGS	23
+#define	TF_NREGS	31
 
 /* Needs to be 8-byte aligned */
 struct trapframe {

==== //depot/projects/mips2/src/sys/mips/mips/exception.S#17 (text+ko) ====

@@ -23,7 +23,7 @@
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  *
- * $P4: //depot/projects/mips2/src/sys/mips/mips/exception.S#16 $
+ * $P4: //depot/projects/mips2/src/sys/mips/mips/exception.S#17 $
  */
 
 /*	$NetBSD: mipsX_subr.S,v 1.19 2005/12/11 12:18:09 christos Exp $	*/
@@ -776,6 +776,17 @@
 	lw	t1, TF_REG_T1(k1)
 	lw	t0, TF_REG_T0(k1)
 
+	lw	s0, TF_REG_S0(k1)
+	lw	s1, TF_REG_S1(k1)
+	lw	s2, TF_REG_S2(k1)
+	lw	s3, TF_REG_S3(k1)
+	lw	s4, TF_REG_S4(k1)
+	lw	s5, TF_REG_S5(k1)
+	lw	s6, TF_REG_S6(k1)
+	lw	s7, TF_REG_S7(k1)
+
+
+
 	/*
 	 * Brief interlude.
 	 */
@@ -841,8 +852,14 @@
 	sw	a2, TF_REG_A2(k1)
 	sw	a3, TF_REG_A3(k1)
 
-
-
+	sw	s0, TF_REG_S0(k1)
+	sw	s1, TF_REG_S1(k1)
+	sw	s2, TF_REG_S2(k1)
+	sw	s3, TF_REG_S3(k1)
+	sw	s4, TF_REG_S4(k1)
+	sw	s5, TF_REG_S5(k1)
+	sw	s6, TF_REG_S6(k1)
+	sw	s7, TF_REG_S7(k1)
 
 	/*
 	 * Brief interlude.

==== //depot/projects/mips2/src/sys/mips/mips/genassym.c#5 (text+ko) ====

@@ -157,6 +157,16 @@
 ASSYM(TF_REG_MULHI, offsetof(struct trapframe, tf_regs[TF_MULHI]));
 ASSYM(TF_REG_EPC, offsetof(struct trapframe, tf_regs[TF_EPC]));
 ASSYM(TF_REG_SP, offsetof(struct trapframe, tf_regs[TF_SP]));
+
+ASSYM(TF_REG_S0, offsetof(struct trapframe, tf_regs[TF_S0]));
+ASSYM(TF_REG_S1, offsetof(struct trapframe, tf_regs[TF_S1]));
+ASSYM(TF_REG_S2, offsetof(struct trapframe, tf_regs[TF_S2]));
+ASSYM(TF_REG_S3, offsetof(struct trapframe, tf_regs[TF_S3]));
+ASSYM(TF_REG_S4, offsetof(struct trapframe, tf_regs[TF_S4]));
+ASSYM(TF_REG_S5, offsetof(struct trapframe, tf_regs[TF_S5]));
+ASSYM(TF_REG_S6, offsetof(struct trapframe, tf_regs[TF_S6]));
+ASSYM(TF_REG_S7, offsetof(struct trapframe, tf_regs[TF_S7]));
+
 ASSYM(TF_PPL, offsetof(struct trapframe, tf_ppl));
 
 ASSYM(PCB_REG_S0, offsetof(struct pcb, pcb_regs[PCB_REG_S0]));