PERFORCE change 95126 for review

John-Mark Gurney jmg at FreeBSD.org
Thu Apr 13 01:12:51 UTC 2006


http://perforce.freebsd.org/chv.cgi?CH=95126

Change 95126 by jmg at jmg_carbon-60 on 2006/04/13 01:12:32

	pull in the ofw_pci code...
	
	drop the anoying make sure all bus numbers are unique..  very little
	of our code needs it.. instead start work on supporting multiple
	pci domains...
	
	make hv_pci provide the interfaces necessary to use ofw_pci...

Affected files ...

.. //depot/projects/kmacy_sun4v/src/sys/conf/files.sun4v#13 edit
.. //depot/projects/kmacy_sun4v/src/sys/dev/pci/pcivar.h#4 edit
.. //depot/projects/kmacy_sun4v/src/sys/kern/subr_rman.c#3 edit
.. //depot/projects/kmacy_sun4v/src/sys/sparc64/pci/ofw_pci_if.m#3 edit
.. //depot/projects/kmacy_sun4v/src/sys/sparc64/pci/ofw_pcib_subr.c#3 edit
.. //depot/projects/kmacy_sun4v/src/sys/sparc64/pci/ofw_pcib_subr.h#3 edit
.. //depot/projects/kmacy_sun4v/src/sys/sun4v/include/hv_pcivar.h#9 edit
.. //depot/projects/kmacy_sun4v/src/sys/sun4v/sun4v/hv_pci.c#37 edit

Differences ...

==== //depot/projects/kmacy_sun4v/src/sys/conf/files.sun4v#13 (text+ko) ====

@@ -52,6 +52,10 @@
 						eeprom sbus
 sun4v/sun4v/gdb_machdep.c	optional	gdb
 sun4v/sun4v/hv_pci.c	optional	pci
+sparc64/pci/ofw_pci.c		optional	pci
+sparc64/pci/ofw_pcib.c		optional	pci
+sparc64/pci/ofw_pcib_subr.c	optional	pci
+sparc64/pci/ofw_pcibus.c	optional	pci
 sparc64/pci/ofw_pci_if.m	optional	pci
 # XXX hvcons should be optional
 sun4v/sun4v/hvcons.c	standard	

==== //depot/projects/kmacy_sun4v/src/sys/dev/pci/pcivar.h#4 (text+ko) ====

@@ -235,13 +235,15 @@
 
 /*typedef enum pci_device_ivars pcib_device_ivars;*/
 enum pcib_device_ivars {
-	PCIB_IVAR_BUS
+	PCIB_IVAR_DOMAIN,
+	PCIB_IVAR_BUS,
 };
 
 #define PCIB_ACCESSOR(var, ivar, type)					 \
     __BUS_ACCESSOR(pcib, var, PCIB, ivar, type)
 
 PCIB_ACCESSOR(bus,		BUS,		uint32_t)
+PCIB_ACCESSOR(domain,		DOMAIN,		uint32_t)
 
 #undef PCIB_ACCESSOR
 

==== //depot/projects/kmacy_sun4v/src/sys/kern/subr_rman.c#3 (text+ko) ====

@@ -252,9 +252,10 @@
 
 	rv = NULL;
 
-	DPRINTF(("rman_reserve_resource: <%s> request: [%#lx, %#lx], length "
-	       "%#lx, flags %u, device %s\n", rm->rm_descr, start, end, count,
-	       flags, dev == NULL ? "<null>" : device_get_nameunit(dev)));
+	DPRINTF(("rman_reserve_resource_bound: <%s> request: [%#lx, %#lx], "
+	       "length %#lx, flags %u, device %s\n", rm->rm_descr, start, end,
+	       count, flags,
+	       dev == NULL ? "<null>" : device_get_nameunit(dev)));
 	want_activate = (flags & RF_ACTIVE);
 	flags &= ~RF_ACTIVE;
 

==== //depot/projects/kmacy_sun4v/src/sys/sparc64/pci/ofw_pci_if.m#3 (text+ko) ====

@@ -36,7 +36,6 @@
 CODE {
 	static ofw_pci_intr_pending_t ofw_pci_default_intr_pending;
 	static ofw_pci_get_bus_handle_t ofw_pci_default_get_bus_handle;
-	static ofw_pci_adjust_busrange_t ofw_pci_default_adjust_busrange;
 
 	static int
 	ofw_pci_default_intr_pending(device_t dev, ofw_pci_intr_t intr)
@@ -54,12 +53,6 @@
 		    childhdl, tag));
 	}
 
-	static void
-	ofw_pci_default_adjust_busrange(device_t dev, u_int busno)
-	{
-
-		return (OFW_PCI_ADJUST_BUSRANGE(device_get_parent(dev), busno));
-	}
 };
 
 # Return whether an interrupt request is pending for the INO intr.
@@ -77,11 +70,3 @@
 	bus_space_handle_t childhdl;
 	bus_space_tag_t *tag;
 } DEFAULT ofw_pci_default_get_bus_handle;
-
-# Make sure that all PCI bridges up in the hierarchy contain this bus in their
-# subordinate bus range. This is required because we reenumerate all PCI
-# buses.
-METHOD void adjust_busrange {
-	device_t dev;
-	u_int subbus;
-} DEFAULT ofw_pci_default_adjust_busrange;

==== //depot/projects/kmacy_sun4v/src/sys/sparc64/pci/ofw_pcib_subr.c#3 (text+ko) ====

@@ -60,19 +60,6 @@
 	KASSERT(sc->ops_node != 0,
 	    ("ofw_pcib_gen_setup: no ofw pci parent bus!"));
 
-	/*
-	 * Setup the secondary bus number register, by allocating a new unique
-	 * bus number for it; the firmware preset does not always seem to be
-	 * correct.
-	 */
-	secbus = ofw_pci_alloc_busno(sc->ops_node);
-	pci_write_config(bridge, PCIR_PRIBUS_1, pci_get_bus(bridge), 1);
-	pci_write_config(bridge, PCIR_SECBUS_1, secbus, 1);
-	pci_write_config(bridge, PCIR_SUBBUS_1, secbus, 1);
-	sc->ops_pcib_sc.subbus = sc->ops_pcib_sc.secbus = secbus;
-	/* Notify parent bridges. */
-	OFW_PCI_ADJUST_BUSRANGE(device_get_parent(bridge), secbus);
-
 	ofw_bus_setup_iinfo(sc->ops_node, &sc->ops_iinfo,
 	    sizeof(ofw_pci_intr_t));
 }
@@ -120,22 +107,3 @@
 	sc = device_get_softc(bridge);
 	return (sc->ops_node);
 }
-
-void
-ofw_pcib_gen_adjust_busrange(device_t bridge, u_int subbus)
-{
-	struct ofw_pcib_gen_softc *sc;
-
-	sc = device_get_softc(bridge);
-	if (subbus > sc->ops_pcib_sc.subbus) {
-#ifdef OFW_PCI_DEBUG
-		device_printf(bridge,
-		    "adjusting secondary bus number from %d to %d\n",
-		    sc->ops_pcib_sc.subbus, subbus);
-#endif
-		pci_write_config(bridge, PCIR_SUBBUS_1, subbus, 1);
-		sc->ops_pcib_sc.subbus = subbus;
-		/* Notify parent bridges. */
-		OFW_PCI_ADJUST_BUSRANGE(device_get_parent(bridge), subbus);
-	}
-}

==== //depot/projects/kmacy_sun4v/src/sys/sparc64/pci/ofw_pcib_subr.h#3 (text+ko) ====

@@ -42,6 +42,5 @@
 void ofw_pcib_gen_setup(device_t);
 pcib_route_interrupt_t ofw_pcib_gen_route_interrupt;
 ofw_bus_get_node_t ofw_pcib_gen_get_node;
-ofw_pci_adjust_busrange_t ofw_pcib_gen_adjust_busrange;
 
 #endif /* !_SPARC64_PCI_OFW_PCI_SUBR_H */

==== //depot/projects/kmacy_sun4v/src/sys/sun4v/include/hv_pcivar.h#9 (text+ko) ====

@@ -32,6 +32,7 @@
 
 struct hvpci_softc {
 	devhandle_t	hs_devhandle;
+	phandle_t	hs_node;
 	uint8_t		hs_busnum;
 
 	struct bus_dma_tag	hs_dmatag;

==== //depot/projects/kmacy_sun4v/src/sys/sun4v/sun4v/hv_pci.c#37 (text+ko) ====

@@ -82,6 +82,9 @@
 static pcib_read_config_t hvpci_read_config;
 static pcib_write_config_t hvpci_write_config;
 static pcib_route_interrupt_t hvpci_route_interrupt;
+static ofw_bus_get_node_t hvpci_get_node;
+static ofw_pci_intr_pending_t hvpci_intr_pending;
+static ofw_pci_get_bus_handle_t hvpci_get_bus_handle;
 
 static device_method_t hv_pcib_methods[] = {
 	/* Device interface */
@@ -109,6 +112,13 @@
 	DEVMETHOD(pcib_write_config,	hvpci_write_config),
 	DEVMETHOD(pcib_route_interrupt,	hvpci_route_interrupt),
 
+	/* ofw_bus interface */
+	DEVMETHOD(ofw_bus_get_node,	hvpci_get_node),
+
+	/* ofw_pci interface */
+	DEVMETHOD(ofw_pci_intr_pending,	hvpci_intr_pending),
+	DEVMETHOD(ofw_pci_get_bus_handle,	hvpci_get_bus_handle),
+
 	{ 0, 0 }
 };
 
@@ -153,6 +163,8 @@
 	if (node == -1)
 		panic("%s: ofw_bus_get_node failed.", __func__);
 
+	sc->hs_node = node;
+
 	/* Setup the root bus number for this bus */
 	n = OF_getprop(node, "bus-range", &br[0], sizeof br);
 	if (n == -1)
@@ -168,8 +180,8 @@
 	sc->hs_pci_intr_rman.rm_type = RMAN_ARRAY;
 	sc->hs_pci_intr_rman.rm_descr = "HyperVisor PCI Interrupts";
 	if (rman_init(&sc->hs_pci_intr_rman) != 0 ||
-	    /* XXX - no clue where this should start or end */
-	    rman_manage_region(&sc->hs_pci_intr_rman, 0, 3) != 0)
+	    /* We use 1 (INTA) through 4 (INTD) */
+	    rman_manage_region(&sc->hs_pci_intr_rman, 1, 4) != 0)
 		panic("%s: failed to set up intr rman", __func__);
 	
 	/* Pull in the ra addresses out of OFW */
@@ -342,6 +354,46 @@
 	return (pin);
 }
 
+static phandle_t
+hvpci_get_node(device_t bus, device_t dev)
+{
+	struct hvpci_softc *sc;
+
+	sc = device_get_softc(dev);
+
+	return (sc->hs_node);
+}
+
+static int
+hvpci_intr_pending(device_t dev, ofw_pci_intr_t intr)
+{
+	/* XXX - implement */
+	panic("unimplemnted");
+}
+
+static bus_space_handle_t
+hvpci_get_bus_handle(device_t dev, int type, bus_space_handle_t childhdl,
+    bus_space_tag_t *tag)
+{
+	struct hvpci_softc *sc;
+
+	sc = device_get_softc(dev);
+	switch (type) {
+	case SYS_RES_IOPORT:
+		*tag = sc->hs_pci_iot;
+		return (sc->hs_pci_ioh + childhdl);
+		break;
+
+	case SYS_RES_MEMORY:
+		*tag = sc->hs_pci_memt;
+		return (sc->hs_pci_ioh + childhdl);
+		break;
+
+	default:
+		panic("%s: illegal space (%d)", __func__, type);
+	}
+}
+
 static int
 hvpci_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
 {


More information about the p4-projects mailing list