PERFORCE change 94958 for review

[Warner Losh]

http://perforce.freebsd.org/chv.cgi?CH=94958

Change 94958 by imp at imp_Speedy on 2006/04/10 22:40:55

	Start to support both 10MHz and 16MHz clocks for download.  Ideally
	we'd support all the Main Clocks that the bootloader would support,
	but that's going to take some doing to get the right tables.

Affected files ...

.. //depot/projects/arm/src/sys/boot/arm/kb920x/boot0/at91rm9200_lowlevel.c#6 edit
.. //depot/projects/arm/src/sys/boot/arm/kb920x/boot0/at91rm9200_lowlevel.h#3 edit
.. //depot/projects/arm/src/sys/boot/arm/kb920x/boot0/main.c#6 edit

Differences ...

==== //depot/projects/arm/src/sys/boot/arm/kb920x/boot0/at91rm9200_lowlevel.c#6 (text+ko) ====

@@ -67,41 +67,29 @@
 	value = AT91C_BASE_CKGR->CKGR_PLLAR;
 	value &= ~AT91C_CKGR_DIVA;
 	value &= ~AT91C_CKGR_OUTA;
-#ifdef USE_80P_20M_CLOCKS
-	value |= (OSC_MAIN_FREQ_DIV | AT91C_CKGR_OUTA_0);
-#else
-	value |= (OSC_MAIN_FREQ_DIV | AT91C_CKGR_OUTA_2);
-#endif
+	value |= (OSC_MAIN_FREQ_DIV_16 | AT91C_CKGR_OUTA_2);
 	value |= AT91C_CKGR_SRCA;
 	AT91C_BASE_CKGR->CKGR_PLLAR = value;
 
 	// mul = 90
 	value = AT91C_BASE_CKGR->CKGR_PLLAR;
 	value &= ~AT91C_CKGR_MULA;
-#ifdef USE_80P_20M_CLOCKS
-	value |= (39 << 16);
-#else
-	value |= (89 << 16);
-#endif
+	value |= (OSC_MAIN_MULT -1) << 16;
 	AT91C_BASE_CKGR->CKGR_PLLAR = value;
 
 	// wait for lock
-	while (!((AT91C_BASE_PMC->PMC_SR) & AT91C_PMC_LOCKA)) ;
+	while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCKA)) ;
 
 	// change divider = 3, pres = 1
 	value = AT91C_BASE_PMC->PMC_MCKR;
 	value &= ~AT91C_PMC_MDIV;
-#ifdef USE_80P_20M_CLOCKS
-	value |= AT91C_PMC_MDIV_4;
-#else
 	value |= AT91C_PMC_MDIV_3;
-#endif
 	value &= ~AT91C_PMC_PRES;
 	value |= AT91C_PMC_PRES_CLK;
 	AT91C_BASE_PMC->PMC_MCKR = value;
 
 	// wait for update
-	while (!((AT91C_BASE_PMC->PMC_SR) & AT91C_PMC_MCKRDY)) ;
+	while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY)) ;
 
 	// change CSS = PLLA
 	value &= ~AT91C_PMC_CSS;
@@ -109,7 +97,7 @@
 	AT91C_BASE_PMC->PMC_MCKR = value;
 
 	// wait for update
-	while (!((AT91C_BASE_PMC->PMC_SR) & AT91C_PMC_MCKRDY)) ;
+	while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY)) ;
 
 	// setup SDRAM access
 	// EBI chip-select register (CS1 = SDRAM controller)

==== //depot/projects/arm/src/sys/boot/arm/kb920x/boot0/at91rm9200_lowlevel.h#3 (text+ko) ====

@@ -1,46 +1,41 @@
-/*******************************************************************************
+/*-
+ * Copyright (c) 2006 M. Warner Losh.  All rights reserved.
  *
- * Filename: at91rm9200_lowlevel.h
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
  *
- * Definition of low-level routines to access the chip-specific 
- * functions/registers.
- *
- * Revision information:
- *
- * 20AUG2004	kb_admin	initial creation
- *
- * BEGIN_KBDD_BLOCK
- * No warranty, expressed or implied, is included with this software.  It is
- * provided "AS IS" and no warranty of any kind including statutory or aspects
- * relating to merchantability or fitness for any purpose is provided.  All
- * intellectual property rights of others is maintained with the respective
- * owners.  This software is not copyrighted and is intended for reference
- * only.
- * END_BLOCK
- ******************************************************************************/
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
 
 #ifndef _AT91RM9200_LOWLEVEL_H_
 #define _AT91RM9200_LOWLEVEL_H_
 
 /* default system config parameters */
 
-/* Define following for 80MHz processor/20MHz master */
-/* If not defined, set for 180MHz processor/60MHz master */
-// #ifdef USE_80P_20M_CLOCKS
-
 #define SDRAM_BASE		0x20000000
 
 /* The following divisor sets PLLA frequency: e.g. 10/5 * 90 = 180MHz */
-// #define OSC_MAIN_FREQ_DIV	5	/* for 10MHz osc */
-#define OSC_MAIN_FREQ_DIV	8	/* for 16MHz osc */
+#define OSC_MAIN_FREQ_DIV_10	5	/* for 10MHz osc */
+#define OSC_MAIN_FREQ_DIV_16	8	/* for 16MHz osc */
+#define OSC_MAIN_MULT		90	/* Constant for both */
 
 /* Master clock frequency at power-up */
-#ifdef USE_80P_20M_CLOCKS
-#define AT91C_MASTER_CLOCK 20000000
-#else
 #define AT91C_MASTER_CLOCK 60000000
-#endif
-
 
 #define GetSeconds() (AT91C_BASE_RTC->RTC_TIMR & AT91C_RTC_SEC)
 

==== //depot/projects/arm/src/sys/boot/arm/kb920x/boot0/main.c#6 (text+ko) ====

@@ -23,6 +23,7 @@
  */
 
 #include "AT91RM9200.h"
+#include "at91rm9200_lowlevel.h"
 
 typedef	void fn_t(void);