PERFORCE change 86959 for review

[Olivier Houchard]

http://perforce.freebsd.org/chv.cgi?CH=86959

Change 86959 by cognet at cognet on 2005/11/19 15:08:54

	Oooops. Unbreak the build.

Affected files ...

.. //depot/projects/arm/src/sys/arm/at91/at91rm92.c#3 edit
.. //depot/projects/arm/src/sys/arm/at91/at91rm92reg.h#3 edit

Differences ...

==== //depot/projects/arm/src/sys/arm/at91/at91rm92.c#3 (text+ko) ====

@@ -198,8 +198,8 @@
 	sc->dev = dev;
 	sc->sc_irq_rman.rm_type = RMAN_ARRAY;
 	sc->sc_irq_rman.rm_descr = "AT91RM92 IRQs";
-	if (bus_space_subregion(sc->sc_st, sc->sc_sh, AT91RM92_IC_BASE,
-	    AT91RM92_IC_SIZE, &sc->sc_sys_sh) != 0)
+	if (bus_space_subregion(sc->sc_st, sc->sc_sh, AT91RM92_SYS_BASE,
+	    AT91RM92_SYS_SIZE, &sc->sc_sys_sh) != 0)
 		panic("Enable to map IRQ registers");
 	if (rman_init(&sc->sc_irq_rman) != 0 ||
 	    rman_manage_region(&sc->sc_irq_rman, 1, 31) != 0)

==== //depot/projects/arm/src/sys/arm/at91/at91rm92reg.h#3 (text+ko) ====

@@ -165,7 +165,7 @@
 #define PIOA_PPUSR		(AT91RM92_SYS_BASE + 0x400 + 104) /* Pad pull-up status register */
 #define PIOA_ASR		(AT91RM92_SYS_BASE + 0x400 + 112) /* Select A register */
 #define PIOA_BSR		(AT91RM92_SYS_BASE + 0x400 + 116) /* Select B register */
-#define PIOA_BSR		(AT91RM92_SYS_BASE + 0x400 + 120) /* AB Select status register */
+#define PIOA_ABSR		(AT91RM92_SYS_BASE + 0x400 + 120) /* AB Select status register */
 #define PIOA_OWER		(AT91RM92_SYS_BASE + 0x400 + 160) /* Output Write enable register */
 #define PIOA_OWDR		(AT91RM92_SYS_BASE + 0x400 + 164) /* Output write disable register */
 #define PIOA_OWSR		(AT91RM92_SYS_BASE + 0x400 + 168) /* Output write status register */
@@ -194,7 +194,7 @@
 #define PIOB_PPUSR		(AT91RM92_SYS_BASE + 0x600 + 104) /* Pad pull-up status register */
 #define PIOB_ASR		(AT91RM92_SYS_BASE + 0x600 + 112) /* Select A register */
 #define PIOB_BSR		(AT91RM92_SYS_BASE + 0x600 + 116) /* Select B register */
-#define PIOB_BSR		(AT91RM92_SYS_BASE + 0x600 + 120) /* AB Select status register */
+#define PIOB_ABSR		(AT91RM92_SYS_BASE + 0x600 + 120) /* AB Select status register */
 #define PIOB_OWER		(AT91RM92_SYS_BASE + 0x600 + 160) /* Output Write enable register */
 #define PIOB_OWDR		(AT91RM92_SYS_BASE + 0x600 + 164) /* Output write disable register */
 #define PIOB_OWSR		(AT91RM92_SYS_BASE + 0x600 + 168) /* Output write status register */
@@ -223,7 +223,7 @@
 #define PIOC_PPUSR		(AT91RM92_SYS_BASE + 0x800 + 104) /* Pad pull-up status register */
 #define PIOC_ASR		(AT91RM92_SYS_BASE + 0x800 + 112) /* Select A register */
 #define PIOC_BSR		(AT91RM92_SYS_BASE + 0x800 + 116) /* Select B register */
-#define PIOC_BSR		(AT91RM92_SYS_BASE + 0x800 + 120) /* AB Select status register */
+#define PIOC_ABSR		(AT91RM92_SYS_BASE + 0x800 + 120) /* AB Select status register */
 #define PIOC_OWER		(AT91RM92_SYS_BASE + 0x800 + 160) /* Output Write enable register */
 #define PIOC_OWDR		(AT91RM92_SYS_BASE + 0x800 + 164) /* Output write disable register */
 #define PIOC_OWSR		(AT91RM92_SYS_BASE + 0x800 + 168) /* Output write status register */
@@ -252,7 +252,7 @@
 #define PIOD_PPUSR		(AT91RM92_SYS_BASE + 0xa00 + 104) /* Pad pull-up status register */
 #define PIOD_ASR		(AT91RM92_SYS_BASE + 0xa00 + 112) /* Select A register */
 #define PIOD_BSR		(AT91RM92_SYS_BASE + 0xa00 + 116) /* Select B register */
-#define PIOD_BSR		(AT91RM92_SYS_BASE + 0xa00 + 120) /* AB Select status register */
+#define PIOD_ABSR		(AT91RM92_SYS_BASE + 0xa00 + 120) /* AB Select status register */
 #define PIOD_OWER		(AT91RM92_SYS_BASE + 0xa00 + 160) /* Output Write enable register */
 #define PIOD_OWDR		(AT91RM92_SYS_BASE + 0xa00 + 164) /* Output write disable register */
 #define PIOD_OWSR		(AT91RM92_SYS_BASE + 0xa00 + 168) /* Output write status register */