PERFORCE change 49434 for review

[Juli Mallett]

http://perforce.freebsd.org/chv.cgi?CH=49434

Change 49434 by jmallett at jmallett_oingo on 2004/03/20 21:07:07

	Delay restoring SR.

Affected files ...

.. //depot/projects/mips/sys/mips/mips/exception.S#25 edit

Differences ...

==== //depot/projects/mips/sys/mips/mips/exception.S#25 (text+ko) ====

@@ -23,7 +23,7 @@
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  *
- * $P4: //depot/projects/mips/sys/mips/mips/exception.S#24 $
+ * $P4: //depot/projects/mips/sys/mips/mips/exception.S#25 $
  */
 
 #include "opt_ddb.h"
@@ -294,7 +294,9 @@
 	ld	a1, TF_REG_EPC(k1)
 	ld	a0, TF_REG_MULHI(k1)
 	ld	v1, TF_REG_MULLO(k1)
+#if 0
 	ld	v0, TF_REG_SR(k1)
+#endif
 
 	ld	ra, TF_REG_RA(k1)
 	ld	t9, TF_REG_T9(k1)
@@ -314,7 +316,9 @@
 	dmtc0	a1, MIPS_COP_0_EXC_PC
 	mthi	a0
 	mtlo	v1
+#if 0
 	mtc0	v0, MIPS_COP_0_STATUS
+#endif
 
 	/*
 	 * Now restore the registers we used for scratch, and nearby
@@ -339,9 +343,18 @@
 	 */
 	.set noat
 	ld	AT, TF_REG_AST(k1)
-
+#if 1
+	/* XXX
+	 * We wait until now so we don't interrupt ourselves.
+	 */
+	ld	k1, TF_REG_SR(k1)
+	jr	k0
+	mtc0	k1, MIPS_COP_0_STATUS
+#else
 	jr	k0
 	nop
+#endif
+
 	.set at
 END(exception_restore_registers)