PERFORCE change 48042 for review

[Peter Wemm]

http://perforce.freebsd.org/chv.cgi?CH=48042

Change 48042 by peter at peter_daintree on 2004/03/02 23:46:57

	initial pass at i386->amd64 updates.  given no pcibios, large parts of
	this are going to disappear again, but it keeps an integration record.

Affected files ...

.. //depot/projects/hammer/sys/amd64/include/pci_cfgreg.h#8 integrate
.. //depot/projects/hammer/sys/amd64/pci/pci_bus.c#13 integrate
.. //depot/projects/hammer/sys/amd64/pci/pci_cfgreg.c#12 integrate
.. //depot/projects/hammer/sys/amd64/pci/pci_pir.c#1 branch

Differences ...

==== //depot/projects/hammer/sys/amd64/include/pci_cfgreg.h#8 (text+ko) ====

@@ -45,4 +45,3 @@
 int		pci_cfgregopen(void);
 u_int32_t	pci_cfgregread(int bus, int slot, int func, int reg, int bytes);
 void		pci_cfgregwrite(int bus, int slot, int func, int reg, u_int32_t data, int bytes);
-int		pci_cfgintr(int bus, int device, int pin, int oldirq);

==== //depot/projects/hammer/sys/amd64/pci/pci_bus.c#13 (text+ko) ====

@@ -33,18 +33,17 @@
 #include <sys/systm.h>
 #include <sys/bus.h>
 #include <sys/kernel.h>
-#include <sys/module.h>
 #include <sys/malloc.h>
 
 #include <dev/pci/pcivar.h>
 #include <dev/pci/pcireg.h>
 #include <dev/pci/pcib_private.h>
 #include <isa/isavar.h>
+#ifdef CPU_ELAN
+#include <machine/md_var.h>
+#endif
 #include <machine/legacyvar.h>
 #include <machine/pci_cfgreg.h>
-#include <machine/segments.h>
-#include <machine/cputypes.h>
-#include <machine/md_var.h>
 
 #include "pcib_if.h"
 
@@ -432,9 +431,16 @@
 int
 legacy_pcib_attach(device_t dev)
 {
+	int bus;
 
-	device_add_child(dev, "pci", pcib_get_bus(dev));
-
+	/*
+	 * Look for a PCI BIOS interrupt routing table as that will be
+	 * our method of routing interrupts if we have one.
+	 */
+	bus = pcib_get_bus(dev);
+	if (pci_pir_probe(bus, 0))
+		pci_pir_parse();
+	device_add_child(dev, "pci", bus);
 	return bus_generic_attach(dev);
 }
 
@@ -612,3 +618,71 @@
 static devclass_t pcibus_pnp_devclass;
 
 DRIVER_MODULE(pcibus_pnp, isa, pcibus_pnp_driver, pcibus_pnp_devclass, 0, 0);
+
+
+/*
+ * Provide a PCI-PCI bridge driver for PCI busses behind PCI-PCI bridges
+ * that appear in the PCIBIOS Interrupt Routing Table to use the routing
+ * table for interrupt routing when possible.
+ */
+static int	pcibios_pcib_probe(device_t bus);
+
+static device_method_t pcibios_pcib_pci_methods[] = {
+	/* Device interface */
+	DEVMETHOD(device_probe,		pcibios_pcib_probe),
+	DEVMETHOD(device_attach,	pcib_attach),
+	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
+	DEVMETHOD(device_suspend,	bus_generic_suspend),
+	DEVMETHOD(device_resume,	bus_generic_resume),
+
+	/* Bus interface */
+	DEVMETHOD(bus_print_child,	bus_generic_print_child),
+	DEVMETHOD(bus_read_ivar,	pcib_read_ivar),
+	DEVMETHOD(bus_write_ivar,	pcib_write_ivar),
+	DEVMETHOD(bus_alloc_resource,	pcib_alloc_resource),
+	DEVMETHOD(bus_release_resource,	bus_generic_release_resource),
+	DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
+	DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
+	DEVMETHOD(bus_setup_intr,	bus_generic_setup_intr),
+	DEVMETHOD(bus_teardown_intr,	bus_generic_teardown_intr),
+
+	/* pcib interface */
+	DEVMETHOD(pcib_maxslots,	pcib_maxslots),
+	DEVMETHOD(pcib_read_config,	pcib_read_config),
+	DEVMETHOD(pcib_write_config,	pcib_write_config),
+	DEVMETHOD(pcib_route_interrupt,	pcibios_pcib_route_interrupt),
+
+	{0, 0}
+};
+
+static driver_t pcibios_pcib_driver = {
+	"pcib",
+	pcibios_pcib_pci_methods,
+	sizeof(struct pcib_softc),
+};
+
+DRIVER_MODULE(pcibios_pcib, pci, pcibios_pcib_driver, pcib_devclass, 0, 0);
+
+static int
+pcibios_pcib_probe(device_t dev)
+{
+	int bus;
+
+	if ((pci_get_class(dev) != PCIC_BRIDGE) ||
+	    (pci_get_subclass(dev) != PCIS_BRIDGE_PCI))
+		return (ENXIO);
+	bus = pci_read_config(dev, PCIR_SECBUS_1, 1);
+	if (bus == 0)
+		return (ENXIO);
+	if (!pci_pir_probe(bus, 1))
+		return (ENXIO);
+	device_set_desc(dev, "PCIBIOS PCI-PCI bridge");
+	return (-2000);
+}
+
+static int
+pcibios_pcib_route_interrupt(device_t pcib, device_t dev, int pin)
+{
+	return (pci_pir_route_interrupt(pci_get_bus(dev), pci_get_slot(dev),
+		pci_get_function(dev), pin));
+}

==== //depot/projects/hammer/sys/amd64/pci/pci_cfgreg.c#12 (text+ko) ====

@@ -29,24 +29,15 @@
 #include <sys/cdefs.h>
 __FBSDID("$FreeBSD: src/sys/amd64/pci/pci_cfgreg.c,v 1.105 2004/01/28 20:46:31 peter Exp $");
 
-#include <sys/param.h>		/* XXX trim includes */
+#include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/malloc.h>
 #include <sys/lock.h>
 #include <sys/mutex.h>
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <machine/md_var.h>
 #include <dev/pci/pcivar.h>
 #include <dev/pci/pcireg.h>
-#include <isa/isavar.h>
 #include <machine/pci_cfgreg.h>
 
-#include "pcib_if.h"
-
 static int cfgmech;
 static int devmax;
 
@@ -108,18 +99,6 @@
 	pcireg_cfgwrite(bus, slot, func, reg, data, bytes);
 }
 
-/*
- * Route a PCI interrupt
- */
-int
-pci_cfgintr(int bus, int device, int pin, int oldirq)
-{
-
-	printf("pci_cfgintr: can't route an interrupt to %d:%d INT%c without ACPI\n", bus, 
-	    device, 'A' + pin - 1);
-	return (PCI_INVALID_IRQ);
-}
-
 /* 
  * Configuration space access using direct register operations
  */