PERFORCE change 54251 for review
Juli Mallett
jmallett at FreeBSD.org
Sun Jun 6 03:45:04 GMT 2004
http://perforce.freebsd.org/chv.cgi?CH=54251
Change 54251 by jmallett at jmallett_oingo on 2004/06/06 03:45:00
Kill code I want to factor out.
Affected files ...
.. //depot/projects/mips/sys/mips/sgimips/ip22.c#7 edit
.. //depot/projects/mips/sys/mips/sgimips/sysconf.h#3 edit
Differences ...
==== //depot/projects/mips/sys/mips/sgimips/ip22.c#7 (text+ko) ====
@@ -41,30 +41,10 @@
#include <platform/models.h>
#include <platform/sysconf.h>
-u_int32_t next_clk_intr;
-u_int32_t missed_clk_intrs;
-static unsigned long last_clk_intr;
-
-#if notyet
-static struct evcnt mips_int5_evcnt =
- EVCNT_INITIALIZER(EVCNT_TYPE_INTR, NULL, "mips", "int 5 (clock)");
-
-static struct evcnt mips_spurint_evcnt =
- EVCNT_INITIALIZER(EVCNT_TYPE_INTR, NULL, "mips", "spurious interrupts");
-#endif
-
static u_int32_t iocwrite; /* IOC write register: read-only */
static u_int32_t iocreset; /* IOC reset register: read-only */
-void ip22_bus_reset(void);
-int ip22_local0_intr(void);
-int ip22_local1_intr(void);
-int ip22_mappable_intr(void *);
-void ip22_intr(u_int, u_int, u_int, u_int);
-void ip22_intr_establish(int, int, int (*)(void *), void *);
void ip22_watchdog(int);
-
-unsigned long ip22_clkread(void);
unsigned long ip22_cal_timer(u_int32_t, u_int32_t);
/* ip22_cache.S */
@@ -136,18 +116,8 @@
*(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(0x1fbd984c) = 0xff;
}
- platform.iointr = ip22_intr;
- platform.bus_reset = ip22_bus_reset;
- platform.intr_establish = ip22_intr_establish;
platform.watchdog = ip22_watchdog;
- /* Hardcode interrupts 7, 11 to mappable interrupt 0,1 handlers */
- intrtab[7].ih_fun = ip22_mappable_intr;
- intrtab[7].ih_arg = (void*) 0;
-
- intrtab[11].ih_fun = ip22_mappable_intr;
- intrtab[11].ih_arg = (void*) 1;
-
/* Prime cache */
ip22_cal_timer(int23addr + 0x3c, int23addr + 0x38);
@@ -166,273 +136,17 @@
printf("Timer calibration, got %lu cycles (%lu, %lu, %lu)\n", cps,
ctrdiff[0], ctrdiff[1], ctrdiff[2]);
- platform.clkread = ip22_clkread;
-
/* Counter on R4k/R4400/R4600/R5k counts at half the CPU frequency */
curcpu()->ci_cpu_freq = 2 * cps * hz;
curcpu()->ci_cycles_per_hz = curcpu()->ci_cpu_freq / (2 * hz);
curcpu()->ci_divisor_delay = curcpu()->ci_cpu_freq / (2 * 1000000);
MIPS_SET_CI_RECIPRICAL(curcpu());
-#if notyet
- evcnt_attach_static(&mips_int5_evcnt);
- evcnt_attach_static(&mips_spurint_evcnt);
-#endif
-
printf("CPU clock speed = %lu.%02luMhz\n",
curcpu()->ci_cpu_freq / 1000000,
(curcpu()->ci_cpu_freq / 10000) % 100);
}
-void
-ip22_bus_reset(void)
-{
- *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(0x1fa000ec) = 0;
- *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(0x1fa000fc) = 0;
-}
-
-/*
- * NB: Do not re-enable interrupts here -- reentrancy here can cause all
- * sorts of Bad Things(tm) to happen, including kernel stack overflows.
- */
-void
-ip22_intr(status, cause, pc, ipending)
- u_int32_t status;
- u_int32_t cause;
- u_int32_t pc;
- u_int32_t ipending;
-{
- u_int32_t newcnt;
- struct clockframe cf;
-
- /* Tickle Indy/I2 MC watchdog timer */
- *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(0x1fa00014) = 0;
-
- if (ipending & MIPS_INT_MASK_5) {
- last_clk_intr = mips_rd_count();
-
- next_clk_intr += curcpu()->ci_cycles_per_hz;
- mips_wr_compare(next_clk_intr);
- newcnt = mips_rd_count();
-
- /*
- * Missed one or more clock interrupts, so let's start
- * counting again from the current value.
- */
- if ((next_clk_intr - newcnt) & 0x80000000) {
- missed_clk_intrs++;
-
- next_clk_intr = newcnt + curcpu()->ci_cycles_per_hz;
- mips_wr_compare(next_clk_intr);
- }
-
- cf.pc = pc;
- cf.sr = status;
-
- hardclock(&cf);
-#if notyet
- mips_int5_evcnt.ev_count++;
-#endif
-
- cause &= ~MIPS_INT_MASK_5;
- }
-
- if (ipending & MIPS_INT_MASK_0) {
- if (ip22_local0_intr())
- cause &= ~MIPS_INT_MASK_0;
- }
-
- if (ipending & MIPS_INT_MASK_1) {
- if (ip22_local1_intr())
- cause &= ~MIPS_INT_MASK_1;
- }
-
- if (ipending & MIPS_INT_MASK_4) {
- printf("IP22 bus error: cpu_stat %08x addr %08x, "
- "gio_stat %08x addr %08x\n",
- *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(0x1fa000ec),
- *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(0x1fa000e4),
- *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(0x1fa000fc),
- *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(0x1fa000f4));
- ip22_bus_reset();
- cause &= ~MIPS_INT_MASK_4;
- }
-
-#if notyet
- if (cause & status & MIPS_HARD_INT_MASK)
- mips_spurint_evcnt.ev_count++;
-#endif
-}
-
-int
-ip22_mappable_intr(void* arg)
-{
- int i;
- int ret;
- int intnum;
- u_int32_t mstat;
- u_int32_t mmask;
- u_int32_t int23addr;
- uintptr_t which;
-
- which = (uintptr_t)arg;
-
- if (mach_subtype == MACH_SGI_IP22_FULLHOUSE)
- int23addr = 0x1fbd9000;
- else
- int23addr = 0x1fbd9880;
-
- ret = 0;
- mstat = *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(int23addr + 0x10);
- mmask = *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(int23addr + 0x14 +
- (which * 4));
-
- mstat &= mmask;
-
- for (i = 0; i < 8; i++) {
- intnum = i + 16 + (which * 8);
- if (mstat & (1 << i)) {
- if (intrtab[intnum].ih_fun != NULL)
- ret |= (intrtab[intnum].ih_fun)
- (intrtab[intnum].ih_arg);
- else
- printf("Unexpected mappable interrupt %d\n",
- intnum);
- }
- }
-
- return ret;
-}
-
-int
-ip22_local0_intr()
-{
- int i;
- int ret;
- u_int32_t l0stat;
- u_int32_t l0mask;
- u_int32_t int23addr;
-
- if (mach_subtype == MACH_SGI_IP22_FULLHOUSE)
- int23addr = 0x1fbd9000;
- else
- int23addr = 0x1fbd9880;
-
- ret = 0;
- l0stat = *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(int23addr + 0x00);
- l0mask = *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(int23addr + 0x04);
-
- l0stat &= l0mask;
-
- for (i = 0; i < 8; i++) {
- if (l0stat & (1 << i)) {
- if (intrtab[i].ih_fun != NULL)
- ret |= (intrtab[i].ih_fun)(intrtab[i].ih_arg);
- else
- printf("Unexpected local0 interrupt %d\n", i);
- }
- }
-
- return ret;
-}
-
-int
-ip22_local1_intr()
-{
- int i;
- int ret;
- u_int32_t l1stat;
- u_int32_t l1mask;
- u_int32_t int23addr;
-
- if (mach_subtype == MACH_SGI_IP22_FULLHOUSE)
- int23addr = 0x1fbd9000;
- else
- int23addr = 0x1fbd9880;
-
- l1stat = *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(int23addr + 0x08);
- l1mask = *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(int23addr + 0x0c);
-
- l1stat &= l1mask;
-
- ret = 0;
- for (i = 0; i < 8; i++) {
- if (l1stat & (1 << i)) {
- if (intrtab[8 + i].ih_fun != NULL)
- ret |= (intrtab[8 + i].ih_fun)
- (intrtab[8 + i].ih_arg);
- else
- printf("Unexpected local1 interrupt %x\n",
- 8 + i );
- }
- }
-
- return ret;
-}
-
-void
-ip22_intr_establish(level, ipl, handler, arg)
- int level;
- int ipl;
- int (*handler) __P((void *));
- void *arg;
-{
- u_int32_t mask;
- u_int32_t int23addr;
-
- if (level < 0 || level >= NINTR)
- panic("invalid interrupt level");
-
- if (intrtab[level].ih_fun != NULL)
- panic("cannot share CPU interrupts");
-
- intrtab[level].ih_fun = handler;
- intrtab[level].ih_arg = arg;
-
- if (mach_subtype == MACH_SGI_IP22_FULLHOUSE)
- int23addr = 0x1fbd9000;
- else
- int23addr = 0x1fbd9880;
-
- if (level < 8) {
- mask = *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(int23addr + 0x4);
- mask |= (1 << level);
- *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(int23addr + 0x4) = mask;
- } else if (level < 16) {
- mask = *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(int23addr + 0xc);
- mask |= (1 << (level - 8));
- *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(int23addr + 0xc) = mask;
- } else if (level < 24) {
- /* Map0 interrupt maps to l0 interrupt bit 7, so turn that on too */
- mask = *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(int23addr + 0x4);
- mask |= (1 << 7);
- *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(int23addr + 0x4) = mask;
-
- mask = *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(int23addr + 0x14);
- mask |= (1 << (level - 16));
- *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(int23addr + 0x14) = mask;
- } else {
- /* Map1 interrupt maps to l1 interrupt bit 3, so turn that on too */
- mask = *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(int23addr + 0xc);
- mask |= (1 << 3);
- *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(int23addr + 0xc) = mask;
-
- mask = *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(int23addr + 0x18);
- mask |= (1 << (level - 24));
- *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(int23addr + 0x18) = mask;
- }
-}
-
-unsigned long
-ip22_clkread(void)
-{
- uint32_t res, count;
-
- count = mips_rd_count() - last_clk_intr;
- MIPS_COUNT_TO_MHZ(curcpu(), count, res);
- return (res);
-}
-
unsigned long
ip22_cal_timer(u_int32_t tctrl, u_int32_t tcount)
{
==== //depot/projects/mips/sys/mips/sgimips/sysconf.h#3 (text+ko) ====
@@ -56,20 +56,8 @@
struct platform {
/*
* Platform Specific Function Hooks
- * bus_reset - clear memory error condition
- * cons_init - console initialization
- * iointr - I/O interrupt handler
- * intr_establish - establish interrupt handler
- * intr_disestablish - disestablish interrupt handler
- * clkread - interporate HZ with hi-resolution timer
* watchdog - toggle watchdog
*/
-
- void (*bus_reset)(void);
- void (*cons_init)(void);
- void (*iointr)(unsigned, unsigned, unsigned, unsigned);
- void (*intr_establish)(int , int, int (*)(void *), void *);
- unsigned long (*clkread) __P((void));
void (*watchdog)(int);
};
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