PERFORCE change 67797 for review
John Baldwin
jhb at FreeBSD.org
Tue Dec 28 08:16:41 PST 2004
http://perforce.freebsd.org/chv.cgi?CH=67797
Change 67797 by jhb at jhb_slimer on 2004/12/28 16:16:22
Simplify the fix for the PPro lapic errata now that we always
include the local APIC vectors.
Affected files ...
.. //depot/projects/smpng/sys/i386/i386/exception.s#20 edit
.. //depot/projects/smpng/sys/i386/i386/initcpu.c#22 edit
.. //depot/projects/smpng/sys/i386/i386/local_apic.c#23 edit
.. //depot/projects/smpng/sys/i386/i386/machdep.c#85 edit
Differences ...
==== //depot/projects/smpng/sys/i386/i386/exception.s#20 (text+ko) ====
@@ -112,13 +112,6 @@
TRAP(T_ALIGNFLT)
IDTVEC(xmm)
pushl $0; TRAP(T_XMMFLT)
-
-IDTVEC(trap0f)
- /*
- * Workaround for PentiumPro Errata 5AP: Spurious interrupts routed
- * to int15 in APIC virtual wire mode.
- */
- iret
/*
* alltraps entry point. Interrupts are enabled if this was a trap
==== //depot/projects/smpng/sys/i386/i386/initcpu.c#22 (text+ko) ====
@@ -68,7 +68,6 @@
#ifdef I686_CPU
static void init_6x86MX(void);
-static void init_ppro(void);
static void init_mendocino(void);
#endif
@@ -471,19 +470,6 @@
write_eflags(eflags);
}
-static void
-init_ppro(void)
-{
- u_int64_t apicbase;
-
- /*
- * Local APIC should be disabled if it is not going to be used.
- */
- apicbase = rdmsr(MSR_APICBASE);
- apicbase &= ~APICBASE_ENABLED;
- wrmsr(MSR_APICBASE, apicbase);
-}
-
/*
* Initialize BBL_CR_CTL3 (Control register 3: used to configure the
* L2 cache).
@@ -574,9 +560,6 @@
case CPU_686:
if (strcmp(cpu_vendor, "GenuineIntel") == 0) {
switch (cpu_id & 0xff0) {
- case 0x610:
- init_ppro();
- break;
case 0x660:
init_mendocino();
break;
==== //depot/projects/smpng/sys/i386/i386/local_apic.c#23 (text+ko) ====
@@ -605,18 +605,6 @@
printf("APIC: Using the %s enumerator.\n",
best_enum->apic_name);
- /*
- * To work around an errata, we disable the local APIC on some
- * CPUs during early startup. We need to turn the local APIC back
- * on on such CPUs now.
- */
- if (cpu == CPU_686 && strcmp(cpu_vendor, "GenuineIntel") == 0 &&
- (cpu_id & 0xff0) == 0x610) {
- apic_base = rdmsr(MSR_APICBASE);
- apic_base |= APICBASE_ENABLED;
- wrmsr(MSR_APICBASE, apic_base);
- }
-
/* Second, probe the CPU's in the system. */
retval = best_enum->apic_probe_cpus();
if (retval != 0)
==== //depot/projects/smpng/sys/i386/i386/machdep.c#85 (text+ko) ====
@@ -1461,7 +1461,7 @@
extern inthand_t
IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
- IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), IDTVEC(trap0f),
+ IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
IDTVEC(xmm), IDTVEC(lcall_syscall), IDTVEC(int0x80_syscall);
@@ -2077,8 +2077,6 @@
GSEL(GCODE_SEL, SEL_KPL));
setidt(IDT_PF, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL,
GSEL(GCODE_SEL, SEL_KPL));
- setidt(15, &IDTVEC(trap0f), SDT_SYS386TGT, SEL_KPL,
- GSEL(GCODE_SEL, SEL_KPL));
setidt(IDT_MF, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL,
GSEL(GCODE_SEL, SEL_KPL));
setidt(IDT_AC, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL,
@@ -2090,6 +2088,13 @@
setidt(IDT_SYSCALL, &IDTVEC(int0x80_syscall), SDT_SYS386TGT, SEL_UPL,
GSEL(GCODE_SEL, SEL_KPL));
+ /*
+ * Workaround for PentiumPro Errata 5AP: Spurious interrupts routed
+ * to int15 in APIC virtual wire mode.
+ */
+ setidt(15, &IDTVEC(spuriousint), SDT_SYS386IGT, SEL_KPL,
+ GSEL(GCODE_SEL, SEL_KPL));
+
r_idt.rd_limit = sizeof(idt0) - 1;
r_idt.rd_base = (int) idt;
lidt(&r_idt);
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