[Bug 238794] LAPIC register test failure with OpenBSD 6.5-snapshot guest
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bugzilla-noreply at freebsd.org
Tue Jun 25 03:26:34 UTC 2019
https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=238794
Bug ID: 238794
Summary: LAPIC register test failure with OpenBSD 6.5-snapshot
guest
Product: Base System
Version: 11.3-RELEASE
Hardware: amd64
OS: Any
Status: New
Severity: Affects Some People
Priority: ---
Component: bhyve
Assignee: virtualization at FreeBSD.org
Reporter: jason at tubnor.net
OpenBSD has just imported LLVM 8.0 into -current and the way the compiler
builds code to test the LAPIC register has changed (though still valid
according to Intel documentation).
guenther@ from the OpenBSD project provided some insights based on information
provided. Below is an extract from the email thread:
> Below is output from bhyve.log:
>
> rdmsr to register 0xc80 on vcpu 0
> Failed to emulate instruction [0xf7 0x04 0x25 0x00 0xd3 0xd1 0x81 0x00 0x10
> 0x00 0x00 0x74 0x08 0xf3 0x90] at 0xffffffff817648f0
According to objdump -d, that's:
f7 04 25 00 d3 d1 81 testl $0x1000,0xffffffff81d1d300
00 10 00 00
74 08 je <forward some>
f3 90 pause
That's testing the LAPIC ICRLO, a memory-mapped register. Previously, the
compiler generated code like this:
8b 0c 25 00 63 cf 81 mov 0xffffffff81cf6300,%ecx
f7 c1 00 10 00 00 test $0x1000,%ecx
74 09 je <forward some>
f3 90 pause
where it loaded the LAPIC register into %ecx and then tested that value;
now it combines them and does a direct test. Congrats, that's legal
according to Intel (reportedly, Windows will use SSE(!) instructions to
read LAPIC registers), so this seems like a bug in Bhyve.
The full thread can be found here:
https://marc.info/?l=openbsd-bugs&m=156142900518812&w=2
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