CPU Cache and busdma usage in USB

[Piotr Zięcik]

Monday 29 June 2009 13:37:41 Hans Petter Selasky napisał(a):

> > Look into ehci_check_transfer() function
> > (http://fxr.watson.org/fxr/source/dev/usb/controller/ehci.c#L1294)
> >
> > usb_pc_cpu_invalidate() [bus_dmamap_sync()] is not used in this function
> > correcly. It is not paired with usb_pc_cpu_flush() [opposite
> > bus_dmamap_sync()] as busdma requires (see part of manpage cited above).
> > The same problem is in part of code shown in previous mail.
> >
> > If usb_pc_cpu_invalidate()/usb_pc_cpu_flush() functions had been
> > implemented without using busdma, for example as cpu_*() functions,
> > ehci_check_transfer() would have been 100% correct. In current code
> > busdma requirements are simply not met.
>
> Good point. Unfortunately I cannot pair like you suggest, because then I
> can overwrite values updated by the hardware, if I first read the status
> for example, and the same 32-bits are updated by hardware, before the old
> value is flushed over the new one.. Also I cannot find the word "pair" in
> the busdma manpage? Where is this requirement stated?

Look for bus_dmamap_sync() sync description, last sentence:
<cite>
If read and write operations are not preceded and followed by the
appropriate synchronization operations, behavior is undefined.
</cite>

> I see some things:
>
> You wrote earlier that the COHERENT flag was not set. That means your setup
> is using bounce pages for DMA? Right?

No. On ARM BUS_DMA_COHERENT flag enforces no-cache page mapping.
This is performance killer and should be avoided. In addition space for 
uncached mappings is also limted.

Bounce pages are used if busdma subsystem is not able to directly met 
alignment constrains specified in dma tag. In this case, a bounce page is 
allocated and data is copied (!) to the bounce page. Busdma returns physical 
address of bounce page which mets constraints specified in the dma tag.

When sync operation is preformed and given mapping uses bounce pages,
data is copied between the bounce pages and original location. All cache
operations are performed on bounce pages.

-- 
Best Regards.
Piotr Ziecik