31st address line sometimes not used on EHCI/UHCI/OHCI
julian at elischer.org
Mon May 28 07:59:34 UTC 2007
John-Mark Gurney wrote:
> Hans Petter Selasky wrote this message on Mon, May 28, 2007 at 08:53 +0200:
>> On Sunday 27 May 2007 23:53, John-Mark Gurney wrote:
>>> Hans Petter Selasky wrote this message on Sun, May 27, 2007 at 22:35 +0200:
>>>> I've got some reports back that some USB host controllers do not support
>>>> transferring memory from a location higher than 2GB.
>>>> What should we do about this?
>>>> Should we limit all USB DMA allocations to the lower 2GB of the memory?
>>> No, a quirk table should be setup and pass the restriction to bus_dma
>>> at tag initalization time when a broken controller is detected..
>> Yes, I can do that. But I am also thinking about a static quirk, like a sysctl
>> you can set at boot time.
> The only issue w/ this is that it would also effect add in USB PCI cards
> that aren't effected by the bug... Which means a sysctl would limit the
> hardware to the lowest common denominator...
>> I hope that this is not a wide-spread problem.
>> And I am not surprised that hardware manufacturers are not specification
>> compliant, which really makes me wonder if they support a true 64-bit address
>> bus on the EHCI controller at all. I would maybe cost too much money? And
>> therefore we should just stick with 32-bit addressing on 32-bit platforms
> Don't forget we have PAE for i386... so restricting to 32bit addressing
> for i386 would have an impact...
> As for it being an intermediate bus being the issue, I'd be surprised
> as that would mean that pci bridge to the USB controller is seriously
> broken... At least dealing w/ a intermediate bus is easier now that
> was have bus_get_dma_tag...
I'd rather it were a screwed up MB than a screwed up chip :-)
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